| 1. |
- Abbas, Muhammad, et al.
(författare)
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Power Estimation of Recursive and Non-Recursive CIC Filters Implemented in Deep-Submicron Technology
- 2010
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Ingår i: Proceedings of International Conference on Green Circuits and Systems (ICGCS), 2010, Date: 21-23 June, 2010. - : IEEE. - 9781424468775 - 9781424468768 ; , s. 221-225
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Konferensbidrag (refereegranskat)abstract
- The power modeling of different realizations of cascaded integrator-comb (CIC) decimation filters has been a subject of several recent works. In this work we have extended these with modeling of leakage power, which is an important factor since the input sample rate may differ several orders of magnitude. Furthermore, we have pointed out the importance of the input wordlength on the comparison of recursive and nonrecursive implementations.
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| 2. |
- Blad, Anton, 1981-, et al.
(författare)
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A Hybrid Early Decision-Probability Propagation Decoding Algorithm for Low-Density Parity-Check Codes
- 2005
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Ingår i: Asilomar Conference on Signals, Systems and Computers,2005. - : IEEE. ; , s. 586-
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Konferensbidrag (refereegranskat)abstract
- Low-density parity-check codes have recently received extensive attention as a forward error correction scheme in a wide area of applications. The decoding algorithm is inherently parallelizable, allowing communication at high speeds. One of the main disadvantages, however, is large memory requirements for interim storing of decoding data. In this paper, we investigate the performance of a hybrid decoding algorithm, using an approximating early decision algorithm and a regular probability propagation algorithm. When the early decision algorithm fails, the block is re-decoded using a probability propagation decoder. As almost all errors are detectable, the error correction performance of the hybrid algorithm is negligibly detoriated. However, simulations still achieve a 32% decrease of memory accesses.
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| 3. |
- Blad, Anton, 1981-, et al.
(författare)
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An early decision decoding algorithm for LDPC codes using dynamic thresholds
- 2005
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Ingår i: European Conference on Circuit Theory and Design,2005. - : IEEE. ; , s. III/285-
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Konferensbidrag (refereegranskat)abstract
- Low-density parity-check codes have recently received extensive attention as a forward error correction scheme in a wide area of applications. The decoding algorithm is inherently parallelizable, allowing communication at high speeds. One of the main disadvantages, however, is large memory requirements for interim storing of decoding data. In this paper, we investigate a modification to the decoding algorithm, using early decisions for bits with high reliabilities. This reduces the amount of messages passed by the algorithm, which can be expected to reduce the switching activity of a hardware implementation. While direct application of the modification results in severe performance penalties, we show how to adapt the algorithm to reduce the impact, resulting in a negligible decrease in error correction performance.
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| 4. |
- Blad, Anton, 1981-, et al.
(författare)
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An LDPC decoding algorithm utilizing early decisions
- 2005
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Ingår i: National Conference of Radio Science RVK,2005.
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Konferensbidrag (refereegranskat)abstract
- We investigate a modification to the sum-product algorithm used for decoding low-density parity-check (LDPC) codes. The sum-product algorithm is algorithmically simple and highly parallelizable, but suffers from high memory usage, making LDPC codes unsuitable for usage in battery powered devices such as cell phones and PDAs. The proposed modification defines a measure of bit reliabilities during the decoding process. Whenever the reliability of a bit is over a certain threshold, the bit is declared decided, and its messages are no longer calculated. We give experimental results for white Gaussian channels, and show that the amount of memory accesses can be substantially reduced, while performance does not suffer significantly. At a bit error rate of 10^-4, the number of memory accesses is halved, while the required transmitter power increases about 0.3 dB.
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| 5. |
- Blad, Anton, 1981-, et al.
(författare)
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Early decision decoding methods for low-density parity-check codes
- 2005
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Ingår i: Swedish System-on-Chip Conference,2005.
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Konferensbidrag (övrigt vetenskapligt/konstnärligt)abstract
- Low-density parity-check codes have recently received extensive attention as a forward error correction scheme in a wide area of applications. The decoding algorithm is inherently parallelizable, allowing communication at high speeds. One of the main disadvantages, however, is large memory requirements for interim storing of decoding data. In this paper, we investigate a modification to the decoding algorithm, using early decisions for bits with high reliabilities. Currently, there are two early decision schemes proposed. We compare their theoretical performances and their suitability for hardware implementation. We also propose a new decision method, which we call weak decisions, that offers an increase in performance by a factor of two.
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| 6. |
- Blad, Anton, 1981-, et al.
(författare)
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Implementation aspects of an early decision decoder for LDPC codes
- 2005
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Ingår i: NORCHIP Conference,2005. - : IEEE. ; , s. 157-
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Konferensbidrag (refereegranskat)abstract
- Low-density parity-check codes have recently received extensive attention as a forward error correction scheme in a wide area of applications. The decoding algorithm is inherently parallelizable, allowing communication at high speeds. One of the main disadvantages, however, is large memory requirements for interim storing of decoding data. In this paper, we propose an architecture for an early decision decoding algorithm. The algorithm significantly reduces the number of memory accesses. Simulation results show that the increased energy dissipation of the components is small compared to the reduced dissipation of the memories.
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