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| 2. |
- Memisevic, E., et al.
(författare)
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Vertical InAs/GaAsSb/GaSb tunneling field-effect transistor on Si with S = 48 mV/decade and Ion = 10 μA/μm for Ioff = 1 nA/μm at VDS = 0.3 V
- 2017
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Ingår i: 2016 IEEE International Electron Devices Meeting, IEDM 2016. - 9781509039012 ; , s. 1-19
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Konferensbidrag (refereegranskat)abstract
- We present a vertical nanowire InAs/GaAsSb/GaSb TFET with a highly scaled InAs diameter (20 nm). The device exhibits a minimum subthreshold swing of 48 mV/dec. for Vds = 0.1-0.5 V and achieves an Ion = 10.6 μA/μm for Ioff = 1 nA/μm at Vds = 0.3 V. The lowest subthreshold swing achieved is 44 mV/dec. at Vds= 0.05 V. Furthermore, a benchmarking is performed against state-of-the-art TFETs and MOSFETs demonstrating a record high I60 and performance benefits for Vds between 0.1 and 0.3 V.
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| 3. |
- Cherkaoui, K., et al.
(författare)
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High-k/InGaAs interface defects at cryogenic temperature
- 2023
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Ingår i: Solid-State Electronics. - 0038-1101. ; 207
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Tidskriftsartikel (refereegranskat)abstract
- Oxide defects in the high-k/InGaAs MOS system are investigated. The behaviour of these traps is explored from room temperature down to 10 K. This study reveals that the exchange of free carriers between oxide states and either the conduction or the valence band is strongly temperature dependant. The capture and emission of electrons is strongly suppressed at 10 K as demonstrated by the collapse of the capacitance frequency dispersion in accumulation for n-InGaAs MOS devices, though hysteresis in the C-V sweeps is still present at 10 K. Phonon assisted tunnelling processes are considered in the simulation of electrical characteristics. The simulated data match very well the experimental characteristics and provide energy and spatial mapping of oxide defects. The multi phonon theory also help explain the impedance data temperature dependence. This study also reveals an asymmetry in the free carrier trapping between n and p type devices, where hole trapping is more significant at 10 K.
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| 4. |
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| 5. |
- Larsson, D. G. Joakim, 1969, et al.
(författare)
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Critical knowledge gaps and research needs related to the environmental dimensions of antibiotic resistance
- 2018
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Ingår i: Environment International. - : Elsevier BV. - 0160-4120 .- 1873-6750. ; 117, s. 132-138
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Forskningsöversikt (refereegranskat)abstract
- There is growing understanding that the environment plays an important role both in the transmission of antibiotic resistant pathogens and in their evolution. Accordingly, researchers and stakeholders world-wide seek to further explore the mechanisms and drivers involved, quantify risks and identify suitable interventions. There is a clear value in establishing research needs and coordinating efforts within and across nations in order to best tackle this global challenge. At an international workshop in late September 2017, scientists from 14 countries with expertise on the environmental dimensions of antibiotic resistance gathered to define critical knowledge gaps. Four key areas were identified where research is urgently needed: 1) the relative contributions of different sources of antibiotics and antibiotic resistant bacteria into the environment; 2) the role of the environment, and particularly anthropogenic inputs, in the evolution of resistance; 3) the overall human and animal health impacts caused by exposure to environmental resistant bacteria; and 4) the efficacy and feasibility of different technological, social, economic and behavioral interventions to mitigate environmental antibiotic resistance.(1)
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| 6. |
- Memisevic, Elvedin, et al.
(författare)
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InAs/GaSb vertical nanowire TFETs on Si for digital and analogue applications
- 2016
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Ingår i: 2016 IEEE Silicon Nanoelectronics Workshop, SNW 2016. - 9781509007264 ; , s. 154-155
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Konferensbidrag (refereegranskat)abstract
- Vertical InAs/GaSb nanowire TFETs with diameters of 20 nm and 25 nm have been fabricated and characterized. The influence of diameter, gate-placement, and nanowire numbers have been studied. The best device shows a subthreshold swing of 68 mV/dec at VDS = 0.3 V and 26 μA/μm at VDS = 0.3 V and VGS = 0.5 V. It achieves a self-gain larger than 100 with high transconductance efficiency.
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| 7. |
- Muller, L. S. O., et al.
(författare)
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Magnetic resonance imaging of the knee for chronological age estimation-a systematic review
- 2023
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Ingår i: European Radiology. - 0938-7994. ; 33:98, s. 5258-5268
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Tidskriftsartikel (refereegranskat)abstract
- IntroductionRadiographs of the hand and teeth are frequently used for medical age assessment, as skeletal and dental maturation correlates with chronological age. These methods have been criticized for their lack of precision, and magnetic resonance imaging (MRI) of the knee has been proposed as a more accurate method. The aim of this systematic review is to explore the scientific and statistical evidence for medical age estimation based on skeletal maturation as assessed by MRI of the knee.Materials and methodsA systematic review was conducted that included studies published before April 2021 on living individuals between 8 and 30 years old, with presumptively healthy knees for whom the ossification stages had been evaluated using MRI. The correlation between "mature knee" and chronological age and the risk of misclassifying a child as an adult and vice versa was calculated.ResultsWe found a considerable heterogeneity in the published studies -in terms of study population, MRI protocols, and grading systems used. There is a wide variation in the correlation between maturation stage and chronological age.ConclusionData from published literature is deemed too heterogenous to support the use of MRI of the knee for chronological age determination. Further, it is not possible to assess the sensitivity, specificity, negative predictive value, or positive predictive value for the ability of MRI to determine whether a person is over or under 18 years old.
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| 8. |
- Rosca, T., et al.
(författare)
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An Experimental Study of Heterostructure Tunnel FET Nanowire Arrays : Digital and Analog Figures of Merit from 300K to 10K
- 2019
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Ingår i: 2018 IEEE International Electron Devices Meeting, IEDM 2018. - 9781728119878 ; 2018, s. 1-13
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Konferensbidrag (refereegranskat)abstract
- In this work, we experimentally report the figures of merit of state-of-the-art heterostructure Tunnel Field-Effect-Transistor (TFET) arrays from room (300K) down to cryogenic temperature (10K) at supply voltages below 400mV. We demonstrate here, for the first time, that InAs/InGaAsSb/GaSb Nanowire (NW) TFETs are robust enough to maintain excellent figures of merit over a large temperature range even in devices with a large number arrayed nanowires (here, from 4 to 184 nanowires per device), accounting for technological variability. The investigated Tunnel FETs have temperature-independent min and average subthreshold swings of 45mV/dec/67mV/dec in large NW arrays, versus ∼36/45mV/dec in smaller arrays, once the trap-assisted tunneling is removed (from 150K down to 10K). In all NW arrays we observe improvement of the on-current and of maximum transconductance, gmax, at cryogenic temperatures, with very little dependence of temperature, from 150K to 10K. The paper reports that in the range 150K to 10K only band-to-band-tunneling dominates the analog figures of merit of Tunnel FETs; we measured transconductance efficiencincies higher than 60V -1 for small arrays (breaking the limit of CMOS at RT) and close to 42V -1 for large arrays, for supply volrages smaller than 100mV, offering the possibility to design future energy efficient readouts and analog-to-digital converters. In contrast with cryogenic MOSFETs, Tunnel FETs show almost no hysteresis (<24mV), steep transfer characteristics, are free of kinks in output characteristics, with a unique stability of the swing drift with T, and negligible threshold voltage drift in all arrays configurations.
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| 9. |
- Schenk, A., et al.
(författare)
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The impact of hetero-junction and oxide-interface traps on the performance of InAs/Si and InAs/GaAsSb nanowire tunnel FETs
- 2017
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Ingår i: 2017 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2017. - 9784863486102 ; 2017-September, s. 273-276
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Konferensbidrag (refereegranskat)abstract
- Fabricated InAs/Si and InAs/GaAsSb vertical nanowire tunnel FETs are analyzed by physics-based TCAD with emphasis on the impact of hetero-junction and oxide-interface traps on their performance. After careful fitting of a minimum set of parameters, the effects of diameter scaling and gate alignment are predicted. Trap-assisted tunneling at the oxide interface is suppressed by scaling the diameter into the volume-inversion regime. Gate alignment steepens the slope and increases the ON-current. The 'trap-tolerant' device geometry can result in a small sub-threshold swing despite commonly present trap concentrations.
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| 10. |
- Vasen, T., et al.
(författare)
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InAs nanowire GAA n-MOSFETs with 12-15 nm diameter
- 2016
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Ingår i: 2016 IEEE Symposium on VLSI Technology, VLSI Technology 2016. - 9781509006373 ; 2016-September
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Konferensbidrag (refereegranskat)abstract
- InAs nanowires (NW) grown by MOCVD with diameter d as small as 10 nm and gate-All-Around (GAA) MOSFETs with d = 12-15 nm are demonstrated. Ion = 314 μA/μm, and Ssat =68 mV/dec was achieved at Vdd = 0.5 V (Ioff = 0.1 μA/μm). Highest gm measured is 2693 μS/μm. Device performance is enabled by small diameter and optimized high-k/InAs gate stack process. Device performance tradeoffs between gm, Ron, and Imin are discussed.
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