| 1. |
- Abasian, Alireza, et al.
(författare)
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Vacuum-Packaged Piezoelectric Energy Harvester for Powering Smart Grid Monitoring Devices
- 2019
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Ingår i: IEEE Transactions on Industrial Electronics. - 0278-0046 .- 1557-9948. ; 66:6, s. 4447-4456
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Tidskriftsartikel (refereegranskat)abstract
- This paper presents an analytical method for the design and power optimization of vacuum-packaged piezoelectric energy harvesters. It is shown that the maximum power point of a vacuum-packaged energy harvester is different from the conventional one which occurs when the electrical damping ratio equals to its mechanical counter-part. Also, it is shown that the captured power by a vacuum-packaged energy harvester is highly sensitive to the vibration frequency due to very low-mechanical damping ratio, e.g., up to 50% power drops corresponding to 2% deviations in the frequency. The analysis and design are performed in the context of an ac-line magnetic field energy harvester in which the line frequency is also fixed and this energy harvester is useful for developing the self-powered wireless monitoring devices. Furthermore, the vacuum-packaged devices are inherently robust against dust storm and icing phenomenon, which occur for overhead power lines. The proposed analytical method is established based on simplified assumptions and then an accurate method is developed for the analysis of vacuum-packaged devices. Obtained theoretical results are verified in the laboratory through a prototype of the vacuum-packaged piezoelectric device, which captures up to 90 mu W from a 10-A line current.
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| 2. |
- Jalili, Armin, et al.
(författare)
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A nonlinearity error calibration technique for pipelined ADCs
- 2011
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Ingår i: Integration. - Amsterdam, The Netherlands : Elsevier. - 0167-9260 .- 1872-7522. ; 44:3, s. 229-241
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Tidskriftsartikel (refereegranskat)abstract
- This paper presents a digital background calibration technique that measures and cancels offset, linear and nonlinear errors in each stage of a pipelined analog to digital converter (ADC) using a single algorithm. A simple two-step subranging ADC architecture is used as an extra ADC in order to extract the data points of the stage-under-calibration and perform correction process without imposing any changes on the main ADC architecture which is the main trend of the current work. Contrary to the conventional calibration methods that use high resolution reference ADCs, averaging and chopping concepts are used in this work to allow the resolution of the extra ADC to be lower than that of the main ADC.
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