| 1. |
- Wang, Guilei, et al.
(författare)
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Growth of SiGe layers in source and drain regions for 10 nm node complementary metal-oxide semiconductor (CMOS)
- 2020
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Ingår i: Journal of materials science. Materials in electronics. - : Springer Science and Business Media LLC. - 0957-4522 .- 1573-482X. ; 31, s. 26-33
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Tidskriftsartikel (refereegranskat)abstract
- In this study, the integration of Si 1−x Ge x (50% ≤ x ≤ 60%) selective epitaxy on source/drain regions in 10 nm node FinFET has been presented. One of the major process issues was the sensitivity of Si-fins’ shape to ex- and in-situ cleaning prior to epitaxy. For example, the sharpness of Si-fins could easily be damaged during the wafer washing. The results showed that a DHF dip before the normal cleaning, was essential to clean the Si-fins while in-situ annealing in range of 780–800 °C was needed to remove the native oxide for high epitaxial quality. Because of smallness of fins, the induced strain by SiGe could not be directly measured by X-ray beam in a typical XRD tool in the lab or even in a Synchrotron facility. Further analysis using nano-beam diffraction technique in high-resolution transmission electron microscope also failed to provide information about strain in the FinFET structure. Therefore, the induced strain by SiGe was simulated by technology computer-aided design program and the Ge content was measured by using energy dispersive spectroscopy. Simulation results showed 0.8, 1 and 1.3 GPa for Ge content of 40%, 50% and 60%, respectively. A kinetic gas model was also introduced to predict the SiGe profile on Si-fins with sharp triangular shape. The input parameters in the model includes growth temperature, partial pressure of the reactant gases and the exposed Si coverage in the chip area.
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| 2. |
- Xiong, Wenjuan, et al.
(författare)
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SiNx films and membranes for photonic and MEMS applications
- 2020
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Ingår i: Journal of materials science. Materials in electronics. - : Springer Science and Business Media LLC. - 0957-4522 .- 1573-482X. ; 31, s. 90-97
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Tidskriftsartikel (refereegranskat)abstract
- This work presents a novel process to form SiN x films and process for membranes with excellent mechanical properties for micro-electro-mechanical systems application as well as integration as IR waveguide for photonic application. The SiN x films were fabricated in SiNgen apparatus which is a single wafer chamber equipment compared to conventional low pressure chemical vapor deposition furnace process. The films showed low stress, good mechanical properties, but the synthesis also eradicates the issues of particle contamination. Through optimizing of the growth parameters and post annealing profile, low stress (40 Mpa) SiN x film could be finally deposited when annealing temperature rose up to 1150 °C. The stress relaxation is a result of more Si nano-crystalline which was formed during annealing, according to the FTIR results. The mechanical properties, Young’s modulus and hardness, were 210 Gpa and 20 Gpa respectively. For the waveguide application, a stack of three layers, SiO 2 /SiN x /SiO 2 was formed where the optimized layer thicknesses were used for minimum optical loss according to simulation feedback. After deposition of the first two layers in the stack, the samples were annealed in range of 900–1150 °C in order to release the stress. Chemical mechanical polish technique was applied to planarize the nitride layer prior to the oxide cladding layer. Such wafers can be used to bond to Si or Ge to manufacture advanced substrates.
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| 3. |
- Xue, Song, et al.
(författare)
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Phase separation on cell surface facilitates bFGF signal transduction with heparan sulphate
- 2022
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Ingår i: Nature Communications. - : Springer Nature. - 2041-1723. ; 13:1
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Tidskriftsartikel (refereegranskat)abstract
- Liquid-liquid phase separation (LLPS) plays important roles in various cellular processes, facilitating membrane-less organelles construction, chromatin condensation, signal transduction on inner membrane and many other processes. Current perception is that LLPS relies on weak multivalent interactions and crowded environments intracellularly. In this study, we demonstrate that heparan sulfate can serve as a platform to induce the phase separation of basic fibroblast growth factor on cell surface. The phase separation model provides an alternative mechanism how bFGF is enriched to its receptors, therefore triggering the signaling transduction. The research provides insights on the mechanism how growth factors can be recruited to cell surface by heparan sulfate and execute their functions, extending people's view on phase separation from intracellular to extracellular proteins at cellular level. Liquid-liquid phase separation (LLPS) is reported to occur in the intracellular environment. Here the authors show that heparan sulphate serves as a platform for basic fibroblast growth factor to undergo LLPS on the cell surface, therefore facilitating downstream signalling
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| 4. |
- Zhao, Xuewei, et al.
(författare)
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Design impact on the performance of Ge PIN photodetectors
- 2020
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Ingår i: Journal of materials science. Materials in electronics. - : Springer. - 0957-4522 .- 1573-482X. ; 31:1, s. 18-25
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Tidskriftsartikel (refereegranskat)abstract
- This article presents the impact of epitaxial quality, contact resistance and profile of Ge PIN photodetectors (PDs) on dark current and responsivity. The PD structures were processed with either selectively grown Ge with integrated waveguides on SOI wafer or globally grown Ge on the entire wafer. The contact resistance was lowered by introducing NiGe layer prior to the metallization. The n-type doped Ge PIN structure was formed by ion implantation and the contact resistivity was estimated to 2.6x10(-4) ohm cm(2). This value is rather high and it is believed to be due to fomation of defects during implantation. The results show a minor difference in dark currents for selectively and globally grown PDs but in both types, it depends on detector area and the epitaxial quality of Ge. For example, the threading dislocation density (TDD) in non-selectively grown PDs with thickness of 1 mu m was estimated to be 10(6) cm(-2) yielding relatively low dark currents while it dramatically changes for PDs with thinner Ge layers where TDD increases to 10(8) cm(-2) and the dark current levels increase almost by 1.5 magnitude. Surprisingly, for selectively grown PDs with Ge thickness of 500 nm, TDD was still low resulting in low dark currents. The dark current densities at -1 V bias of non-selectively and selectively grown PDs with optimized profile were measured to be 5 mA/cm(2) and 47 mA/cm(2), respectively, while the responsivity of these detectors were 0.17 A/W and 0.46 A/W at lambda similar to 1.55 mu m, respectively. Excellent performance for selectively grown PD shows an appropriate choice for detection of 1.55 mu m wavelength.
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| 5. |
- Radamson, Henry H., et al.
(författare)
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Miniaturization of CMOS
- 2019
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Ingår i: Micromachines. - : MDPI AG. - 2072-666X. ; 10:5
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Tidskriftsartikel (refereegranskat)abstract
- When the international technology roadmap of semiconductors (ITRS) started almost five decades ago, the metal oxide effect transistor (MOSFET) as units in integrated circuits (IC) continuously miniaturized. The transistor structure has radically changed from its original planar 2D architecture to today's 3D Fin field-effect transistors (FinFETs) along with new designs for gate and source/drain regions and applying strain engineering. This article presents how the MOSFET structure and process have been changed (or modified) to follow the More Moore strategy. A focus has been on methodologies, challenges, and difficulties when ITRS approaches the end. The discussions extend to new channel materials beyond the Moore era.
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| 6. |
- Radamson, Henry H., et al.
(författare)
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State of the Art and Future Perspectives in Advanced CMOS Technology
- 2020
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Ingår i: Nanomaterials. - : MDPI AG. - 2079-4991. ; 10:8
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Forskningsöversikt (refereegranskat)abstract
- The international technology roadmap of semiconductors (ITRS) is approaching the historical end point and we observe that the semiconductor industry is driving complementary metal oxide semiconductor (CMOS) further towards unknown zones. Today's transistors with 3D structure and integrated advanced strain engineering differ radically from the original planar 2D ones due to the scaling down of the gate and source/drain regions according to Moore's law. This article presents a review of new architectures, simulation methods, and process technology for nano-scale transistors on the approach to the end of ITRS technology. The discussions cover innovative methods, challenges and difficulties in device processing, as well as new metrology techniques that may appear in the near future.
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