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| 2. |
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| 3. |
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| 4. |
- Echtermeyer, T., et al.
(författare)
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Investigation of MOS capacitors and SOI-MOSFETs with epitaxial gadolinium oxide (Gd2O3) and titanium nitride (TiN) electrodes
- 2007
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 51:4, s. 617-621
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Tidskriftsartikel (refereegranskat)abstract
- Electrical properties of metal oxide semiconductor (MOS) capacitors with gate stacks of epitaxial gadolinium oxide (Gd2O3) and titanium nitride (TiN) are studied. The influence of CMOS compatible rapid thermal annealing on these gate stacks is examined. Finally, n- and p-type MOS-field effect transistors (MOSFETs) on silicon on insulator (SOI) material with epitaxial Gd2O3 and TiN gate electrodes are presented.
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| 5. |
- Efavi, J K, et al.
(författare)
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Investigation of NiAlN as gate-material for submicron CMOS technology
- 2004
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Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 76:1-4, s. 354-359
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Tidskriftsartikel (refereegranskat)abstract
- Nickel-Aluminium-Nitride (NiAlN) is investigated as gate material for submicron CMOS technology for the first time. The MAIN films have been reactively sputtered from a Ni0.5Al0.5 target in a mixture of argon and nitrogen gas. The influence of the reactive gas content and process temperatures on the work function is presented. Electrical properties are extracted from high and low frequency capacitance-voltage measurements (QSCV, HFCV). Resistivity measurements are shown for various process conditions. Interface properties are observed by transmission electron microscopy. Primarily results show NiAlN's suitability for use as gate material in a CMOS replacement gate technology. Fabrication of n-type metal-oxide-semiconductor field effect transistors with a MAIN gates activated at 900 degreesC is demonstrated.
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| 6. |
- Gottlob, H. D. B., et al.
(författare)
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0.86-nm CET gate stacks with epitaxial Gd2O3 high-k dielectrics and FUSINiSi metal electrodes
- 2006
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Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 27:10, s. 814-816
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Tidskriftsartikel (refereegranskat)abstract
- In this letter, ultrathin gadolinium oxide (Gd2O3) high-kappa gate dielectrics with complementary-metal-oxide-semiconductor (CMOS)-compatible fully silicided nickel-silicide metal gate electrodes are reported for the first time. MOS capacitors with a Gd2O3 thickness of 3.1 nm yield a capacitance equivalent oxide thickness of CET = 0.86 nm. The extracted dielectric constant is kappa =-13-14. Leakage currents and equivalent oxide thicknesses of this novel gate stack meet the International Technology Roadmap for Semiconductors targets for the near term schedule and beyond.
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| 7. |
- Gottlob, H. D. B., et al.
(författare)
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Approaches to CMOS integration of epitaxial gadolinium oxide high-K dielectrics
- 2006
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Ingår i: ESSDERC 2006. - 9781424403011 ; , s. 150-153
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Konferensbidrag (refereegranskat)abstract
- Two process concepts for integration of novel gate stacks with epitaxial high-K dielectrics and metal gate electrodes are presented. A "gate first" process based on a planar gate stack on ultra thin SOI material has been used for successful fabrication of MOSFETs with TiN/Gd2O3 gate stack. Furthermore MOSFETs with W/Gd2O3 gate stack have been fabricated with a replacement gate process. This is the first successful attempt to integrate crystalline high-K dielectrics into a "gentle" damascene metal gate process in order to reduce process induced oxide damages.
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| 8. |
- Gottlob, H. D. B., et al.
(författare)
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CMOS integration of epitaxial Gd(2)O(3) high-k gate dielectrics
- 2006
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 50:6, s. 979-985
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Tidskriftsartikel (refereegranskat)abstract
- Epitaxial gadolinium oxide (Gd(2)O(3)) high-k dielectrics are investigated with respect to their CMOS compatibility in metal oxide semiconductor (MOS) capacitors and field effect transistors (MOSFETs). MOS capacitors with various gate electrodes are exposed to typical CMOS process steps and evaluated with capacitance voltage (CV) and current voltage (JV) measurements. The effects of high temperature processes on thermal stabilities of channel/dielectric and dielectric/gate electrode interfaces is studied in detail. A feasible CMOS process with epitaxial gate oxides and metal gate electrodes is identified and demonstrated by a fully functional n-MOSFET for the first time.
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| 9. |
- Gottlob, H D B, et al.
(författare)
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Introduction of crystalline high-k gate dielectrics in a CMOS process
- 2005
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Ingår i: Journal of Non-Crystalline Solids. - : Elsevier BV. - 0022-3093 .- 1873-4812. ; 351:21-23, s. 1885-1889
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Tidskriftsartikel (refereegranskat)abstract
- In this work we report on methods to introduce crystalline rare-earth (RE) oxides with high (k > 3.9) dielectric constants (high-k) in a CMOS process flow. Key process steps compatible with crystalline praseodymium oxide (Pr2O3) high-k gate dielectric have been developed and evaluated in metal-oxide-semiconductor (MOS) structures and n-MOS transistors fabricated in an adapted conventional bulk process. From capacitance-voltage measurements a dielectric constant of k = 36 has been calculated. Furthermore an alternative process sequence suitable for the introduction of high-k material into silicon on insulator (SOI) MOS-field-effect-transistors (MOSFET) is presented. The feasibility of this process is shown by realization of n- and p-MOSFETs with standard SiO2 gate dielectric as demonstrator. SiO2 gate dielectric can be replaced by crystalline RE-oxides in the next batch fabrication.
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| 10. |
- Gottlob, H. D. B., et al.
(författare)
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Investigation of high-K gate stacks with epitaxial Gd(2)O(3) and FUSINiSi metal gates down to CET=0.86 nm
- 2006
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Ingår i: Materials Science in Semiconductor Processing. - : Elsevier BV. - 1369-8001 .- 1873-4081. ; 9:6, s. 904-908
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Tidskriftsartikel (refereegranskat)abstract
- Novel gate stacks with epitaxial gadoliniurn oxide (Gd(2)O(3)) high-k dielectrics and fully silicided (FUSI) nickel silicide (NiSi) gate electrodes are investigated. Ultra-low leakage current densities down to 10(-7) A cm(-2) are observed at a capacitance equivalent oxide thickness of CET = 1.8 nm. The influence of a titanium nitride (TiN) capping layer during silicidation is studied. Furthermore, films with an ultra-thin CET of 0.86 nm at a Gd(2)O(3) thickness of 3.1 nm yield current densities down to 0.5 A cm(-2) at V(g) = + 1 V. The extracted dielectric constant for these gate stacks ranges from k = 13 to 14. These results emphasize the potential of NiSi/Gd(2)O(3) gate stacks for future material-based scaling of CMOS technology.
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| 11. |
- Gottlob, H. D. B., et al.
(författare)
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Leakage current mechanisms in epitaxial Gd(2)O(3) high-k gate dielectrics
- 2008
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Ingår i: Electrochemical and solid-state letters. - : The Electrochemical Society. - 1099-0062 .- 1944-8775. ; 11:3, s. G12-G14
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Tidskriftsartikel (refereegranskat)abstract
- We report on leakage current mechanisms in epitaxial gadolinium oxide (Gd(2)O(3)) high-k gate dielectrics suitable for low standby power logic applications. The investigated p-type metal-oxide-semi con doctor capacitors are gated with complementary-metal-oxide-semiconductor-compatible fully silicided nickel silicide electrodes. The Gd(2)O(3) thickness is 5.9 nm corresponding to a capacitance equivalent oxide thickness of 1.8 nm. Poole-Frenkel conduction is identified as the main leakage mechanism with the high-frequency permittivity describing the dielectric response on the carriers. A trap level of Phi(T) = 1.2 eV is extracted. The resulting band diagram strongly suggests hole conduction to be dominant over electron conduction.
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| 12. |
- Gottlob, H D B, et al.
(författare)
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Scalable gate first process for silicon on insulator metal oxide semiconductor field effect transistors with epitaxial high-k dielectrics
- 2006
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Ingår i: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567. ; 24:2, s. 710-714
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Tidskriftsartikel (refereegranskat)abstract
- A "gate first" silicon on insulator (SOI) complementary metal oxide semiconductor process technology for direct evaluation of epitaxial gate dielectrics is described, where the gate stack is fabricated prior to any lithography or etching step. This sequence provides perfect silicon surfaces required for epitaxial growth. The inverted process flow with silicon dioxide (SiO2)/polysilicon gate stacks is demonstrated for gate lengths from 10 mu m down to 40 nm on a fully depleted 25 nm thin SOI film. The interface qualities at the front and back gates are investigated and compared to conventionally processed SOI devices. Furthermore, the subthreshold behavior is studied and the scalability of the gate first approach is proven by fully functional sub-100 nm transistors. Finally, a fully functional gate first metal oxide semiconductor field effect transistor with the epitaxial high-k gate dielectric gadolinium oxide (Gd2O3) and titanium nitride (TiN) gate electrode is presented.
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| 13. |
- Mollenhauer, B., et al.
(författare)
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Validation of Serum Neurofilament Light Chain as a Biomarker of Parkinson's Disease Progression
- 2020
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Ingår i: Movement Disorders. - : Wiley. - 0885-3185 .- 1531-8257. ; 35:11, s. 1999-2008
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Tidskriftsartikel (refereegranskat)abstract
- Background The objective of this study was to assess neurofilament light chain as a Parkinson's disease biomarker. Methods We quantified neurofilament light chain in 2 independent cohorts: (1) longitudinal cerebrospinal fluid samples from the longitudinal de novo Parkinson's disease cohort and (2) a large longitudinal cohort with serum samples from Parkinson's disease, other cognate/neurodegenerative disorders, healthy controls, prodromal conditions, and mutation carriers. Results In the Parkinson's Progression Marker Initiative cohort, mean baseline serum neurofilament light chain was higher in Parkinson's disease patients (13 +/- 7.2 pg/mL) than in controls (12 +/- 6.7 pg/mL),P= 0.0336. Serum neurofilament light chain increased longitudinally in Parkinson's disease patients versus controls (P< 0.01). Motor scores were positively associated with neurofilament light chain, whereas some cognitive scores showed a negative association. Conclusions Neurofilament light chain in serum samples is increased in Parkinson's disease patients versus healthy controls, increases over time and with age, and correlates with clinical measures of Parkinson's disease severity. Although the specificity of neurofilament light chain for Parkinson's disease is low, it is the first blood-based biomarker candidate that could support disease stratification of Parkinson's disease versus other cognate/neurodegenerative disorders, track clinical progression, and possibly assess responsiveness to neuroprotective treatments. However, use of neurofilament light chain as a biomarker of response to neuroprotective interventions remains to be assessed. (c) 2020 The Authors.Movement Disorderspublished by Wiley Periodicals LLC. on behalf of International Parkinson and Movement Disorder Society.
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| 14. |
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| 15. |
- Efavi, J K, et al.
(författare)
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Tungsten work function engineering for dual metal gate nano-CMOS
- 2005
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Ingår i: Journal of materials science. Materials in electronics. - : Springer Science and Business Media LLC. - 0957-4522 .- 1573-482X. ; 16:7, s. 433-436
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Tidskriftsartikel (refereegranskat)abstract
- A buffer layer technology for work function engineering of tungsten for dual metal gate Nano-CMOS is investigated. For the first time, tungsten is used as a p-type gate material using 1 nm of sputtered Aluminum Nitride (AlNx) as a buffer layer on silicon dioxide (SiO2) gate dielectric. A tungsten work function of 5.12 eV is realized using this technology in contrast to a mid-gap value of 4.6 eV without a buffer layer. Device characteristics of a p-MOSFET on silicon-on-insulator (SOI) substrate fabricated with this technology are presented.
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| 16. |
- Fuchs, A., et al.
(författare)
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Nanowire fin field effect transistors via UV-based nanoimprint lithography
- 2006
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Ingår i: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567. ; 24:6, s. 2964-2967
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Tidskriftsartikel (refereegranskat)abstract
- A triple step alignment process for UV nanoimprint lithography (UV-NIL) for the fabrication of nanoscale fin field effect transistors (FinFETs) is presented. An alignment accuracy is demonstrated between two functional layers of less than 20 nm (3 sigma). The electrical characterization of the FinFETs fabricated by a full NIL process demonstrates the potential of UV-NIL for future nanoelectronic devices.
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| 17. |
- Gottlob, H. D. B., et al.
(författare)
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Gentle FUSI NiSi metal gate process for high-k dielectric screening
- 2008
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Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 85:10, s. 2019-2021
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Tidskriftsartikel (refereegranskat)abstract
- In this paper, a process flow well suited for screening of novel high-k dielectrics is presented. In vacuo silicon capping of the dielectrics excludes process and handling induced influences especially if hygroscopic materials are investigated. A gentle, low thermal budget process is demonstrated to form metal gate electrodes by turning the silicon capping into a fully silicided nickel silicide. This process enables the investigation of rare earth oxide based high-k dielectrics and specifically their intrinsic material properties using metal oxide semiconductor (MOS) capacitors. We demonstrate the formation of nickel monosilicide electrodes which show smooth interfaces to the lanthanum- and gadolinium-based high-k oxide films. The dielectrics have equivalent oxide thicknesses of EOT = 0.95 nm (lanthanum silicate) and EOT = 0.6 nm (epitaxial gadolinium oxide).
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| 18. |
- Henschel, W, et al.
(författare)
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Electrical characterization of 12 nm EJ-MOSFETs on SOI substrates
- 2004
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 48:5, s. 739-745
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Tidskriftsartikel (refereegranskat)abstract
- A dual gate metal oxide semiconductor field effect transistor (MOSFET) with electrically variable shallow junctions (EJ-MOSFET) has been fabricated on silicon on insulator (SOI) substrates. This kind of transistor allows testing the limits of scalability at relaxed process requirements. Transistor gate lengths down to 12 run have been structured by electron beam lithography (EBL) and specific etching processes. The coupling of the upper gate to the inner transistor is carefully investigated.
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| 19. |
- Henschel, W, et al.
(författare)
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Fabrication of 12 nm electrically variable shallow junction metal-oxide-semiconductor field effect transistors on silicon on insulator substrates
- 2003
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Ingår i: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567. ; 21:6, s. 2975-2979
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Tidskriftsartikel (refereegranskat)abstract
- Electrically variable shallow junction metal-oxide-semiconductor field effect transistors on silicon on insulator have been fabricated to evaluate the suitability of fabrication processes on a nanoscale. In addition, the limits of scalability have been explored reducing gate lengths down to 12 nm. Specific attention has been paid to the overlay accuracy as required for the fabrication of these double gate structures. The superior quality of hydrogen silsesquioxane (HSQ) as electron beam resist and as mask material is demonstrated. The transistor fabricated exhibits extremely low leakage currents and relatively high on currents. The 8 orders of magnitude difference between the on and off states demonstrates conclusively large potentials for metal-oxide-semiconductor structures with critical dimensions in the 10 nm regime. (C) 2003 American Vacuum Society.
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| 20. |
- Kruse, N., et al.
(författare)
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Validation of a quantitative cerebrospinal fluid alpha-synuclein assay in a European-wide interlaboratory study
- 2015
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Ingår i: Neurobiology of Aging. - : Elsevier BV. - 0197-4580. ; 36:9, s. 2587-2596
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Tidskriftsartikel (refereegranskat)abstract
- Decreased levels of alpha-synuclein (aSyn) in cerebrospinal fluid (CSF) in Parkinson's disease and related synucleinopathies have been reported, however, not consistently in all cross-sectional studies. To test the performance of one recently released human-specific enzyme-linked immunosorbent assay (ELISA) for the quantification of aSyn in CSF, we carried out a round robin trial with 18 participating laboratories trained in CSF ELISA analyses within the BIOMARKAPD project in the EU Joint Program -Neurodegenerative Disease Research. CSF samples (homogeneous aliquots from pools) and ELISA kits (one lot) were provided centrally and data reported back to one laboratory for data analysis. Our study showed that although factors such as preanalytical sample handling and lot-to-lot variability were minimized by our study design, we identified high variation in absolute values of CSF aSyn even when the same samples and same lots of assays were applied. We further demonstrate that although absolute concentrations differ between laboratories the quantitative results are comparable. With further standardization this assay may become an attractive tool for comparing aSyn measurements in diverse settings. Recommendations for further validation experiments and improvement of the interlaboratory results obtained are given. (C) 2015 Elsevier Inc. All rights reserved.
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| 21. |
- Lemme, Max C., 1970-, et al.
(författare)
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Comparison of metal gate electrodes on MOCVD HfO2
- 2005
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Ingår i: Microelectronics and reliability. - : Elsevier BV. - 0026-2714 .- 1872-941X. ; 45:5-6, s. 953-956
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Tidskriftsartikel (refereegranskat)abstract
- Metal gate electrodes of sputtered aluminum (At), titanium nitride (TiN) and nickel aluminum nitride (NiAlN) are investigated in this work. They are compared with respect to their compatibility with metal organic chemical vapor deposited (MOCVD) hafnium dioxide (HfO2) gate dielectrics. TiN, with a midgap work function of 4.65 eV on SiO2, exhibits promising characteristics as metal gate on HfO2. In addition, encouraging results are presented for the ternary metal NiAlN, whereas classic At electrodes are found unstable in conjunction with HfO2.
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| 22. |
- Lemme, Max C., 1970-, et al.
(författare)
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Influence of channel width on n- and p-type nano-wire-MOSFETs on silicon on insulator substrate
- 2003
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Ingår i: Microelectronic Engineering. - 0167-9317 .- 1873-5568. ; 67-8, s. 810-817
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Tidskriftsartikel (refereegranskat)abstract
- The fabrication and characterization of nanoscale n- and p-type multi-wire metal-oxide semiconductor field effect transistors (MOSFETs) with a triple gate structure on silicon-on-insulator material (SOI) is described in this paper. Experimental results are compared to simulation with special emphasis on the influence of channel width on the subthreshold behavior. Experiment and simulation show that the threshold voltage depends strongly on the wire width at dimensions below 100 urn. It is further shown that the transition from partial to full channel depletion is dependent on channel geometry. Finally, an increased on-current per chip area is demonstrated for triple-gate SOI MOSFETs compared to planar SOI devices. (C) 2003 Elsevier Science B.V. All rights reserved.
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| 23. |
- Lemme, Max C., 1970-, et al.
(författare)
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Nanoscale TiN metal gate technology for CMOS integration
- 2006
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Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 83:4-9, s. 1551-1554
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Tidskriftsartikel (refereegranskat)abstract
- A TiN metal gate technology including essential natiostructuring process steps is investigated. Complex interdependencies of material deposition, nanolithography, nanoscale etching and post fabrication annealing are taken into account. First, a reactive sputter process has been optimized for plasma damage and stoichiometry. Then, a two step etch process that yields both anisotropy and selectivity has been identified. Finally, MOS-capacitors with TiN/SiO2 gate stacks fabricated with this technology have been exposed to rapid thermal annealing steps. TiN/SiO2 interfaces are chemically stable up to 800 degrees C and yield excellent CV and IV characteristics.
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| 24. |
- Lemme, Max C., 1970-, et al.
(författare)
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Subthreshold behavior of triple-gate MOSFETs on SOI material
- 2004
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 48:4, s. 529-534
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Tidskriftsartikel (refereegranskat)abstract
- The fabrication of n-type multi-wire MOSFETs on SOI material with triple-gate structures is presented. The output and transfer characteristics of devices with a gate length of 70 nm and a MESA width of 22 nm demonstrate clearly the suppression of short channel effects (SCE). In addition, these triple-gate structures are compared with planar SOI devices of comparable dimensions. The influence of biasing the substrate (back gate) is analyzed and compared to simulation data.
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| 25. |
- Lemme, Max C., 1970-, et al.
(författare)
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Subthreshold characteristics of p-type triple-gate MOSFETs
- 2003
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Ingår i: ESSDERC 2003. - NEW YORK : IEEE. ; , s. 123-126
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Konferensbidrag (refereegranskat)abstract
- The fabrication and characterization of triple-gate p-type metal-oxide semiconductor field effect transistors (p-MOSFETs) on SOI material with multiple channels is described. To demonstrate the beneficial effects of the triple-gate structure on scaling, output and transfer characteristics of 70nm printed gate length p-MOSFETs with 22nm MESA width are presented. The geometrical influence of triple-gate MESA width on subthreshold behavior is investigated in short- and long channel devices. The temperature dependence of subthreshold characteristics is discussed.
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