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Sökning: WFRF:(Xiong Jinjun)

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1.
  • Huerta, E. A., et al. (författare)
  • Enabling real-time multi-messenger astrophysics discoveries with deep learning
  • 2019
  • Ingår i: Nature reviews physics. - : Springer Science and Business Media LLC. - 2522-5820. ; 1:10, s. 600-608
  • Forskningsöversikt (refereegranskat)abstract
    • Multi-messenger astrophysics is a fast-growing, interdisciplinary field that combines data, which vary in volume and speed of data processing, from many different instruments that probe the Universe using different cosmic messengers: electromagnetic waves, cosmic rays, gravitational waves and neutrinos. In this Expert Recommendation, we review the key challenges of real-time observations of gravitational wave sources and their electromagnetic and astroparticle counterparts, and make a number of recommendations to maximize their potential for scientific discovery. These recommendations refer to the design of scalable and computationally efficient machine learning algorithms; the cyber-infrastructure to numerically simulate astrophysical sources, and to process and interpret multi-messenger astrophysics data; the management of gravitational wave detections to trigger real-time alerts for electromagnetic and astroparticle follow-ups; a vision to harness future developments of machine learning and cyber-infrastructure resources to cope with the big-data requirements; and the need to build a community of experts to realize the goals of multi-messenger astrophysics. A group of experts suggests ways in which deep learning can be used to enhance the potential for discovery in multi-messenger astrophysics.
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2.
  • Savas, Suleyman, et al. (författare)
  • Generating hardware and software for RISC-V cores generated with Rocket Chip generator
  • 2021
  • Ingår i: Proceedings - 34th IEEE International System-on-Chip Conference, SOCC 2021. - 2164-1676 .- 2164-1706. - 9781665429313 ; 2021-September, s. 89-94
  • Konferensbidrag (refereegranskat)abstract
    • This paper presents the hardware/software generation backend of a code generation framework. The backend aims at synthesizing complete systems based on RISC-V cores with accelerators from a single-language description. The framework takes the dataflow description of an algorithm as input and generates a combination of hardware (in Chisel) and software (in C) that interacts with the hardware. The hardware can be integrated with RISC-V cores created by the Rocket Chip generator and the software can be executed on these cores.The generated hardware requires similar amount of resources as the hand-written hardware while achieving equal or higher clock rates. As expected, the accelerators perform the calculations faster than the general purpose processor, 5 to 33x in our experiments. When these accelerators are integrated with the Rocket cores, they increase the performance by 25% and 260% in the two use-cases we investigate.
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