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1.	Zhang, Zhi-Bin, et al. (författare) Photo-Activated Interaction Between P3HT and Single-Walled Carbon Nanotubes Studied by Means of Field-Effect Response 2009 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 30:12, s. 1302-1304 Tidskriftsartikel (refereegranskat)abstract It is shown in this letter that the field-effect electrical response of transistors with their channel made of networks of single-walled carbon nanotubes (SWNTs) embedded in a poly(3-hexylthiophene) (P3HT) matrix can be significantly altered by light illumination. The experimental results indicate a photo-activated electron transfer from P3HT selectively to the semiconducting SWNTs. This finding points to a potential optoelectronic application of such a field-effect device as a photo-triggered electronic switch.
2.	Ackelid, Ulf, et al. (författare) Ethanol sensitivity of palladium-gate metal-oxide-semiconductor structures 1986 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 7:6, s. 353-355 Tidskriftsartikel (refereegranskat)abstract Hydrogen-sensitive palladium-gate MOS structures heated above 150°C show sensitivity to ethanol vapor. The effect is probably due to catalytic dehydrogenation of adsorbed ethanol molecules on the surface of the palladium gate.
3.	Andersson, Christer, 1982, et al. (författare) A SiC Varactor With Large Effective Tuning Range for Microwave Power Applications 2011 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 32:6, s. 788-790 Tidskriftsartikel (refereegranskat)abstract SiC Schottky diode varactors have been fabricated for use in microwave power applications, specifically the dynamic load modulation of power amplifiers. A custom doping profile has been employed to spread the C(V) over a large bias voltage range, thereby increasing the effective tuning range under large voltage swing conditions. The small-signal tuning range is approximately six, and punch through is reached at a bias voltage of -60 V, while the breakdown voltage is on the order of -160 V. An interdigitated layout is utilized together with a self-aligned Schottky anode etch process to improve the Q-factor at 2 GHz, which is 20 at zero bias and approximately 160 at punch through.
4.	Andersson, Christer M, et al. (författare) A SiC Varactor With Large Effective Tuning Range for Microwave Power Applications 2011 Ingår i: IEEE ELECTRON DEVICE LETTERS. - : IEEE Institute of Electrical and Electronics. - 0741-3106. ; 32:6, s. 788-790 Tidskriftsartikel (refereegranskat)abstract SiC Schottky diode varactors have been fabricated for use in microwave power applications, specifically the dynamic load modulation of power amplifiers. A custom doping profile has been employed to spread the C(V) over a large bias voltage range, thereby increasing the effective tuning range under large voltage swing conditions. The small-signal tuning range is approximately six, and punch through is reached at a bias voltage of -60 V, while the breakdown voltage is on the order of -160 V. An interdigitated layout is utilized together with a self-aligned Schottky anode etch process to improve the Q-factor at 2 GHz, which is 20 at zero bias and approximately 160 at punch through.
5.	Andersson, Kristoffer, 1976, et al. (författare) Fabrication and characterization of field-plated buried-gate SiC MESFETs 2006 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 27:7, s. 573-575 Tidskriftsartikel (refereegranskat)abstract Silicon carbide (SiC) MESFETs were fabricated using a standard SiC MESFET structure with the application of the "buried-channel" and field-plate (FP) techniques in the process. FPs combined with a buried-gate are shown to be favorable concerning output power density and power-added efficiency (PAE), due to higher breakdown voltage and decreased output conductance. A very high power density of 7.8 W/mm was measured on-wafer at 3 GHz for a two-finger 400-/spl mu/m gate periphery SiC MESFET. The PAE for this device was 70% at class AB bias. Two-tone measurements at 3 GHz /spl plusmn/ 100 kHz indicate an optimum FP length for high linearity operation.
6.	Asad, Muhammad, 1986, et al. (författare) Graphene FET on diamond for high-frequency electronics 2022 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 43:2, s. 300-303 Tidskriftsartikel (refereegranskat)
7.	Asad, M., et al. (författare) Graphene FET on Diamond for High-Frequency Electronics 2022 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 43:2, s. 300-303 Tidskriftsartikel (refereegranskat)abstract Transistors operating at high frequencies are the basic building blocks of millimeter-wave communication and sensor systems. The high charge-carrier mobility and saturation velocity in graphene can open way for ultra-fast field-effect transistors with a performance even better than what can be achieved with III-V-based semiconductors. However, the progress of high-speed graphene transistors has been hampered by fabrication issues, influence of adjacent materials, and self-heating effects. Here, we report on the improved performance of graphene field-effect transistors (GFETs) obtained by using a diamond substrate. An extrinsic maximum frequency of oscillation fmax of up to 54 GHz was obtained for a gate length of 500 nm. Furthermore, the high thermal conductivity of diamond provides an efficient heat-sink, and the relatively high optical phonon energy of diamond contributes to an increased charge-carrier saturation velocity in the graphene channel. Moreover, we show that GFETs on diamond exhibit excellent scaling behavior for different gate lengths. These results promise that the GFET-on-diamond technology has the potential of reaching sub-terahertz frequency performance.
8.	Berg, Martin, et al. (författare) Electrical Characterization and Modeling of Gate-Last Vertical InAs Nanowire MOSFETs on Si 2016 Ingår i: IEEE Electron Device Letters. - 0741-3106. ; 37:8, s. 966-969 Tidskriftsartikel (refereegranskat)abstract Vertical InAs nanowire transistors are fabricated on Si using a gate-last method, allowing for lithography-based control of the vertical gate length. The best devices combine good ON- and OFF-performance, exhibiting an ON-current of 0.14 mA/μm, and a sub-threshold swing of 90 mV/dec at 190 nm LG. The device with the highest transconductance shows a peak value of 1.6 mS/μm. From RF measurements, the border trap densities are calculated and compared between devices fabricated using the gate-last and gate-first approaches, demonstrating no significant difference in trap densities. The results thus confirm the usefulness of implementing digital etching in thinning down the channel dimensions.
9.	Beuerle, Bernhard, et al. (författare) Integrating InP MMICs and Silicon Micromachined Waveguides for sub-THz Systems 2023 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 44:10, s. 1800-1803 Tidskriftsartikel (refereegranskat)abstract A novel co-designed transition from InP monolithic microwave integrated circuits to silicon micromachined waveguides is presented. The transition couples a microstrip line to a substrate waveguide sitting on top of a vertical waveguide. The silicon part of the transition consists of a top and a bottom chip, fabricated in a very low-loss silicon micromachined waveguide technology using silicon on insulator wafers. The transition has been designed, fabricated and characterized for 220-330 GHz in a back-to-back configuration. Measured insertion loss is 3-6 dB at 250-300 GHz, and return loss is in excess of 5 dB.
10.	Beuerle, Bernhard, et al. (författare) Integrating InP MMICs and Silicon Micromachined Waveguides for Sub-THz Systems 2023 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 44:10, s. 1800-1803 Tidskriftsartikel (refereegranskat)abstract A novel co-designed transition from InP monolithic microwave integrated circuits to silicon micromachined waveguides is presented. The transition couples a microstrip line to a substrate waveguide sitting on top of a vertical waveguide. The silicon part of the transition consists of a top and a bottom chip, fabricated in a very low-loss silicon micromachined waveguide technology using silicon on insulator wafers. The transition has been designed, fabricated and characterized for 220 GHz to 330 GHz in a back-to-back configuration. Measured insertion loss is 3 dB to 6 dB at 250 GHz to 300 GHz , and return loss is in excess of 5 dB.
11.	Bonmann, Marlene, 1988, et al. (författare) Graphene field-effect transistors with high extrinsic fT and fmax 2019 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 40:1, s. 131-134 Tidskriftsartikel (refereegranskat)abstract In this work, we report on the performance of graphene field-effect transistors (GFETs) in which the extrinsic transit frequency (fT) and maximum frequency of oscillation (fmax) showed improved scaling behavior with respect to the gate length (Lg). This improvement was achieved by the use of high-quality graphene in combination with successful optimization of the GFET technology, where extreme low source/drain contact resistances were obtained together with reduced parasitic pad capacitances. GFETs with gate lengths ranging from 0.5 μm to 2 μm have been characterized, and extrinsic fT and fmax frequencies of up to 34 GHz and 37 GHz, respectively, were obtained for GFETs with the shortest gate lengths. Simulations based on a small-signal equivalent circuit model are in good agreement with the measured data. Extrapolation predicts extrinsic fT and fmax values of approximately 100 GHz at Lg=50 nm. Further optimization of the GFET technology enables fmax values above 100 GHz, which is suitable for many millimeter wave applications.
12.	Borg, Johan (författare) Performance and spatial sensitivity variations of single photon avalanche diodes manufactured in an image sensor CMOS process 2015 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 36:11, s. 1118-1120 Tidskriftsartikel (refereegranskat)abstract In this letter we present the results from a series of single-photon avalanche diode (SPAD) structures implemented in a commercial 0.18 μm CMOS process intended for CMOS image sensors. Variations without effect on the performance and variations that produced non-functional devices are described. Devices based on the P+/NWELL and deep-NWELL/P-EPI SPADs junctions were found to work well in this process. When biased for 10% QE the best 10 μm diameter P+/NWELL SPADs exhibited a DCR of about 1 kHz, whereas the DCR of the deep-NWELL/P-EPI SPADs was only 10 Hz under the same conditions. We also show that the former type exhibited local sensitivity variations within the SPADs ranging from a factor 4 at low excess voltage to 1.2 at an excess voltage of about 0.5 V. No significant sensitivity variations were found for the deep- NWELL/P-EPI SPADs, but they were found to exhibit significant sensitivity outside the central junction, contributing from 8.3 % at low excess voltage to approximately 70% at high excess voltage
13.	Briand, D., et al. (författare) Thermally isolated MOSFET for gas sending application 2001 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 22:1, s. 11-13 Tidskriftsartikel (refereegranskat)abstract This work reports on thermally isolated electronic components for gas sensing applications. The device is composed of an array of 4 MOSFET, a diode and a semiconductor resistor integrated on a micro-hotplate, which is fabricated using bulk micromachining of silicon. The thermal efficiency of the device is 2°C/mW with a thermal constant less than 100 ms. Holes are made in the passivation film over the gates of the MOSFET and gas sensitive films deposited on top of the gate insulator. The low thermal mass device realized allows new modes of operation for MOSFET gas sensors such as a combination of the field and thermal effects and a pulsed temperature mode of operation.
14.	Bryllert, Tomas, et al. (författare) Vertical high-mobility wrap-gated InAs nanowire transistor 2006 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 27:5, s. 323-325 Tidskriftsartikel (refereegranskat)abstract In this letter, the authors demonstrate a vertical wrap-gated field-effect transistor based on InAs nanowires [Proc. DRC, 2005, p. 157]. The nanowires have a diameter of 80 nm and are grown using selective epitaxy; a matrix of typically 10 x 10 vertically standing wires is used as channel in the transistor. The authors measure current saturation at V-ds = 0.15 V (V-g = 0 V), and a high mobility, compared to the previous nanowire transistors, is deduced.
15.	Cai, W. L., et al. (författare) Angular Dependent Auto-Oscillations by Spin-Transfer and Spin-Orbit Torques in Three-Terminal Magnetic Tunnel Junctions 2023 Ingår i: Ieee Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 44:5, s. 861-864 Tidskriftsartikel (refereegranskat)abstract Spintronic oscillators are promising candidates for neuromorphic computing due to their true miniaturization, non-linearity and synchronization properties. However, spin torque nano-oscillators are excited by current-induced spin-transfer torque which may cause high power consumption and reliability problems. Spin Hall nano-oscillators can realize higher energy efficiency, while their relatively low power emission limits their further applications. Here, we demonstrate three-terminal magnetic tunnel junction based spin torque nano-oscillators excited by the combination of spin-transfer and spin-orbit torques under different angle configurations. Thanks to the large spin Hall angle (-0.278) of W, the ratio between threshold current density of spin-transfer and spin-orbit torques for auto-oscillations can reach 0.6, indicating their high energy efficiency. Furthermore, we observe that the ratio has a sine function dependence on the angle between the spin-polarization directions of spin-transfer and spin-orbit torques. Our work could benefit the development of high-efficiency spintronic oscillators and their large network designs.
16.	Capriata, Corrado Carlo Maria, et al. (författare) Impact of Random Grain Structure on Spin-Hall Nano-Oscillator Modal Stability 2022 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 43:2, s. 312-315 Tidskriftsartikel (refereegranskat)abstract Spin-Hall nano-oscillators are a promising class of microwave spintronic devices with potential applications in RF/microwave communication and neuromorphic computing. The nano-constriction spin-Hall nano-oscillators (NC-SHNO) have relatively high power, narrow linewidth, and low drive current. Several synchronization schemes e.g. arrays of spin-wave coupled oscillators have been proposed for more stable operation and higher output power. For such arrays, it is crucial to have good oscillator stability and small device-to-device variability. Here, a micromagnetic simulation technique is proposed that includes realistic material properties and hence enables variability and modal stability to be investigated. It is demonstrated, using both measurements and simulation, that the presence of physical grains in the free magnetic layer can induce multiple oscillation modes or frequency sidebands. Our investigation could help in the development of more stable NC-SHNOs that would enable oscillator arrays with stronger synchronization. Author
17.	Cha, Eunjung, 1985, et al. (författare) InP HEMTs for Sub-mW Cryogenic Low-Noise Amplifiers 2020 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 41:7, s. 1005-1008 Tidskriftsartikel (refereegranskat)abstract This paper reports on a 100-nm gate length InP high-electron-mobility transistor (HEMT) technology for cryogenic low-noise amplifiers (LNAs) with ultra-low power dissipation of 112 mu W. This result was obtained by using 100-nm gate length InP HEMTs with improved transconductance at low drain current through a scaled-down gate-channel distance while maintaining a low gate leakage current with the use of an InP etch stop layer and Pt gate metal. The noise performance of InP HEMTs was demonstrated in a 4-8 GHz (C-band) three-stage hybrid LNA at the ambient temperature of 5 K. At a dc power dissipation of 300 mu W, the average noise temperature was 2.8 K with 27 dB gain. At a dc power dissipation of 112 mu W, the LNA exhibited an average noise temperature of 4.1 K with a gain of 20 dB. The presented results demonstrate the large potential of InP HEMT technology for sub-mW cryogenic LNA design.
18.	Chacinski, Marek, et al. (författare) Electroabsorption Modulators Suitable for 100-Gb/s Ethernet 2008 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 29:9, s. 1014-1016 Tidskriftsartikel (refereegranskat)abstract The design of a traveling-wave electroabsorption modulator (TWEAM) has been improved to decrease the drive voltage. The absorption layer was optimized and together with a novel segmentation of microwave design was introduced to increase the active modulator length. The resulting -3-dBe bandwidth of fabricated devices was estimated to be 99 GHz. Extinction ratios of 10 dB back-to-back and 6.7 dB after transmission over 2.2-km long fiber were measured with an incident drive voltage of only 2 V peak to peak. This TWEAM performance is believed to constitute a new state of the art for modulators suitable for 100-Gb/s Ethernet with on-off keying.
19.	Chacinski, Marek, et al. (författare) Monolithically Integrated DFB-EA for 100 Gb/s Ethernet 2008 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 29:12, s. 1312-1314 Tidskriftsartikel (refereegranskat)abstract The world's first monolithically integrated distributed feedback laser and electroabsorption (EA) modulator with an expected >= 100 GHz -3 dBe bandwidth suitable for 100 Gb/s operation with on-off keying is presented. The design of the EA modulator uses a traveling-wave structure with three active segments and a total active length of 180 mu m resulting in similar to 2.5 V peak-to-peak drive voltage for 10 dB optical extinction ratio and low electrical reflection.
20.	Chen, Ding Yuan, et al. (författare) Microwave Performance of 'Buffer-Free' GaN-on-SiC High Electron Mobility Transistors 2020 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 41:6, s. 828-831 Tidskriftsartikel (refereegranskat)abstract High performance microwave GaN-on-SiC HEMTs are demonstrated on a heterostructure without a conventional thick doped buffer. The HEMT is fabricated on a high-quality 0.25~\boldsymbol {\mu }\text{m} unintentional doped GaN layer grown directly on a transmorphic epitaxially grown AlN nucleation layer. This approach allows the AlN-nucleation layer to act as a back-barrier, limiting short channel effects and removing buffer leakage. The devices with the 'buffer-free' heterostructure show competitive DC and RF characteristics, as benchmarked against the devices made on a commercial Fe-doped epi-wafer. Peak transconductances of 500 mS/mm and a maximum saturated drain current of 1 A/mm are obtained. An extrinsic \text{f}-{\sf T} of 70 GHz and \text{f}-{\sf max} of 130 GHz are achieved for transistors with a gate length of 100 nm. Pulsed-IV measurements reveal a lower current slump and a smaller knee walkout. The dynamic IV performance translates to an output power of 4.1 W/mm, as measured with active load-pull at 3 GHz. These devices suggest that the 'buffer-free' concept may offer an alternative route for high frequency GaN HEMTs with less electron trapping effects.
21.	Chen, Miaoxiang (författare) Threshold-voltage tuning characteristics of all-organic electrochemical vertical rectifiers on flexible substrates 2006 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 27:4, s. 243-245 Tidskriftsartikel (refereegranskat)abstract A printed all-organic electrochemical vertical tunable rectifier is demonstrated using a conducting polymer as the active material on a flexible plastic substrate. Solution processable poly(3,4-ethylenedioxythiophene) combined with poly(styrene sulfonic acid) (PEDOT:PSS) was coated on polyester film, the rectifier channel was patterned on the PEDOT:PSS film through directly writing technique without the need for masks, patterns, or dies. A vertically layered electrochemical cell was structured via printing and laminating processes to reduce driving voltages. The resulting rectifier is a three-terminal device, the functionality of threshold voltage tuning is realized by adjusting the potential difference within the electrochemical cell. The driving voltages are reduced significantly compared to rectifiers with lateral device architecture. In a single device, the threshold voltage is tunable between 0.16 and 1.0 V while a bias voltage is swept from 0.9 to 1.7 V. © 2006 IEEE.
22.	Chen, Si, 1982-, et al. (författare) Current gain enhancement for silicon-on-insulator lateral bipolar junction transistors operating at liquid-helium temperature 2020 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 41:6, s. 800-803 Tidskriftsartikel (refereegranskat)abstract Conventional homojunction bipolar junction transistors (BJTs) are not suitable for cryogenic operation due to heavy doping-induced emitter band-gap narrowing and strong degradation in current gain (β) at low temperature. In this letter, we show that, on lateral version of the BJTs (LBJTs) fabricated on silicon-on-insulator (SOI) substrate, such β degradation can be mitigated by applying a substrate bias (V sub ), and a β over unity is achieved in a base current (I B ) range over 5 orders of magnitudes at 4.2 K, with a peak β ~ 100 demonstrated. The β improvement is explained by the enhanced electron tunneling through base region as a result of base barrier lowering and thinning by a positive Vsub, which leads to dramatic increase of collector current (IC) while IB is negligibly affected.
23.	Chen, S., et al. (författare) Novel Zn-Doped Al2O3 Charge Storage Medium for Light-Erasable In-Ga-Zn-O TFT Memory 2013 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 34:8, s. 1008-1010 Tidskriftsartikel (refereegranskat)abstract A novel Zn-doped Al2O3 (ZAO) layer prepared by atomic layer deposition (ALD) is used as the charge storage medium in an In-Ga-Zn-O thin-film-transistor memory. The gate insulating stack of Al2O3/ZAO/Al2O3 is assembled in a single ALD step, and is found to possess a high electron storage capacity due to very deep defect levels. The memory device shows a threshold voltage shift as large as 6.38 V after a +15V/1 ms programming pulse, and quite good charge retention. Once programmed, the memory can be only light erased. The underlying mechanisms are discussed with the assistance of density functional theory calculations.
24.	Cui, Xing-Mei, et al. (författare) Unique UV-Erasable In-Ga-Zn-O TFT Memory With Self-Assembled Pt Nanocrystals 2013 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 34:8, s. 1011-1013 Tidskriftsartikel (refereegranskat)abstract Semiconducting amorphous indium-gallium-zinc oxide (a-IGZO) films are integrated with an Al2O3/Pt-nanocrystals/ Al2O3 gate-stack to form UV-erasable thin-film transistor (TFT) memory. The threshold voltage (V-th), sub-threshold swing, I-ON/I-OFF ratio, and effective electron mobility of the fabricated devices are 2.1 V, 0.39 V/decade, similar to 10(6), and 8.4 cm(2)/V.s, respectively. A positive V-th shift of 2.25 V is achieved after 1-ms programming at 10 V-th, whereas a negative V-th shift as large as 3.48 V is attained after 5-s UV erasing. In addition, a 10-year memory window of 2.56 V is extrapolated at room temperature. This high-performance a-IGZO TFT memory is suitable for optical touch-panel applications.
25.	Dey, Anil, et al. (författare) High-Current GaSb/InAs(Sb) Nanowire Tunnel Field-Effect Transistors 2013 Ingår i: IEEE Electron Device Letters. - 0741-3106. ; 34:2, s. 211-213 Tidskriftsartikel (refereegranskat)abstract We present electrical characterization of GaSb/InAs(Sb) nanowire tunnel ﬁeld-effect transistors. The broken band alignment of the GaSb/InAs(Sb) heterostructure is exploited to allow for interband tunneling without a barrier, leading to high ON-current levels. We report a maximum drive current of 310 μA/μm at Vds = 0.5 V. Devices with scaled gate oxides display transconductances up to gm = 250 mS/mm at Vds = 300 mV, which are normalized to the nanowire circumference at the axial heterojunction.
26.	Dey, Anil, et al. (författare) High-Performance InAs Nanowire MOSFETs 2012 Ingår i: IEEE Electron Device Letters. - 0741-3106. ; 33:6, s. 791-793 Tidskriftsartikel (refereegranskat)abstract In this letter, we present a 15-nm-diameter InAs nanowire MOSFET with excellent on and off characteristics. An n-i-n doping profile was used to reduce the source and drain resistances, and an Al2O3/HfO2 bilayer was introduced in the high-k process. The nanowires exhibit high drive currents, up to 1.25 A/mm, normalized to the nanowire circumference, and current densities up to 34 MA/cm2 (VD = 0.5 V). For a nominal LG = 100 nm, we observe an extrinsic transconductance (gm) of 1.23 S/mm and a subthreshold swing of 93 mV/decade at VD = 10 mV.
27.	Dillner, Lars, 1968, et al. (författare) Frequency Multiplier Measurements on Heterostructure Barrier Varactors on a Copper Substrate 2000 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 21:5, s. 206-208 Tidskriftsartikel (refereegranskat)abstract We have fabricated heterostructure barrier varactors (HBV) on a copper substrate, which offers reduced spreading resistance, and improved thermal conductivity compared to an InP substrate. The devices are fabricated without degrading the electrical characteristics. The three-barrier HBV material grown by MOVPE has a leakage current of only 0.1 mu A/ mu m/sup 2/ at 19 V. The maximum capacitance is 0.54 fF/ mu m/sup 2/. In a frequency tripler experiment a maximum output power of 7.1 mW was generated at 221 GHz with a flange-to-flange efficiency of 7.9%.
28.	Domeij, Martin, et al. (författare) Geometrical effects in high current gain 1100-V 4H-SiC BJTs 2005 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 26:10, s. 743-745 Tidskriftsartikel (refereegranskat)abstract This paper reports the fabrication of epitaxial 4H-SiC bipolar junction transistors (BJTs) with a maximum current gain beta = 64 and a breakdown voltage of 1100 V. The high beta value is attributed to high material quality obtained after a continuous epitaxial growth of the base-emitter junction. The BJTs show a clear emitter-size effect indicating that surface recombination has a significant influence on beta. A minimum distance of 2-3 mu m between the emitter edge and base contact implant was found adequate to avoid a substantial beta reduction.
29.	Dong, Y. B., et al. (författare) High Light Extraction Efficiency AlGaInP LEDs With Proton Implanted Current Blocking Layer 2016 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 37:10, s. 1303-1306 Tidskriftsartikel (refereegranskat)abstract Improving light extraction efficiency is the key issue for light-emitting diodes (LEDs). Nowadays, a vertical structure design dominates LEDs. However, the light from the active region just below the p-electrode is severely blocked by the metal contact. In this letter, we use proton implantation with a depth all the way to the active region to turn the part beneath the p-pad insulating, which constitutes the most-effective-ever current blocking method. Earlier particle implantation studies never reached the device active region. Our experimental results show that the H+-implanted LEDs improve the light output power by 75% compared with non-implanted counterparts and the light intensity increases by 64.48%. By virtue of indium tin oxide current spreading film, the increase in working voltage is negligible. Analyzing the reverse leakage current, the side effect associated with the implantation is limited to an acceptable range. Numerical simulation is performed to support the experiment. Our results represent a new and simple method for solving the light blocking problem in vertical LEDs, without introducing the seemingly existing severe implantation damage to the device structure.
30.	Echtermeyer, Tim J., et al. (författare) Nonvolatile switching in graphene field-effect devices 2008 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 29:8, s. 952-954 Tidskriftsartikel (refereegranskat)abstract The absence of a band gap in graphene restricts its straightforward application as a channel material in field-effect transistors. In this letter, we report on a new approach to engineer a band gap in graphene field-effect devices (FEDs) by controlled structural modification of the graphene channel itself. The conductance in the FEDs is switched between a conductive "ON-state" and an insulating "OFF-state" with more than six orders of magnitude difference in conductance. Above a critical value of an electric field applied to the FED gate under certain environmental conditions, a chemical modification takes place to form insulating graphene derivatives. The effect can be reversed by electrical fields of opposite polarity or short current pulses to recover the initial state. These reversible switches could potentially be applied to nonvolatile memories and novel neuromorphic processing concepts.
31.	Egard, Mikael, et al. (författare) High-Frequency Performance of Self-Aligned Gate-Last Surface Channel In0.53Ga0.47As MOSFET 2012 Ingår i: IEEE Electron Device Letters. - 0741-3106. ; 33:3, s. 369-371 Tidskriftsartikel (refereegranskat)abstract We have developed a self-aligned L-g = 55 nm In-0.53 Ga-0.47 As MOSFET incorporating metal-organic chemical vapor deposition regrown n(++) In0.6Ga0.4As source and drain regions, which enables a record low on-resistance of 199 Omega mu m. The regrowth process includes an InP support layer, which is later removed selectively to the n(++) contact layer. This process forms a high-frequency compatible device using a low-complexity fabrication scheme. We report on high-frequency measurements showing f(max) of 292 GHz and f(t) of 244 GHz. These results are accompanied by modeling of the device, which accounts for the frequency response of gate oxide border traps and impact ionization phenomenon found in narrow band gap FETs. The device also shows a high drive current of 2.0 mA/mu m and a high extrinsic transconductance of 1.9 mS/mu m. These excellent properties are attributed to the use of a gate-last process, which does not include high temperature or dry-etch processes.
32.	Egard, Mikael, et al. (författare) In0.53Ga0.47As RTD-MOSFET Millimeter-Wave Wavelet Generator 2012 Ingår i: IEEE Electron Device Letters. - 0741-3106. ; 33:7, s. 970-972 Tidskriftsartikel (refereegranskat)abstract We report on the fabrication of a self-aligned regrown In0.53Ga0.47As metal-oxide-semiconductor field-effect transistor (MOSFET) and a resonant tunneling diode (RTD). The performance of these devices is demonstrated by integrating them in parallel with an inductive coplanar waveguide stub to form a highly energy-efficient 70-GHz wavelet generator. The fast switching and low on-resistance of the MOSFET make it possible to kick-start and rapidly quench this RTD-driven oscillator circuit, which produces 41-ps-short wavelets at 15 Gpulses/s, a peak output power of 7 dBm, and an energy consumption of 1.9 pJ/pulse.
33.	Ekström, Mattias, 1990-, et al. (författare) High-Temperature Recessed Channel SiC CMOS Inverters and Ring Oscillators 2019 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 40:5, s. 670-673 Tidskriftsartikel (refereegranskat)abstract Digital electronics in SiC find use in high-temperature applications. The objective of this study was to fabricate SiC CMOS without using ion implantation. In this letter, we present a recessed channel CMOS process. Selective doping is achieved by etching epitaxial layers into mesas. A deposited SiO2-film, post-annealed at lowtemperature and re-oxidized in pyrogenic steam, is used as the gate oxide to produce a conformal gate oxide over the non-planar topography. PMOS, NMOS, inverters, and ring oscillators are characterized at 200 °C. The PMOS requires reduced threshold voltage in order to enable long term reliability. This result demonstrates that it is possible to fabricate SiC CMOS without ion implantation and by low-temperature processing.
34.	Elahipanah, Hossein, et al. (författare) 5.8-kV Implantation-Free 4H-SiC BJT With Multiple-Shallow-Trench Junction Termination Extension 2015 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 36:2, s. 168-170 Tidskriftsartikel (refereegranskat)abstract Implantation-free 4H-SiC bipolar junction transistors with multiple-shallow-trench junction termination extension have been fabricated. The maximum current gain of 40 at a current density of 370 A/cm(2) is obtained for the device with an active area of 0.065 mm(2). A maximum open-base breakdown voltage (BV) of 5.85 kV is measured, which is 93% of the theoretical BV. A specific ON-resistance (R-ON) of 28 m Omega.cm(2) was obtained.
35.	Elahipanah, Hossein, 1982-, et al. (författare) 500 °C High Current 4H-SiC Lateral BJTs for High-Temperature Integrated Circuits 2017 Ingår i: IEEE Electron Device Letters. - : IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. - 0741-3106 .- 1558-0563. Tidskriftsartikel (refereegranskat)abstract High-current 4H-SiC lateral BJTs for high-temperature monolithic integrated circuits are fabricated. The BJTs have three different sizes and the designs are optimized in terms of emitter finger width and length and the device layout to have higher current density (JC), lower on-resistance (RON), and more uniform current distribution. A maximum current gain (β) of >53 at significantly high current density was achieved for different sizes of SiC BJTs. The BJTs are measured from room temperature to 500 °C. An open-base breakdown voltage (VCEO) of >50 V is measured for the devices.
36.	Fei, Liu, et al. (författare) Dopant-Segregation Technique for Leakage Reduction and Performance Improvement in Trigate Transistors Without Raised Source/Drain Epitaxy 2014 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. Tidskriftsartikel (refereegranskat)
37.	Felbinger, Jonathan, 1984, et al. (författare) Fabrication and Characterization of Thin-Barrier Al05Ga05N/AlN/GaN HEMTs 2011 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 32:7, s. 889-891 Tidskriftsartikel (refereegranskat)abstract The growth, fabrication, and performance of AlGaN/AlN/GaN high-electron-mobility transistors (HEMTs) with a total barrier thickness of 7 nm are reported. An optimized surface passivation and an Ohmic recess etch yield HEMTs exhibiting 0.72 S/mm peak extrinsic DC transconductance at a current density of 0.47 A/mm. Devices with a gate length of 90 nm achieve 78 GHz unity-current-gain frequency and up to 166 GHz maximum frequency of oscillation. The minimum noise figure at 10 GHz is 0.52 dB with an associated gain of 9.5 dB.
38.	Fröberg, Linus, et al. (författare) Heterostructure Barriers in Wrap Gated Nanowire FETs 2008 Ingår i: IEEE Electron Device Letters. - 0741-3106. ; 29:9, s. 981-983 Tidskriftsartikel (refereegranskat)
39.	Gao, Jinlan, et al. (författare) Printed electromagnetic coupler with an embedded moisture sensor for ordinary passive RFID tags 2011 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 32:12, s. 1767-1769 Tidskriftsartikel (refereegranskat)abstract This letter presents a printed UHF RFID sensor solution that indicates if a passive RFID tag has been exposed to a certain degree of moisture. The printed sensor operates as a write-once-read-many (WORM) resistive memory device as it permanently changes its resistance from about 10 to 10 after exposure to moisture or water. A printed coupling loop with an embedded WORM sensor is horizontally placed just above the surface of an ordinary UHF RFID tag. Electromagnetic coupling is used to modulate the properties of the tag antenna by changing its input impedance and introducing ohmic losses in proportion to the embedded sensor values. The passive RFID tag can change state from readable to unreadable when the WORM bit is set, i.e., is put in a low-resistance state. The proposed concept verifies that commercial RFID tags can be used as sensor tags by simply adding an electromagnetically coupled sensor as a sticker or by similar means, without the need for ohmic contacts between the sensor and the original RFID tag. Â© 2006 IEEE.
40.	Geng, Wenping, et al. (författare) Conductive Domain-Wall Temperature Sensors of LiNbO3 Ferroelectric Single-Crystal Thin Films 2021 Ingår i: IEEE Electron Device Letters. - : IEEE. - 0741-3106 .- 1558-0563. ; 42:12, s. 1841-1844 Tidskriftsartikel (refereegranskat)abstract Domain wall current (DWC) plays a key role in storage devices, logic devices and sensors due to its high on-off ratio and nano structure size in the era of nanoelectronics technology. In this work, the DWC of single crystal LiNbO3 thin film was studied by piezoresponse force microscope (PFM) and conducting atomic force microscope (c-AFM). We mainly focus on voltage and temperature dependence of DWC which increases with the voltage and temperatures. Based on this research, the packaged DWC temperature sensor is fabricated and applied in wide temperature range. The existence of domain walls makes the current on-off ratio as high as 103 at the voltage of 15 V. Our study shows that DWC has a negative temperature coefficient (NTC) from 140 K to 500 K. The current increases from 3 pA to 57 μA, which is attributed to the conductivity of switched domain. This work proposes a new type temperature sensor with wide temperature range and high compatibility and sensitivity. In addition, it provides support for harsh environment applications of ferroelectric domain engineering devices.
41.	Ghandi, Reza, et al. (författare) Fabrication of 2700-v 12-m Omega center dot cm(2) non ion-implanted 4H-SiC BJTs with common-emitter current gain of 50 2008 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 29:10, s. 1135-1137 Tidskriftsartikel (refereegranskat)abstract High-voltage blocking (2.7-kV) implantation-free SiC bipolar junction transistors with low ON-state resistance (12 m Omega . cm(2)) and high common-emitter current gain of 50 have been fabricated. A graded-base doping was implemented to provide a low-resistive ohmic contact to the epitaxial base. This design features a fully depleted base layer close to the breakdown voltage providing an efficient epitaxial JTE without ion implantation. Eliminating all ion implantation steps in this approach is beneficial for avoiding high-temperature dopant activation annealing and for avoiding generation of lifetime-killing defects that reduce the current gain.
42.	Ghandi, Reza, et al. (författare) High current-gain implantation-free 4H-SiC Monolithic Darlington Transistor 2011 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 32:2, s. 188-190 Tidskriftsartikel (refereegranskat)abstract An implantation-free 4H-SiC Darlington transistor with high current gain of 2900 ( JC= \970A/cm2) and VCE) = 6V) at room temperature is reported. The device demonstrates a record maximum current gain of 640 at 200 hC, offering an attractive solution for high-temperature applications. The monolithic Darlington device exhibits an open-base breakdown voltage of 1 kV that is less than the optimum bulk breakdown due to isolation trench between the driver and the output bipolar junction transistor. On the same wafer, a monolithic Darlington pair with a nonisolated base layer was also fabricated. At room temperature, this device shows a maximum current gain of 1000 and an open-base breakdown voltage of 2.8 kV, which is 75% of the parallel-plane breakdown voltage
43.	Ghandi, Reza, et al. (författare) High-Voltage 4H-SiC PiN Diodes With Etched Junction Termination Extension 2009 Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 30:11, s. 1170-1172 Tidskriftsartikel (refereegranskat)abstract Implantation-free mesa-etched 4H-SiC PiN diodes with a near-ideal breakdown voltage of 4.3 kV (about 80% of the theoretical value) were fabricated, measured, and analyzed by device simulation and optical imaging measurements at breakdown. The key step in achieving a high breakdown voltage is a controlled etching into the epitaxially grown p-doped anode layer to reach an optimum dopant dose of similar to 1.2 x 10(13) cm(-2) in the junction termination extension (JTE). Electroluminescence revealed a localized avalanche breakdown that is in good agreement with device simulation. A comparison of diodes with single-and double-zone etched JTEs shows a higher breakdown voltage and a less sensitivity to varying processing conditions for diodes with a two-zone JTE.
44.	Ghandi, Reza, et al. (författare) Removal of Crystal Orientation Effects on the Current Gain of 4H-SiC BJTs Using Surface Passivation 2011 Ingår i: IEEE Electron Device Letters. - : IEEE. - 0741-3106 .- 1558-0563. ; 32:5, s. 596-598 Tidskriftsartikel (refereegranskat)abstract In this letter, the dependence of current gain and base resistance on crystal orientations for single-finger 4H-SiC bipolar junction transistors ( BJTs) is analyzed. Statistical evaluation techniques were also applied to study the effect of surface passivation and mobility on the performance of the devices. It is shown that BJTs with an emitter edge aligned to the [1 (2) under bar 10] direction shows a lower current gain before surface passivation and higher base resistance after contact formation compared with other investigated crystal directions. However, the devices show a similar current gain independent of the crystal orientation after surface passivation.
45.	Gottlob, H. D. B., et al. (författare) 0.86-nm CET gate stacks with epitaxial Gd2O3 high-k dielectrics and FUSINiSi metal electrodes 2006 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 27:10, s. 814-816 Tidskriftsartikel (refereegranskat)abstract In this letter, ultrathin gadolinium oxide (Gd2O3) high-kappa gate dielectrics with complementary-metal-oxide-semiconductor (CMOS)-compatible fully silicided nickel-silicide metal gate electrodes are reported for the first time. MOS capacitors with a Gd2O3 thickness of 3.1 nm yield a capacitance equivalent oxide thickness of CET = 0.86 nm. The extracted dielectric constant is kappa =-13-14. Leakage currents and equivalent oxide thicknesses of this novel gate stack meet the International Technology Roadmap for Semiconductors targets for the near term schedule and beyond.
46.	Gudmundsson, Valur, et al. (författare) Fully Depleted UTB and Trigate N-Channel MOSFETs Featuring Low-Temperature PtSi Schottky-Barrier Contacts With Dopant Segregation 2009 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 30:5, s. 541-543 Tidskriftsartikel (refereegranskat)abstract Schottky-barrier source/drain (SB-S/D) presents a promising solution to reducing parasitic resistance for device architectures such as fully depleted UTB, trigate, or FinFET. In this letter, a low-temperature process (<= 700 degrees C) with PtSi-based S/D is examined for the fabrication of n-type UTB and trigate FETs on SOI substrate (t(si) = 30 nm). Dopant segregation with As was used to achieve the n-type behavior at implantation doses of 1 (.) 10(15) and 5. 10(15) cm(-2). Similar results were found for UTB devices with both doses, but trigate devices with the larger dose exhibited higher on currents and smaller process variation than their lower dose counterparts.
47.	Habibpour, Omid, 1979, et al. (författare) A subharmonic graphene FET mixer 2012 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 33:1, s. 71-73 Tidskriftsartikel (refereegranskat)abstract We demonstrate a subharmonic resistive graphene FET (G-FET) mixer utilizing the symmetrical channel resistance vs. gate voltage characteristic. A down-conversion loss of 24 dB is obtained with fRF=2 GHz, fLO=1.01 GHz and fIF=20 MHz in a 50 Ω impedance system. Unlike the conventional subharmonic resistive FET mixers, this type of mixer operates with only one transistor and does not need any balun at the LO port which makes it more compact.
48.	Habibpour, Omid, 1979, et al. (författare) Graphene FET Gigabit On-Off Keying Demodulator at 96 GHz 2016 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 37:3, s. 333-336 Tidskriftsartikel (refereegranskat)abstract We demonstrate the demodulation of a multi-Gb/s ON-OFF keying (OOK) signal on a 96 GHz carrier by utilizing a 250-nm graphene field-effect transistor as a zero bias power detector. From the eye diagram, we can conclude that the devices can demodulate the OOK signals up to 4 Gb/s.
49.	Habibpour, Omid, 1979, et al. (författare) Mobility Improvement and Microwave Characterization of a Graphene Field Effect Transistor With Silicon Nitride Gate Dielectrics 2011 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 32:7, s. 871-873 Tidskriftsartikel (refereegranskat)abstract We report on the influence of a silicon nitride gate dielectric in graphene-based field-effect transistors (FETs). The silicon nitride is formed by a plasma enhanced chemical vapor deposition method. The process is based on a low density plasma at a high pressure (1 torr), which results in a low degradation of the graphene lattice during the top-gate formation process. Microwave measurements of the graphene FET show a cutoff frequency of 8.8 GHz for a gate length of 1.3 μm. A carrier mobility of 3800 cm2/V · s at room temperature was extracted from the dc characteristic.
50.	Hallén, Anders, et al. (författare) Low-Temperature Annealing of Radiation-Induced Degradation in 4H-SiC Bipolar Junction Transistors 2010 Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 31:7, s. 707-709 Tidskriftsartikel (refereegranskat)abstract Radiation hardness is tested for 4H-SiC n-p-n bipolar junction transistors designed for 1200-V breakdown voltage by implanting MeV protons and carbon ions at different doses and energies. The current gain is found to be a very sensitive parameter, and a fluence as low as 1 x 107 cm(-2) of 10 MeV C-12 can be clearly detected in the forward-output characteristics, I-C(V-CE). At this low dose, no influence of ion radiation is seen in the open-collector characteristics, I-B(V-EB), or the reverse bias leakage and breakdown properties. Moreover, by annealing the implanted devices at 420 degrees C for 30 min, a complete recovery of the electrical characteristics is accomplished.

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