| 1. |
- Ahsan, Naveed, et al.
(författare)
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A 1.1V 6.2mW, Highly Linear Wideband RF Front-end for Multi-Standard Receivers in 90nm CMOS
- 2012
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Ingår i: Analog Integrated Circuits and Signal Processing. - : SpringerLink. - 0925-1030 .- 1573-1979. ; 70:1, s. 79-90
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Tidskriftsartikel (refereegranskat)abstract
- This paper presents the design and implementation of a low power, highly linear, wideband RF front-end in 90nm CMOS. The architecture consists of an inverter-like common gate low noise amplifier followed by a passive ring mixer. The proposed architecture achieves high linearity in a wide band (0.5-6GHz) at very low power. Therefore, it is a suitable choice for software defined radio (SDR) receivers. The chip measurement results indicate that the inverter-like common gate input stage has a broadband input match achieving S11 below -8.8dB up to 6GHz. The measured single sideband noise figure at an LO frequency of 2GHz and an IF of 10MHz is 6.25dB. The front-end achieves a voltage conversion gain of 4.5dB at 1GHz with 3dB bandwidth of more than 6GHz. The measured input referred 1dB compression point is +1.5dBm while the IIP3 is +11.73dBm and the IIP2 is +26.23dBm respectively at an LO frequency of 2GHz. The RF front-end consumes 6.2mW from a 1.1V supply with an active chip area of 0.0856mm2.
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| 2. |
- Ahsan, Naveed, 1974-, et al.
(författare)
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A Design Approach for Flexible RF Circuits Using Reconfigurable PROMFA Cells
- 2009
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Ingår i: Analog Integrated Circuits and Signal Processing. - 0925-1030 .- 1573-1979.
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Tidskriftsartikel (övrigt vetenskapligt/konstnärligt)abstract
- This paper presents a design approach for flexible RF circuits using Programmable Microwave Function Array (PROMFA) cells. The concept is based on an array of generic cells that can be dynamically reconfigured. Therefore, the same circuit can be used for various functions e.g. amplifier, tunable filter and tunable oscillator. For proof of concept a test chip has been implemented in 90nm CMOS process. The chip measurement results indicate that a single unit cell amplifier has a typical gain of 4dB with noise figure of 2.65dB at 1.5GHz. The measured input referred 1dB compression point is -8dBm with an IIP3 of +1.1dBm at 1GHz. In a single unit cell oscillator configuration, the oscillator can achieve a wide tuning range of 600MHz to 1.8GHz. The measured phase noise is -94dBc/Hz at an offset frequency of 1MHz for the oscillation frequency of 1.2GHz. A single unit cell oscillator consumes 18mW at 1.2GHz while providing -8dBm power into 50Ω load. In a single unit cell filter configuration, the tunable band pass filter can achieve a reasonable tuning range of 600MHz to 1.2GHz with a typical power consumption of 13mW at 1GHz. A single unit cell has a total chip area of 0.091mm2 including the coupling capacitors.
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| 3. |
- Ahsan, Naveed, 1974-, et al.
(författare)
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A Self-Tuning Technique for Optimization of Dual Band LNA
- 2008
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Ingår i: European Wireless Technology Conference (EuWiT), EuMW 2008, October 27-28, 2008, Amsterdam, The Netherlands. - : IEEE. - 9782874870088 ; , s. 178-181
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Konferensbidrag (refereegranskat)abstract
- This paper presents a self-tuning technique for optimization of a dual band LNAthat can be used in a flexible RF front-end suitable for IEEE 802.11a/b/g WLANapplications. With this tuning technique the LNA can perform self-calibrationfor the optimal performance. A possible shift in resonance frequency due toprocess and temperature variations can be compensated by this method. Theproposed self-tuning technique is implemented by using a simple RF detector atthe LNA output. Based on the DC value provided by this detector the LNA istuned for a maximum gain through the tuning loop, which incorporates ADC,digital base-band and DAC. We show that the tuning error can be within halfLSB of ADC provided the DAC and ADC resolutions are constraint by aspecified condition. For 4-bit case this value corresponds to a gain error of0.4 dB. The LNA has been implemented in 0.2μm GaAs process offered byOMMICTM. In measurements the LNA achieves a gain of 15.1 dB and 21.6 dBin the upper and lower band, respectively, with corresponding NF of 3.8 dB and2.8 dB. In the lower band the measured IIP3 is -3 dBm and 1dB_CP is -8 dBm.
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| 4. |
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| 5. |
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| 6. |
- Ahsan, Naveed, 1974-, et al.
(författare)
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Applications of Programmable Microwave Function Array (PROMFA)
- 2007
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Ingår i: Proceedings of the IEEE European Conference on Circuit Theory and Design (ECCTD 2007), August 26-30, 2007, Seville, Spain. - : IEEE. - 9781424413416 ; , s. 164 -167
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Konferensbidrag (refereegranskat)abstract
- This paper describes the use of programmable microwave function array (PROMFA) for different microwave application. The PROMFA concept is based on an array of generic cells, in which a number of different functions can be realized. Each PROMFA cell is a four-port circuit, that can either be programmed independently or collectively according to a specific need. Specifically, the phase shift capability in a single PROMFA cell, useful for a new type of phase shifter design is discussed. The paper also presents the functionality of this new architecture as a beamforming network. As an example case an active corporate feed network and a tunable recursive filter is demonstrated. Simulated and measured results are presented.
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| 7. |
- Ahsan, Naveed, 1974-, et al.
(författare)
-
Dual Band Tunable LNA for Flexible RF Front End
- 2007
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Ingår i: Proceedings of the IEEE International Bhurban Conference on Applied Sciences & Technology (IBCAST 2007), January 8-11, 2007, Islamabad, Pakistan. - : IEEE Explore. - 9789698741044 ; , s. 19-22
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Konferensbidrag (refereegranskat)abstract
- This paper presents a dual band LNA that can be switched between two bands (2.4 GHz & 5.2 GHz) for IEEE 802.1 la/b/g WLAN applications. The LNA is also tunable within each band and the tuning is incorporated by on-chip varactors. The test chip consists of two fully integrated narrow-band tunable LNAs along with SPDT switch. For power saving one LNA can be switched off. The technology process is 0.2 mum GaAs offered by OMMIC. The LNA can achieve a relatively good performance over the two bands as demonstrated by simulation. With a 3V supply, the LNA has a gain of 26.2 dB at 2.4 GHz and 21.8 dB at 5.2 GHz and the corresponding NF varies between 2.07 dB and 1.84 dB, respectively. The LNA has an IIP3 of -7 dBm at 2.4 GHz and -1.6 dBm at 5.2 GHz.
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| 8. |
- Ahsan, Naveed, 1974-, et al.
(författare)
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Highly Linear Wideband Low Power Current Mode LNA
- 2008
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Ingår i: Proceedings from the ICSES'08 - ICSES 2008 International Conference on Signals and Electronic Systems. - : IEEE. - 9788388309472 - 9788388309526 ; , s. 73-76
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Konferensbidrag (refereegranskat)abstract
- This paper presents design considerations for low power, highly linear currentmode LNAs that can be used for wideband RF front-ends for multistandardapplications. The circuit level simulations of the proposed architecture indicatethat with optimal biasing a high value of IIP3 can be obtained. A comparison ofthree scenarios for optimal bias is presented. Simulation results indicate thatwith the proposed architecture, LNAs may achieve a maximum NF of 3.6 dBwith a 3 dB bandwidth larger than 10 GHz and a best case IIP3 of +17.6 dBmwith 6.3 mW power consumption. The LNAs have a broadband input match of 50Ω. The process is 90nm CMOS and with 1.1V supply the LNAs powerconsumption varies between 6.3 mW and 2.3 mW for the best and the worst caseIIP3, respectively.
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| 9. |
- Ahsan, Naveed, 1974-
(författare)
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Programmable and Tunable Circuits for Flexible RF Front Ends
- 2008
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Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Most of today’s microwave circuits are designed for specific function and specialneed. There is a growing trend to have flexible and reconfigurable circuits. Circuitsthat can be digitally programmed to achieve various functions based on specific needs. Realization of high frequency circuit blocks that can be dynamically reconfigured toachieve the desired performance seems to be challenging. However, with recentadvances in many areas of technology these demands can now be met.Two concepts have been investigated in this thesis. The initial part presents thefeasibility of a flexible and programmable circuit (PROMFA) that can be utilized formultifunctional systems operating at microwave frequencies. Design details andPROMFA implementation is presented. This concept is based on an array of genericcells, which consists of a matrix of analog building blocks that can be dynamicallyreconfigured. Either each matrix element can be programmed independently or severalelements can be programmed collectively to achieve a specific function. The PROMFA circuit can therefore realize more complex functions, such as filters oroscillators. Realization of a flexible RF circuit based on generic cells is a new concept.In order to validate the idea, a test chip has been fabricated in a 0.2μm GaAs process, ED02AH from OMMICTM. Simulated and measured results are presented along withsome key applications like implementation of a widely tunable band pass filter and anactive corporate feed network.The later part of the thesis covers the design and implementation of tunable andwideband highly linear LNAs that can be very useful for multistandard terminals suchas software defined radio (SDR). One of the key components in the design of a flexibleradio is low noise amplifier (LNA). Considering a multimode and multiband radiofront end, the LNA must provide adequate performance within a large frequency band.Optimization of LNA performance for a single frequency band is not suitable for thisapplication. There are two possible solutions for multiband and multimode radio frontends (a) Narrowband tunable LNAs (b) Wideband highly linear LNAs. A dual bandtunable LNA MMIC has been fabricated in 0.2μm GaAs process. A self tuningtechnique has also been proposed for the optimization of this LNA. This thesis alsopresents the design of a novel highly linear current mode LNA that can be used forwideband RF front ends for multistandard applications. Technology process for thiscircuit is 90nm CMOS.
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| 10. |
- Ahsan, Naveed, 1974-
(författare)
-
Reconfigurable and Broadband Circuits for Flexible RF Front Ends
- 2009
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Most of today’s microwave circuits are designed for specific function and special need. There is a growing trend to have flexible and reconfigurable circuits. Circuits that can be digitally programmed to achieve various functions based on specific needs. Realization of high frequency circuit blocks that can be dynamically reconfigured to achieve the desired performance seems to be challenging. However, with recent advances in many areas of technology these demands can now be met.Two concepts have been investigated in this thesis. The initial part presents the feasibility of a flexible and programmable circuit (PROMFA) that can be utilized for multifunctional systems operating at microwave frequencies. Design details and PROMFA implementation is presented. This concept is based on an array of generic cells, which consists of a matrix of analog building blocks that can be dynamically reconfigured. Either each matrix element can be programmed independently or several elements can be programmed collectively to achieve a specific function. The PROMFA circuit can therefore realize more complex functions, such as filters or oscillators. Realization of a flexible RF circuit based on generic cells is a new concept. In order to validate the idea, two test chips have been fabricated. The first chip implementation was carried out in a 0.2μm GaAs process, ED02AH from OMMICTM. The second chip was implemented in a standard 90nm CMOS process. Simulated and measured results are presented along with some key applications such as low noise amplifier, tunable band pass filter and a tunable oscillator.The later part of the thesis covers the design and implementation of broadband RF front-ends that can be utilized for multistandard terminals such as software defined radio (SDR). The concept of low gain, highly linear frontends has been presented. For proof of concept two test chips have been implemented in 90nm CMOS technology process. Simulated and measurement results are presented. These RF front-end implementations utilize wideband designs with active and passive mixer configurations.We have also investigated narrowband tunable LNAs. A dual band tunable LNA MMIC has been fabricated in 0.2μm GaAs process. A self tuning technique has been proposed for the optimization of this LNA.
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| 11. |
- Irshad, Muneeb, et al.
(författare)
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Evaluation of BaCo0.Fe-4(0).4Zr0.2-xNixO3-delta perovskite cathode using nickel as a sintering aid for IT-SOFC
- 2021
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Ingår i: RSC Advances. - : Royal Society of Chemistry. - 2046-2069. ; 11:24, s. 14475-14483
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Tidskriftsartikel (refereegranskat)abstract
- In this research work, BaCo0.Fe-4(0).4Zr0.2-xNixO3-delta (x = 0, 0.01, 0.02, 0.03, 0.04) perovskite cathode material for IT-SOFC is synthesized successfully using a combustion method and sintered at low temperature. The effects of nickel as a sintering aid on the properties of BaCo0.Fe-4(0).Zr-4(0).O-2(3-delta) are investigated through different characterization methods. The addition of nickel increased the densification and grain growth at a lower sintering temperature 1200 degrees C. XRD analysis confirms a single phase of BaCo0.Fe-4(0).Zr-4(0).O-2(3-delta), and an increase in crystalline size is observed. SEM micrographs show formation of dense microstructure with increased nickel concentration. TGA analysis revealed that BaCo0.Fe-4(0).4Zr0.2-xNix cathode materials are thermally stable within the SOFC temperature range, and negligible weight loss of 2.3% is observed. The bonds of hydroxyl groups and metal oxides are confirmed for all samples through FTIR analysis. The highest electrical properties are observed for BaCo0.Fe-4(0).4Zr0.2-xNix (x = 0.04) due to increased densification and electronic defects compared to other compositions. The maximum power density of 0.47 W cm(-2) is obtained for a cell having cathode material BaCo0.Fe-4(0).4Zr0.2-xNix (x = 0.02) owing to its permeable and well-connected structure compared to others.
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| 12. |
- Mahajan, Anubha, et al.
(författare)
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Multi-ancestry genetic study of type 2 diabetes highlights the power of diverse populations for discovery and translation
- 2022
-
Ingår i: Nature Genetics. - : Springer Nature. - 1061-4036 .- 1546-1718. ; 54:5, s. 560-572
-
Tidskriftsartikel (refereegranskat)abstract
- We assembled an ancestrally diverse collection of genome-wide association studies (GWAS) of type 2 diabetes (T2D) in 180,834 affected individuals and 1,159,055 controls (48.9% non-European descent) through the Diabetes Meta-Analysis of Trans-Ethnic association studies (DIAMANTE) Consortium. Multi-ancestry GWAS meta-analysis identified 237 loci attaining stringent genome-wide significance (P < 5 x 10(-9)), which were delineated to 338 distinct association signals. Fine-mapping of these signals was enhanced by the increased sample size and expanded population diversity of the multi-ancestry meta-analysis, which localized 54.4% of T2D associations to a single variant with >50% posterior probability. This improved fine-mapping enabled systematic assessment of candidate causal genes and molecular mechanisms through which T2D associations are mediated, laying the foundations for functional investigations. Multi-ancestry genetic risk scores enhanced transferability of T2D prediction across diverse populations. Our study provides a step toward more effective clinical translation of T2D GWAS to improve global health for all, irrespective of genetic background. Genome-wide association and fine-mapping analyses in ancestrally diverse populations implicate candidate causal genes and mechanisms underlying type 2 diabetes. Trans-ancestry genetic risk scores enhance transferability across populations.
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| 13. |
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| 14. |
- Ramzan, Rashad, 1971-, et al.
(författare)
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A 0.5-6 GHz Low Gain RF Front-End for Low-IF Over-Sampling Receivers in 90nm CMOS
- 2009
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Annan publikation (övrigt vetenskapligt/konstnärligt)abstract
- The software defined radio concept has emerged as a feasible solution for future multigand and multistandard receivers. The proposed software defined radio architecture needs a front-end with moderate or low gain, high linearity, and low noise figure. This paper presents the design and measurement results of low gain RF front-end in 90nm CMOS covering the frequency range of 0.5-6GHz. The front-end is a modified form of a balanced active mixer to enhance its gain and achieve wideband input matching. The transcjonductance stage of a mixer is split into NMOS-PMOS inverter pair for better linearity and partial noise cancellation. The inverter stage with common drain feedback achieves wideband input impedance match getter than -8dB up to 8GHz. The front-end achieves voltage conversion gain of 5dB at 6GHz with 3dB bandwidth of more than 5.5GHz. The measured single side band noise figure at LO frequency of 1.5GHz and IF of 30MHz is 7dB. The measured 1dB compression point is -17dBm at 2.4GHz at 1GHz. The complete front-end consumers 23mW with active chip area of only 0.048mm2.
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| 15. |
- Ramzan, Rashad, et al.
(författare)
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A 0.5–6GHz low gain linear RF front-end in 90nm CMOS
- 2010
-
Ingår i: Proceedings of the 17th International Conference Mixed Design of Integrated Circuits and Systems. - Warsaw : IEEE. - 9781424470112 ; , s. 168-171
-
Konferensbidrag (refereegranskat)abstract
- This paper presents the design and measurement results of low gain RF front-end manufactured in 90nm CMOS covering the frequency range of 0.5-6GHz. The front-end is a modified form of a balanced active mixer to enhance its gain and achieve wideband input matching. The transconductance stage of a mixer is split into NMOS-PMOS inverter pair for better linearity and partial noise cancellation. The inverter stage with common drain feedback achieves wideband input impedance match better than -8dB up to 8GHz. The voltage conversion gain is 5dB at 6GHz with 3dB bandwidth of more than 5.5GHz. The measured single side band noise figure at LO frequency of 1.5GHz and IF of 30MHz is 7dB. The measured 1dB compression point is -17dBm at 2.4GHz. Similarly, measured IIP3 is 2.5dBm and IIP2 is 40dBm at 1GHz. The complete front-end consumes 23mW with active chip area of only 0.048mm2.
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| 16. |
- Ramzan, Rashad, et al.
(författare)
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On-Chip Stimulus Generator for Gain, Linearity, and Blocking Profile Test of Wideband RF Front Ends
- 2010
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Ingår i: IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT. - : IEEE Institute of Electrical and Electronics. - 0018-9456. ; 59:11, s. 2870-2876
-
Tidskriftsartikel (refereegranskat)abstract
- This paper presents the design and measurement of a stimulus generator suitable for on-chip RF test aimed at gain, 1-dB compression point (CP), and the blocking profile measurement. Implemented in a 90-nm complementary metal-oxide-semiconductor (CMOS), the generator consists of two low-noise voltage-controlled ring oscillators (VCOs) and an adder. It can generate a single-or two-tone signal in a range of 0.9-5.6 GHz with a tone spacing of 3 MHz to 4.5 GHz and adjustable output power. The VCOs are based on symmetrically loaded double-differential delay line architecture. The measured phase noise is -80 dBc/Hz at an offset frequency of 1 MHz for the oscillation frequency of 2.4 GHz. A single VCO consumes 26 mW at 1 GHz while providing -10-dBm power into a 50-Omega load. The silicon area of the complete test circuit including coupling capacitors is only 0.03 mm(2), while a single VCO occupies 0.012 mm(2). The measured gain, 1-dB CP, and blocking profile of the wideband receiver using the on-chip stimulus generator are within +/- 8%, +/- 10%, and +/- 18% of their actual values, respectively. These error values are acceptable for making a pass or fail decision during production testing.
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| 17. |
- Ramzan, Rashad, et al.
(författare)
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On-Chip Stimulus Generator in 90nm CMOS for Gain, Linearity, and Blocking Profile Test of Wideband RF Front-ends
-
Annan publikation (övrigt vetenskapligt/konstnärligt)abstract
- This paper presents the design and measurement of a stimulus generator suitable for on-chip RF test aimed at gain, 1dB-CP, and the blocking profile measurement. Implemented in 90 nm CMOS the generator consists of two low-noise voltage controlled ring oscillators (VCOs) and an adder. It can generate a single or two-tone signal in range of 0.9–5.6 GHz with tone spacing of 3 MHz to 4.5 GHz and adjustable output power. The VCOs are based on symmetrically loaded double differential delay line architecture. The measured phase noise is -80dBc/Hz at an offset frequency of 1MHz for the oscillation frequency of 2.4 GHz. A single VCO consumes 26mW at 1 Ghz while providing -10dBm power into 50Ω load. The silicon area of the complete test circuit including coupling capacitors is only 0.03 mm2. The measured gain, 1dB-CP, and blocking profile of the wideband receiver using the on-chip stimulus generator are within ±8%, ±10%, and ±18% of their actual values, respectively. These error values are acceptable for making pass or fail decision during production testing.
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| 18. |
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