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Sökning: WFRF:(Anderson Alec)

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1.
  • Li, Qi, 1990, et al. (författare)
  • Finger Number and Device Performance: A Case Study of Reduced Graphene Oxide Microsupercapacitors
  • 2021
  • Ingår i: Physica Status Solidi (B): Basic Research. - : Wiley. - 1521-3951 .- 0370-1972. ; 258:2
  • Tidskriftsartikel (refereegranskat)abstract
    • Microsupercapacitors (MSCs) are recognized as suitable energy storage devices for the internet of things (IoTs) applications. Herein is described the work conducted to assess the areal energy and power densities of MSCs with 2, 10, 20, and 40 interdigital finger electrodes on a fixed device footprint area (the finger interspacing is fixed at 40 μm, and the finger width and length are allowed to vary to fit the footprint area). The MSCs are based on reduced graphene oxide (rGO) materials and fabricated with a spin-coating and etch method. The performance evaluation indicates a strong dependency of areal capacitance and energy density on the number of fingers, and the maximum (impedance match) power density is also influenced to a relatively large extent, whereas the average power density is not sensitive to the configuration parameters in the present evaluation settings (scan rate 20–200 mV s−1 and current density of 100 μA cm−2). For the rGO-based devices, the equivalent distributed resistance may play an important role in determining the device resistance and power-related performance.
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2.
  • Vyas, Agin, 1992, et al. (författare)
  • Enhanced Electrode Deposition for On-Chip Integrated Micro-Supercapacitors by Controlled Surface Roughening
  • 2020
  • Ingår i: ACS Omega. - : American Chemical Society (ACS). - 2470-1343. ; 5:10, s. 5219-5228
  • Tidskriftsartikel (refereegranskat)abstract
    • On-chip micro-supercapacitors (MSCs), integrated with energy harvesters, hold substantial promise for developing self-powered wireless sensor systems. However, MSCs have conventionally been manufactured through techniques incompatible with semiconductor fabrication technology, the most significant bottleneck being the electrode deposition technique. Utilization of spin-coating for electrode deposition has shown potential to deliver several complementary metal-oxide-semiconductor (CMOS)-compatible MSCs on a silicon substrate. Yet, their limited electrochemical performance and yield over the substrate have remained challenges obstructing their subsequent integration. We report a facile surface roughening technique for improving the wafer yield and the electrochemical performance of CMOS-compatible MSCs, specifically for reduced graphene oxide as an electrode material. A 4 nm iron layer is deposited and annealed on the wafer substrate to increase the roughness of the surface. In comparison to standard nonroughened MSCs, the increase in surface roughness leads to a 78% increased electrode thickness, 21% improvement in mass retention, 57% improvement in the uniformity of the spin-coated electrodes, and a high yield of 87% working devices on a 2″ silicon substrate. Furthermore, these improvements directly translate to higher capacitive performance with enhanced rate capability, energy, and power density. This technique brings us one step closer to fully integrable CMOS-compatible MSCs in self-powered systems for on-chip wireless sensor electronics. ©
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