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- Ankarcrona, Johan, 1971-
(författare)
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High Frequency Analysis of Silicon RF MOS Transistors
- 2005
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Today, the silicon technology is well established for RF-applications (f~1-100 GHz), with emphasis on the lower frequencies (f < 5 GHz). The field of RF power devices is extensive concerning materials and devices. One of the important RF-devices is the silicon LDMOS transistor. A large extent of the research presented in the thesis concerns studies of this device, which have resulted in increased understanding of the device behavior and improved performance. The thesis starts with a brief survey of the RF-field, including the LDMOS transistor, followed by a description of the methods used in the investigations; simulations, modeling and measurements. Specific results presented in the appended papers are also briefly summarized. A new concept for LDMOS transistors, which allows for both high frequency and high voltage operation, has been developed and characterized. World-record performance in terms of output power density was obtained: over 1 W/mm at 50 V and 3.2 GHz. Further understanding and improvements of the device are achieved using simulations and modeling. For determination of model parameters a new general parameter extraction technique was developed. The method has been successfully used for a large variety of high-frequency devices, and has been frequently used in the modeling work in this thesis. Important properties of RF-power devices are the device linearity and power efficiency. Extensive studies regarding the efficiency were conducted using numerical simulations and modeling of the off-state output resistance, which is correlated to the efficiency. The results show that significant improvements can be obtained for devices on both bulk- and SOI-substrates, using thin high-resistivity substrates and very low-resistivity SOI-substrates, respectively. Finally a new approach to drastically reduce substrate crosstalk by using very low-resistivity SOI substrate is proposed. Experimentally, a reduction of 20-40 dB was demonstrated in the GHz range compared to high-resistivity SOI substrate.
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- Ankarcrona, Johan, et al.
(författare)
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Simulation and modeling of the substrate contribution to the output resistance for RF-LDMOS power transistors
- 2004
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 48:5, s. 789-797
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Tidskriftsartikel (refereegranskat)abstract
- High frequency substrate losses for RF MOSFETs are analyzed using numerical device simulation. The results show that losses in devices made on low resistivity substrate occur through the substrate while losses in devices made on high resistivity substrate in the high frequency region occur along the surface through the device (source–drain). An equivalent circuit model is developed which accurately describes the off-state losses. Based on the model significant improvements in terms of output resistance are demonstrated, using an improved device on high resistivity substrate.
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- Bengtsson, Kenneth, et al.
(författare)
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Så kan Sverige bli ledande nation i resurseffektivitet
- 2016
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Ingår i: Dagens Nyheter. - 1101-2447. ; :2016-04-30
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Tidskriftsartikel (populärvet., debatt m.m.)abstract
- Ny rapport. Det svenska näringslivet kan bli mer hållbart, resurssmart och därmed internationellt konkurrenskraftigt. Men för det behövs en tydlig politisk avsiktsförklaring och riktlinjer. Vi har listat sex områden där policyutveckling brådskar, skriver företrädare för näringsliv, forskning och myndigheter i en gemensam uppmaning.
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- Bowallius, Olof, et al.
(författare)
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Scanning Capacitance Microscopy for Two-Dimensional Doping Profiling in Si- and InP-Based Device Structures
- 1999
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Ingår i: Physica Scripta T. - 0281-1847. ; 79, s. 163-166
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Tidskriftsartikel (refereegranskat)abstract
- We report on the application of cross-sectional Scanning Capacitance Microscopy (SCM) for studying two-dimensional doping variations in Si and InP device structures. Different sample preparation methods were evaluated and the response of the SCM signal from various test structures, including epitaxially grown layers with n- and p-doping concentrations ranging from 5 × 1014 to 2 × 1019 cm-3, were examined under different imaging conditions. The technique was further evaluated by imaging a Si bipolar transistor structure and an InP-based buried heterostructure diode laser. We conclude that valuable information can be gained also from complex device structures.
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- Vestling, Lars, et al.
(författare)
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A General Small-Signal Series Impedance Extraction Technique
- 2002
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Ingår i: IEEE Microwave and Wireless Components Letters. - 1531-1309 .- 1558-1764. ; 12:7, s. 249-251
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Tidskriftsartikel (refereegranskat)abstract
- A new technique for extracting the series inductances and resistances in a small-signal equivalent circuit is presented. The technique does not rely on approximation and should therefore be as accurate as the measured data. The technique can also be used to extract the intrinsic parameters if they are not easily achieved using other methods. The method is exemplified with a microwave LDMOS transistor
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- Vestling, Lars, et al.
(författare)
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Analysis and Design of a Low-Voltage High-Frequency LDMOS Transistor
- 2002
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Ingår i: IEEE Transactions on Electron Devices. - 0018-9383 .- 1557-9646. ; 49:6, s. 976-980
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Tidskriftsartikel (refereegranskat)abstract
- For a low voltage lateral double-diffused MOS (LDMOS) transistor, the output performance has been improved in terms of fMAX. This is done by decreasing the output capacitance and thus decreasing the total output conductance. Extraction of the model parameters has been made and the most efficient parameter to improve was identified and linked to a specific part of the transistor structure. Layout changes in the n-well/p-base region were done as the result of the model analyses and finally, the modified devices were processed. Measurements on the improved devices showed results that closely, matched the expected, and fMAX was increased with 30% and only a slight decrease in f T. Finally, the capacitance reduction in the n-well/p-base junction was measured by direct. measurements
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