| 1. |
- Chen, Jing, 1995
(författare)
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Adaptive Task Scheduling and Resource Management Techniques for Improving Energy Efficiency on Multi-core Systems
- 2024
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- The growing impact of energy on operational cost and system robustness becomes a strong motivation for improving energy efficiency in parallel computing systems, in addition to performance. Hardware features such as core asymmetry and Dynamic Voltage and Frequency Scaling (DVFS) aim to provide opportunities for energy-efficient computing. However, it also complicates parallel application development. Task-based parallel programming models have been shown to be a powerful approach for developing parallel applications, allowing developers to express parallelism in the form of tasks. To achieve the goal of energy-efficient execution of a task-based application on multi-core platforms, it is essential to understand application characteristics, underlying platform capabilities and their complex interplay in order to determine appropriate task schedule and resource allocation. Consequently, this thesis introduces four task schedulers - ERASE, STEER, JOSS and SWEEP - tailored for diverse platform capabilities and energy efficiency metrics. ERASE targets reducing CPU energy consumption in non-user-controllable DVFS environments. The scheduler includes four modules: online performance modeling and power profiling modules provide runtime with execution time and power predictions; core activity tracing offers the instantaneous task parallelism and the task scheduler combines these information to enable CPU energy consumption predictions and dynamically determine the best resource allocation for each task. Moreover, ERASE is designed for quick adaptation to external DVFS changes. STEER investigates the potential CPU energy savings by leveraging core asymmetry, CPU DVFS, and task characteristics. STEER comprises two predictive models for performance and power predictions, and a task scheduler that utilizes models for energy predictions and then identifies the best resource allocation and frequency settings for tasks. Additionally, STEER employs adaptive scheduling algorithms based on task granularity to handle DVFS overheads and coordinates cluster frequency tuning to mitigate interference from concurrent tasks on cluster-based platforms. JOSS demonstrates that taking memory energy into account is crucial for reducing total energy consumption, even in the absence of a memory DVFS knob. The scheduler leverages knobs of core asymmetry, CPU DVFS, memory DVFS and task characteristics. JOSS builds a set of models using multivariate polynomial regression, providing predictions for the execution time, average CPU power and memory power of each task, when tuning the aforementioned knobs individually and simultaneously, to facilitate the scheduling decision in task scheduler. Furthermore, JOSS supports exploring energy reduction with and without performance constraints. SWEEP leverages application attributes, especially inter-task parallelism, together with hardware knobs to predict the impact of task distributions and local task scheduling decisions on the global execution time and energy consumption. SWEEP is designed for exploring various energy performance trade-offs. It first categorizes application execution into high parallelism and low parallelism phases, determined by instantaneous inter-task parallelism. It applies different task scheduling algorithms for high and low parallelism phases respectively, predicting trade-offs associated with different configurations and determining the best task distribution, local task schedules and DVFS settings accordingly. The four schedulers address the challenges of achieving energy efficiency in diverse computing environments and targeting various energy efficiency metrics for task-based parallel applications. They present a comprehensive approach of integrating predictive models and adaptive scheduling algorithms to fully exploit the capability of multi-core platforms for both energy savings and energy performance trade-offs.
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| 2. |
- Chen, Jing, 1995
(författare)
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Energy Efficient Task Mapping and Resource Management on Multi-core Architectures
- 2022
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Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Reducing energy consumption of parallel applications executing on chip multi- processors (CMPs) is important for green computing. Hardware vendors have been developing a variety of system features to support energy efficient computing, for example, integrating asymmetric core types on a single chip referred to as static asymmetry and supporting dynamic voltage and frequency scaling (DVFS) referred to as dynamic asymmetry. A common parallelization scheme to exploit CMPs is task parallelism, which can express a wide range of computations in the form of task directed acyclic graphs (DAGs). Existing studies that target energy efficient task scheduling have demonstrated the benefits of leveraging DVFS, particularly per-core DVFS. Their scheduling decisions are mainly based on heuristics, such as task criticality, task dependencies and workload sizes. To enable energy efficient task scheduling, we identify multiple crucial factors that influence energy consumption - varying task characteristics, exploitation of intra-task parallelism (task moldability), and task granularity - which we collectively refer to as task heterogeneity. Task heterogeneity and architecture asymmetry features together complicate the task scheduling problem, since the most energy efficient configuration of resource allocation and frequency setting varies with each task. Our analysis shows that leveraging task heterogeneity in conjunction with static and dynamic asymmetry provides significant opportunities for energy reduction. This thesis contributes two scheduling techniques - ERASE and STEER - that target different scenarios. ERASE focuses on fine-grained tasking and in environments where DVFS is not under user control. It leverages the insights of task characteristics, task moldability, and instantaneous task parallelism detection for guiding scheduling decisions. ERASE comprises four modules: online performance modeling, power profiling, core activity tracing and a task scheduler. Online performance modeling and power profiling provide runtime with execution time and power predictions. Core activity tracing offers the instantaneous task parallelism and the task scheduler combines these information to enable the energy predictions and dynamically determine the best resource allocation for each task during runtime. STEER focuses on environments where DVFS is under user control and where the platform comprises multiple asymmetric cores grouped into clusters. STEER explores how much energy could be potentially saved by leveraging static asymmetry, dynamic asymmetry and task heterogeneity in conjunction. STEER comprises two predictive models for performance and power predictions, and a task scheduler that utilizes models for energy predictions and then identifies the best resource allocation and frequency settings for tasks. Moreover, it applies adaptive scheduling techniques based on task granularity to manage DVFS overheads, and coordinates the cluster frequency settings to reduce interference from concurrent running tasks on cluster-based architectures. The evaluation on an NVIDIA Jetson TX2 shows that ERASE achieves 10% energy savings on average compared to the state-of-the-art DVFS-based schedulers and can adapt to external DVFS changes, and STEER consumes 38% less energy on average than both the state-of-the-art and ERASE.
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| 3. |
- Chen, Jing, 1995, et al.
(författare)
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ERASE: Energy Efficient Task Mapping and Resource Management for Work Stealing Runtimes
- 2022
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Ingår i: Transactions on Architecture and Code Optimization. - : Association for Computing Machinery (ACM). - 1544-3973 .- 1544-3566. ; 19:2
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Tidskriftsartikel (refereegranskat)abstract
- Parallel applications often rely on work stealing schedulers in combination with fine-grained tasking to achieve high performance and scalability. However, reducing the total energy consumption in the context of work stealing runtimes is still challenging, particularly when using asymmetric architectures with different types of CPU cores. A common approach for energy savings involves dynamic voltage and frequency scaling (DVFS) wherein throttling is carried out based on factors like task parallelism, stealing relations, and task criticality. This article makes the following observations: (i) leveraging DVFS on a per-task basis is impractical when using fine-grained tasking and in environments with cluster/chip-level DVFS; (ii) task moldability, wherein a single task can execute on multiple threads/cores via work-sharing, can help to reduce energy consumption; and (iii) mismatch between tasks and assigned resources (i.e., core type and number of cores) can detrimentally impact energy consumption. In this article, we propose EneRgy Aware SchedulEr (ERASE), an intra-application task scheduler on top of work stealing runtimes that aims to reduce the total energy consumption of parallel applications. It achieves energy savings by guiding scheduling decisions based on per-task energy consumption predictions of different resource configurations. In addition, ERASE is capable of adapting to both given static frequency settings and externally controlled DVFS. Overall, ERASE achieves up to 31% energy savings and improves performance by 44% on average, compared to the state-of-the-art DVFS-based schedulers.
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| 4. |
- Chen, Jing, 1995, et al.
(författare)
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JOSS: Joint Exploration of CPU-Memory DVFS and Task Scheduling for Energy Efficiency
- 2023
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Ingår i: 52nd International Conference on Parallel Processing (ICPP 2023). - 0000-0000. - 9798400708435 ; , s. 828-838
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Konferensbidrag (refereegranskat)abstract
- Energy-efficient execution of task-based parallel applications is crucial as tasking is a widely supported feature in many parallel programming libraries and runtimes. Currently, state-of-the-art proposals primarily rely on leveraging core asymmetry and CPU DVFS. Additionally, these proposals mostly use heuristics and lack the ability to explore the trade-offs between energy usage and performance. However, our findings demonstrate that focusing solely on CPU energy consumption for energy-efficient scheduling while neglecting memory energy consumption leaves room for further energy savings. We propose JOSS, a runtime scheduling framework that leverages both CPU DVFS and memory DVFS in conjunction with core asymmetry and task characteristics to enable energy-efficient execution of task-based applications. JOSS also enables the exploration of energy and performance trade-offs by supporting user-defined performance constraints. JOSS uses a set of models to predict task execution time, CPU and memory power consumption, and then selects the configuration for the tunable knobs to achieve the desired energy performance trade-off. Our evaluation shows that JOSS achieves 21.2% energy reduction, on average, compared to the state-of-the-art. Moreover, we demonstrate that even in the absence of a memory DVFS knob, taking energy consumption of both CPU and memory into account achieves better energy savings compared to only accounting for CPU energy. Furthermore, JOSS is able to adapt scheduling to reduce energy consumption while satisfying the desired performance constraints.
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| 5. |
- Chen, Jing, 1995, et al.
(författare)
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Scheduling Task-parallel Applications in Dynamically Asymmetric Environments
- 2020
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Ingår i: ACM International Conference Proceeding Series. - New York, NY, USA : ACM.
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Konferensbidrag (refereegranskat)abstract
- Shared resource interference is observed by applications as dynamic performance asymmetry. Prior art has developed approaches to reduce the impact of performance asymmetry mainly at the operating system and architectural levels. In this work, we study how application-level scheduling techniques can leverage moldability (i.e. flexibility to work as either single-threaded or multithreaded task) and explicit knowledge on task criticality to handle scenarios in which system performance is not only unknown but also changing over time. Our proposed task scheduler dynamically learns the performance characteristics of the underlying platform and uses this knowledge to devise better schedules aware of dynamic performance asymmetry, hence reducing the impact of interference. Our evaluation shows that both criticality-aware scheduling and parallelism tuning are effective schemes to address interference in both shared and distributed memory applications.
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| 6. |
- Chen, Jing, 1995, et al.
(författare)
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STEER: Asymmetry-aware Energy Efficient Task Scheduler for Cluster-based Multicore Architectures
- 2022
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Ingår i: Proceedings - Symposium on Computer Architecture and High Performance Computing. - 1550-6533. ; , s. 326-335
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Konferensbidrag (refereegranskat)abstract
- Reducing the energy consumption of parallel applications is becoming increasingly important. Current chip multiprocessors (CMPs) incorporate asymmetric cores (i.e. static asymmetry) and DVFS (i.e. dynamic asymmetry) to enable energy efficient execution. To reduce cost and complexity, designs typically organize asymmetric cores into core-clusters supporting the same DVFS setting across cores in a cluster. Recent approaches that focus on energy efficient scheduling of task-based parallel applications predominantly rely on dynamic asymmetry, particularly per-core DVFS, for reducing energy. More importantly, they do not consider the impact of task heterogeneity (i.e. varying task characteristics, intra-task parallelism and task granularity) in conjunction with the dynamic and static asymmetries provided by the platform. Together, these provide significant opportunities for further energy savings. In this work we propose STEER, a framework that enables energy efficient execution of task-based parallel applications by leveraging static asymmetry, dynamic asymmetry and task heterogeneity. STEER utilizes a combination of models and heuristics to predict the execution time and power consumption and determine core type, number of cores and frequency for running tasks. Our evaluation shows that STEER achieves 38% energy reduction on average compared to the state-of-the-art approaches.
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| 7. |
- Chen, Jing, 1995, et al.
(författare)
-
SWEEP: Adaptive Task Scheduling for Exploring Energy Performance Trade-offs
- 2024
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Ingår i: Proceedings - 2024 IEEE International Parallel and Distributed Processing Symposium, IPDPS 2024. ; , s. 325-336
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Konferensbidrag (refereegranskat)abstract
- Energy efficiency is becoming a major concern when running parallel computing systems owing to its impact on system reliability and operating cost. Recent works, that focus on energy efficient execution of task-based parallel applications on multi-core systems, leverage a subset of architectural features (core asymmetry, CPU DVFS and memory DVFS) and application attributes (inter-task parallelism, intra-task parallelism and task characteristics) to achieve this goal. More importantly, they have a fixed target metric and do not provide the flexibility to explore energy performance trade-offs (EPTO). We propose SWEEP, a task scheduler that leverages all the aforementioned architectural knobs and application attributes to facilitate EPTO exploration. SWEEP, at a high level, uses a combination of models and heuristics and works by splitting application execution into high parallelism and low parallelism phases. It then uses an adaptive task distribution algorithm, specific to the phase type, that leverages model-based predictions to determine the best task schedule and the DVFS settings for the phase. Moreover, SWEEP is able to flexibly target various EPTO metrics, a feature that is not supported by other proposals. Our evaluation shows that SWEEP achieves 19.9%, 36.4% and 9.5% reduction on average in terms of EDP, ED2P and E2DP compared to the best performing state-of-the-art.
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| 8. |
- Komissarov, Ivan, et al.
(författare)
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Femtosecond Circular Photogalvanic Effect in FeCo/graphene nanobilayers
- 2023
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Ingår i: International Conference on Infrared, Millimeter, and Terahertz Waves, IRMMW-THz. - 2162-2027 .- 2162-2035.
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Konferensbidrag (refereegranskat)abstract
- We demonstrate the generation of THz transients from FeCo/graphene heterostructure triggered by circular polarized femtosecond pulsed laser emission originated from the circular photgalvanic effect.
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| 9. |
- Mao, Jiwei, 1990, et al.
(författare)
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Fine-tuning of p-coumaric acid synthesis to increase (2S)-naringenin production in yeast
- 2023
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Ingår i: Metabolic Engineering. - 1096-7176 .- 1096-7184. ; 79, s. 192-202
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Tidskriftsartikel (refereegranskat)abstract
- (2S)-Naringenin is a key precursor for biosynthesis of various high-value flavonoids and possesses a variety of nutritional and pharmaceutical properties on human health. Systematic optimization approaches have been employed to improve (2S)-naringenin production in different microbial hosts. However, very few studies have focused on the spatiotemporal distribution of (2S)-naringenin and the related pathway intermediate p-coumaric acid, which is an important factor for efficient production. Here, we first optimized the (2S)-naringenin biosynthetic pathway by alleviating the bottleneck downstream of p-coumaric acid and increasing malonyl-CoA supply, which improved (2S)-naringenin production but significant accumulation of p-coumaric acid still existed extracellularly. We thus established a dual dynamic control system through combining a malonyl-CoA biosensor regulator and an RNAi strategy, to autonomously control the synthesis of p-coumaric acid with the supply of malonyl-CoA. Furthermore, screening potential transporters led to identification of Pdr12 for improved (2S)-naringenin production and reduced accumulation of p-coumaric acid. Finally, a titer of 2.05 g/L (2S)-naringenin with negligible accumulation of p-coumaric acid was achieved in a fed batch fermentation. Our work highlights the importance of systematic control of pathway intermediates for efficient microbial production of plant natural products.
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| 10. |
- Salami, B., et al.
(författare)
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LEGaTO: Low-Energy, Secure, and Resilient Toolset for Heterogeneous Computing
- 2020
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Ingår i: PROCEEDINGS OF THE 2020 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE 2020). - 1530-1591. - 9783981926347 ; , s. 169-174
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Konferensbidrag (refereegranskat)abstract
- The LEGaTO project leverages task-based programming models to provide a software ecosystem for Made in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines. The aim is to attain one order of magnitude energy savings from the edge to the converged cloud/HPC, balanced with the security and resilience challenges. LEGaTO is an ongoing three-year EU H2020 project started in December 2017.
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