| 1. |
- Axer, Philip, et al.
(författare)
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Building Timing Predictable Embedded Systems
- 2012
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Rapport (övrigt vetenskapligt/konstnärligt)abstract
- A large class of embedded systems is distinguished from general purpose computing systems by the need to satisfy strict requirements on timing, often under constraints on available resources. Predictable system design is concerned with the challenge of building systems for which timing requirements can be guaranteed a priori. Perhaps paradoxically, this problem has become more difficult by the introduction of performance-enhancing architectural elements, such as caches, pipelines, and multithreading, which introduce a large degree of nondeterminism and make guarantees harder to provide. The intention of this paper is to summarize current state-of-the-art in research concerning how to build predictable yet performant systems. We suggest precise definitions for the concept of “predictability”, and present predictability concerns at different abstractions levels in embedded software design. First, we consider timing predictability of processor instruction sets. Thereafter, We consider how programming languages can be equipped with predictable timing semantics, covering both a language-based approach based on the synchronous paradigm, as well as an environment that provides timing semantics for a mainstream programming language (in this case C). We present techniques for achieving timing predictability on multicores. Finally we discuss how to handle predictability at the level of networked embedded systems, where randomly occurring errors must be considered.
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| 2. |
- Chattopadhyay, Sudipta, et al.
(författare)
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A Unified WCET Analysis Framework for Multicore Platforms
- 2014
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Ingår i: ACM Transactions on Embedded Computing Systems. - : Association for Computing Machinery (ACM). - 1539-9087 .- 1558-3465. ; 13:124
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Tidskriftsartikel (refereegranskat)abstract
- With the advent of multicore architectures, worst-case execution time (WCET) analysis has become an increasingly difficult problem. In this article, we propose a unified WCET analysis framework for multicore processors featuring both shared cache and shared bus. Compared to other previous works, our work differs by modeling the interaction of shared cache and shared bus with other basic microarchitectural components (e.g., pipeline and branch predictor). In addition, our framework does not assume a timing anomaly free multicore architecture for computing the WCET. A detailed experiment methodology suggests that we can obtain reasonably tight WCET estimates in a wide range of benchmark programs.
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| 3. |
- Falk, Sven, et al.
(författare)
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Brain area-specific effect of TGF-beta signaling on Wnt-dependent neural stem cell expansion
- 2008
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Ingår i: Cell Stem Cell. - : Elsevier BV. - 1934-5909. ; 2:5, s. 472-483
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Tidskriftsartikel (refereegranskat)abstract
- Regulating the choice between neural stem cell maintenance versus differentiation determines growth and size of the developing brain. Here we identify TGF-beta signaling as a crucial factor controlling these processes. At early developmental stages, TGF-beta signal activity is localized close to the ventricular surface of the neuroepithelium. In the midbrain, but not in the forebrain, Tgfbr2 ablation results in ectopic expression of Wnt1/beta-catenin and FGF8, activation of Wnt target genes, and increased proliferation and horizontal expansion of neuroepithelial cells due to shortened cell-cycle length and decreased cell-cycle exit. Consistent with this phenotype, self-renewal of mutant neuroepithelial stem cells is enhanced in the presence of FGF and requires Wnt signaling. Moreover, TGF-beta signal activation counteracts Wnt-incluced proliferation of midbrain neuroepithelial cells. Thus, TGF-beta signaling controls the size of a specific brain area, the dorsal midbrain, by antagonizing canonical Wnt signaling and negatively regulating self-renewal of neuroepithelial stem cells.
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