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Search: WFRF:(Haghbayan M. H)

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1.
  • Haghbayan, M. -H, et al. (author)
  • Power-aware online testing of manycore systems in the dark silicon era
  • 2015
  • In: Proceedings -Design, Automation and Test in Europe, DATE. - : IEEE conference proceedings. - 9783981537048 ; , s. 435-440
  • Conference paper (peer-reviewed)abstract
    • Online defect screening techniques to detect runtime faults are becoming a necessity in current and near future technologies. At the same time, due to aggressive technology scaling into the nanometer regime, power consumption is becoming a significant burden. Most of today's chips employ advanced power management features to monitor the power consumption and apply dynamic power budgeting (i.e., capping) accordingly to prevent over-heating of the chip. Given the notable power dissipation of existing testing methods, one needs to efficiently manage the power budget to cover test process of a many-core system in runtime. In this paper, we propose a power-aware online testing method for many-core systems benefiting from advanced power management capabilities. The proposed power-aware method uses non-intrusive online test scheduling strategy to functionally test the cores in their idle period. In addition, we propose a test-aware utilization-oriented runtime mapping technique that considers the utilization of cores and their test criticality in the mapping process. Our extensive experimental results reveal that the proposed power-aware online testing approach can efficiently utilize temporarily free resources and available power budget for the testing purposes, within less than 1% penalty on system throughput for the 16nm technology.
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2.
  • Yasin, J. N., et al. (author)
  • Dynamic Formation Reshaping Based on Point Set Registration in a Swarm of Drones
  • 2021
  • In: Advances in Intelligent Systems and Computing. - Cham : Springer Nature. ; , s. 577-588
  • Conference paper (peer-reviewed)abstract
    • This work focuses on the formation reshaping in an optimized manner in autonomous swarm of drones. Here, the two main problems are: 1) how to break and reshape the initial formation in an optimal manner, and 2) how to do such reformation while minimizing the overall deviation of the drones and the overall time, i.e. without slowing down. To address the first problem, we introduce a set of routines for the drones/agents to follow while reshaping to a secondary formation shape. And the second problem is resolved by utilizing the temperature function reduction technique, originally used in the point set registration process. The goal is to be able to dynamically reform the shape of multi-agent based swarm in near-optimal manner while going through narrow openings between, for instance obstacles, and then bringing the agents back to their original shape after passing through the narrow passage using point set registration technique.
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3.
  • Haghbayan, M. -H, et al. (author)
  • Dark silicon aware power management for manycore systems under dynamic workloads
  • 2014
  • In: 2014 32nd IEEE International Conference on Computer Design, ICCD 2014. ; , s. 509-512
  • Conference paper (peer-reviewed)abstract
    • Dark Silicon denotes the phenomenon that, due to thermal and power constraints, the fraction of transistors that can operate at full frequency is decreasing with each technology generation. We propose a PID (Proportional Integral Derivative) controller based dynamic power management method that considers an upper bound on power consumption (called the Thermal Design Power (TDP)). To avoid violation of the TDP constraint for manycore systems running highly dynamic workloads, it provides fine-grained DVFS (Dynamic Voltage and Frequency Scaling) including near-threshold operation. In addition, the method distinguishes applications with hard Real-Time, soft Real-Time and no Real-Time constraints and treats them with appropriate priorities. In simulations with dynamic workloads mixed-critical application profiles, we show that the method is effective in honoring the TDP bound and it can boost system throughput by over 43% compared to a naive TDP scheduling policy.
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4.
  • Haghbayan, M. -H, et al. (author)
  • MapPro : Proactive runtime mapping for dynamic workloads by quantifying ripple effect of applications on networks-on-chip
  • 2015
  • In: Proceedings - 2015 9th IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2015. - New York, NY, USA : Association for Computing Machinery (ACM). - 9781450333962
  • Conference paper (peer-reviewed)abstract
    • Increasing dynamic workloads running on NoC-based many-core systems necessitates efficient runtime mapping strategies. With an unpredictable nature of application profiles, selecting a rational region to map an incoming application is an NP-hard problem in view of minimizing congestion and maximizing performance. In this paper, we propose a proactive region selection strategy which prioritizes nodes that offer lower congestion and dispersion. Our proposed strategy, MapPro, quantitatively represents the propagated impact of spatial availability and dispersion on the network with every new mapped application. This allows us to identify a suitable region to accommodate an incoming application that results in minimal congestion and dispersion. We cluster the network into squares of different radii to suit applications of different sizes and proactively select a suitable square for a new application, eliminating the overhead caused with typical reactive mapping approaches. We evaluated our proposed strategy over different traffic patterns and observed gains of up to 41% in energy efficiency, 28% in congestion and 21% dispersion when compared to the state-of-the-art region selection methods. Copyright 2015 ACM.
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5.
  • Haghbayan, M. -H, et al. (author)
  • Online software-based self-testing in the dark silicon era
  • 2017
  • In: The Dark Side of Silicon. - Cham : Springer. - 9783319315966 - 9783319315942 ; , s. 259-287
  • Book chapter (peer-reviewed)abstract
    • Aggressive technology scaling and intensive computations have caused acceleration in the aging and wear-out process of digital systems, hence leading to an increased occurrence of premature permanent faults. Online testing techniques are becoming a necessity in current and near future digital systems. However, state-of-the-art techniques are not aware of the other digital systems’ power/performance requirements that exist in modern multi-/many-core systems. This chapter presents an approach for power-aware non-intrusive online testing in many-core systems. The approach aims at scheduling at runtime Software-Based Self-Test (SBST) routines on the various cores to exploit their idle periods in order to benefit the potentially available power budget and minimize the performance degradation. Furthermore, a criticality metric is used to identify and rank cores that need testing at a time and power and reliability issues related to the testing at different voltage and frequency levels are taken into account. Experimental results show that the proposed approach can (1) efficiently perform cores’ testing, within less than 1?% penalty on system throughput and by dedicating only 2?% of the actual consumed power, (2) adapt to the current stress level of the cores by using the utilization metric, and (3) cover all the voltage and frequency levels during the various tests.
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6.
  • Kanduri, A., et al. (author)
  • Dark silicon patterning : Efficient power utilization through run-time mapping
  • 2017
  • In: The Dark Side of Silicon. - Cham : Springer. - 9783319315966 - 9783319315942 ; , s. 237-258
  • Book chapter (peer-reviewed)abstract
    • An efficient run-time application mapping approach can considerably enhance resource utilization and mitigate the dark silicon phenomenon. In this chapter, we present a dark silicon aware run-time application mapping approach that patterns active cores alongside the inactive cores in order to evenly distribute power density across the chip. This approach leverages dark silicon to balance the temperature of active cores to provide higher power budget and better resource utilization, within a safe peak operating temperature. In contrast to exhaustive search based mapping techniques, the proposed agile heuristic approach has a negligible run-time overhead. This patterning strategy yields a surplus power budget of up to 17?% along with an improved throughput of up to 21?% in comparison with other state-of-the-art run-time mapping strategies, while the surplus budget is as high as 40?% compared to worst case scenarios.
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7.
  • Karimi, E., et al. (author)
  • Accelerated On-chip Communication Test Methodology Using a Novel High-Level Fault Model
  • 2015
  • In: Proceedings - IEEE 9th International Symposium on Embedded Multicore/Manycore SoCs, MCSoC 2015. - : Institute of Electrical and Electronics Engineers (IEEE). - 9781479986699 ; , s. 283-288
  • Conference paper (peer-reviewed)abstract
    • A novel high-level fault model to accelerate test process of on-chip communication structures for SoCs is proposed. To this end, bus components are modeled using a simple, yet efficient, graph-based technique and all possible faults on the graph nodes are probed. The proposed method is optimized in terms of test time. The method applies the same test process to all interconnects and components. Compared to the conventional stuck-at fault testing methods, our extensive simulations on the AMBA-AHB bus architecture reveal that our test method can help in achieving a significant test speed improvement.
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8.
  • Rahmani, A. M., et al. (author)
  • Multi-objective power management for CMPs in the dark silicon age
  • 2017
  • In: The Dark Side of Silicon. - Cham : Springer. - 9783319315966 - 9783319315942 ; , s. 191-216
  • Book chapter (peer-reviewed)abstract
    • New power management challenges in networked many-core systems arise when limitations of the dark silicon era come into reality. The main goal in the power management process is to achieve optimal power-performance efficiency considering thermal design power (TDP) budget. This necessitates: (1) monitoring several system characteristics including both communication and computation aspects, (2) categorizing, prioritizing, and processing the information in an intelligent way, and (3) controlling a rich set of actuators. More precisely, a comprehensive Observe-Decide-Act (ODA) loop based multi-objective control approach is needed, which has access to a rich set of sensors and actuators. In this chapter, we first identify a necessary set of system parameters for monitoring such as an upper limit on total power consumption, dynamic behavior of workloads, utilization of processing elements, per-core power consumption, load on network-on-chip (NoC), etc. We also discuss essential actuators needed for the power management process together with a multi-objective and dark silicon aware power management policy that is able to simultaneously consider all the mentioned parameters. As actuator, fine-grained voltage and frequency scaling is utilized, including near-threshold operation, per-core power gating, as well as scheduler-level actuation to maximize the system throughput while honoring the power budget.
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9.
  • Mohamed, S. A. S., et al. (author)
  • A Survey on Odometry for Autonomous Navigation Systems
  • 2019
  • In: IEEE Access. - : Institute of Electrical and Electronics Engineers Inc.. - 2169-3536. ; 7, s. 97466-97486
  • Journal article (peer-reviewed)abstract
    • The development of a navigation system is one of the major challenges in building a fully autonomous platform. Full autonomy requires a dependable navigation capability not only in a perfect situation with clear GPS signals but also in situations, where the GPS is unreliable. Therefore, self-contained odometry systems have attracted much attention recently. This paper provides a general and comprehensive overview of the state of the art in the field of self-contained, i.e., GPS denied odometry systems, and identifies the out-coming challenges that demand further research in future. Self-contained odometry methods are categorized into five main types, i.e., wheel, inertial, laser, radar, and visual, where such categorization is based on the type of the sensor data being used for the odometry. Most of the research in the field is focused on analyzing the sensor data exhaustively or partially to extract the vehicle pose. Different combinations and fusions of sensor data in a tightly/loosely coupled manner and with filtering or optimizing fusion method have been investigated. We analyze the advantages and weaknesses of each approach in terms of different evaluation metrics, such as performance, response time, energy efficiency, and accuracy, which can be a useful guideline for researchers and engineers in the field. In the end, some future research challenges in the field are discussed.
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10.
  • Mohamed, S. A. S., et al. (author)
  • Asynchronous Corner Tracking Algorithm Based on Lifetime of Events for DAVIS Cameras
  • 2020
  • In: 15th International Symposium on Visual Computing, ISVC 2020. - Cham : Springer Science and Business Media Deutschland GmbH. ; , s. 530-541
  • Conference paper (peer-reviewed)abstract
    • Event cameras, i.e., the Dynamic and Active-pixel Vision Sensor (DAVIS) ones, capture the intensity changes in the scene and generates a stream of events in an asynchronous fashion. The output rate of such cameras can reach up to 10 million events per second in high dynamic environments. DAVIS cameras use novel vision sensors that mimic human eyes. Their attractive attributes, such as high output rate, High Dynamic Range (HDR), and high pixel bandwidth, make them an ideal solution for applications that require high-frequency tracking. Moreover, applications that operate in challenging lighting scenarios can exploit from the high HDR of event cameras, i.e., 140 dB compared to 60 dB of traditional cameras. In this paper, a novel asynchronous corner tracking method is proposed that uses both events and intensity images captured by a DAVIS camera. The Harris algorithm is used to extract features, i.e., frame-corners from keyframes, i.e., intensity images. Afterward, a matching algorithm is used to extract event-corners from the stream of events. Events are solely used to perform asynchronous tracking until the next keyframe is captured. Neighboring events, within a window size of 5 × 5 pixels around the event-corner, are used to calculate the velocity and direction of extracted event-corners by fitting the 2D planar using a randomized Hough transform algorithm. Experimental evaluation showed that our approach is able to update the location of the extracted corners up to 100 times during the blind time of traditional cameras, i.e., between two consecutive intensity images.
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11.
  • Mohamed, S. A. S., et al. (author)
  • DBA-Filter : A Dynamic Background Activity Noise Filtering Algorithm for Event Cameras
  • 2022
  • In: Proceedings of the 2021 Computing Conference, Volume 1. - Cham : Springer Science and Business Media Deutschland GmbH. ; , s. 685-696
  • Conference paper (peer-reviewed)abstract
    • Newly emerged dynamic vision sensors (DVS) offer a great potential over traditional sensors (e.g. CMOS) since they have a high temporal resolution in the order of μs, ultra-low power consumption and high dynamic range up to 140 dB compared to 60 dB in frame cameras. Unlike traditional cameras, the output of DVS cameras is a stream of events that encodes the location of the pixel, time, and polarity of the brightness change. An event is triggered when the change of brightness, i.e. log intensity, of a pixel exceeds a certain threshold. The output of event cameras often contains a significant amount of noise (outlier events) alongside the signal (inlier events). The main cause of that is transistor switch leakage and noise. This paper presents a dynamic background activity filtering, called DBA-filter, for event cameras based on an adaptation of the K-nearest neighbor (KNN) algorithm and the optical flow. Results show that the proposed algorithm is able to achieve a high signal to noise ratio up to 13.64 dB. 
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12.
  • Mohamed, S. A. S., et al. (author)
  • Dynamic resource-aware corner detection for bio-inspired vision sensors
  • 2020
  • In: 2020 25th International Conference on Pattern Recognition, (ICPR). - : Institute of Electrical and Electronics Engineers (IEEE). ; , s. 10465-10472
  • Conference paper (peer-reviewed)abstract
    • Event-based cameras are vision devices that transmit only brightness changes with low latency and ultra-low power consumption. Such characteristics make event-based cameras attractive in the field of localization and object tracking in resource-constrained systems. Since the number of generated events in such cameras is huge, the selection and filtering of the incoming events are beneficial from both increasing the accuracy of the features and reducing the computational load. In this paper, we present an algorithm to detect asynchronous corners form a stream of events in real-time on embedded systems. The algorithm is called the Three Layer Filtering-Harris or TLF-Harris algorithm. The algorithm is based on an events' filtering strategy whose purpose is 1) to increase the accuracy by deliberately eliminating some incoming events, i.e., noise and 2) to improve the real-time performance of the system, i.e., preserving a constant throughput in terms of input events per second, by discarding unnecessary events with a limited accuracy loss. An approximation of the Harris algorithm, in turn, is used to exploit its high-quality detection capability with a low-complexity implementation to enable seamless real-time performance on embedded computing platforms. The proposed algorithm is capable of selecting the best corner candidate among neighbors and achieves an average execution time savings of 59% compared with the conventional Harris score. Moreover, our approach outperforms the competing methods, such as eFAST, eHarris, and FA-Harris, in terms of real-time performance, and surpasses Arc* in terms of accuracy.
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13.
  • Teräväinen, S., et al. (author)
  • Software-based on-chip thermal sensor calibration for DVFS-enabled many-core systems
  • 2015
  • In: Proceedings of the 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFTS 2015. - : Institute of Electrical and Electronics Engineers (IEEE). - 9781509003129 ; , s. 35-40
  • Conference paper (peer-reviewed)abstract
    • Due to increase in power density and temperature gradient in modern chips, multiple thermal sensors are deployed on the chip area to provide realtime temperature feedback for fine-grained dynamic thermal management (DTM) techniques. Thermal sensor accuracy is extremely prone to intra-die process variation and aging phenomena, and its report gradually drifts from the nominal value. This necessitates efficient calibration techniques to be applied before the sensor values are used. In addition, in modern many-core systems which are often enabled with dynamic voltage and frequency scaling (DVFS), thermal sensors located on cores are sensitive to the core's current voltage-frequency (VF) level, meaning that dedicated calibration is needed for each VF level. In this paper, we propose a general-purpose software-based auto-calibration strategy for thermal sensors without using any hardware infrastructures for DVFS-enabled many-core systems. We adopt a 2-point calibration method for calculating the calibration constants of each thermal sensor at each VF level. We demonstrate the efficiency of the proposed calibration strategy on a many-core platform, Intel's Single-chip Cloud Computer (SCC), covering all voltage and frequency combinations on the platform.
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14.
  • Yasin, J. N., et al. (author)
  • Low-cost ultrasonic based object detection and collision avoidance method for autonomous robots
  • 2021
  • In: International Journal of Information Technology (Singapore). - : Springer Nature. - 2511-2104 .- 2511-2112. ; 13:1, s. 97-107
  • Journal article (peer-reviewed)abstract
    • This work focuses on the development of an effective collision avoidance algorithm that detects and avoids obstacles autonomously in the vicinity of a potential collision by using a single ultrasonic sensor and controlling the movement of the vehicle. The objectives are to minimise the deviation from the vehicle’s original path and also the development of an algorithm utilising one of the cheapest sensors available for very lost cost systems. For instance, in a scenario where the main ranging sensor malfunctions, a backup low cost sensor is required for safe navigation of the vehicle while keeping the deviation to a minimum. The developed algorithm utilises only one ultrasonic sensor and approximates the front shape of the detected object by sweeping the sensor mounted on top of the unmanned vehicle. In this proposed approach, the sensor is rotated for shape approximation and edge detection instead of moving the robot around the encountered obstacle. It has been tested in various indoor situations using different shapes of objects, stationary objects, moving objects, and soft or irregularly shaped objects. The results show that the algorithm provides satisfactory outcomes by entirely avoiding obstacles and rerouting the vehicle with a minimal deviation.
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15.
  • Yasin, J N, et al. (author)
  • Navigation of Autonomous Swarm of Drones Using Translational Coordinates
  • 2020
  • In: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). - Cham : Springer. ; , s. 353-362
  • Conference paper (other academic/artistic)abstract
    • This work focuses on an autonomous swarm of drones, a multi-agent system, where the leader agent has the capability of intelligent decision making while the other agents in the swarm follow the leader blindly. The proposed algorithm helps with cost cutting especially in the multi-drone systems, i.e., swarms, by reducing the power consumption and processing requirements of each individual agent. It is shown that by applying a pre-specified formation design with feedback cross-referencing between the agents, the swarm as a whole can not only maintain the desired formation and navigate but also avoid collisions with obstacles and other drones. Furthermore, the power consumed by the nodes in the considered test scenario, is reduced by 50% by utilising the proposed methodology. 
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