| 1. |
- Esteve, Romain, et al.
(author)
-
Electrical properties of MOS structures based on 3C-SiC(111) epilayers grown by Vapor-Liquid-Solid Transport and Chemical-Vapor Deposition on 6H-SiC(0001)
- 2010
-
In: AIP Conference Proceedings. - : AIP Publishing. - 9780735408470 ; , s. 55-58
-
Conference paper (peer-reviewed)abstract
- The electrical properties of post-oxidized PECVD oxides in wet oxygen based on 3C-SiC(111) epilayers grown by Vapor-Liquid-Solid and Chemical-Vapor-Deposition mechanisms on 6H-SiC(0001) have been studied. Different 6H-SiC(0001) samples exhibiting diverse crystal orientations (on-axis, 2 degrees off-axis) and growth conditions were regarded. A comparative study of oxide qualities has been carried out via capacitance and conductance measurements (C-G-V). Achieved interface traps densities and effective oxide charges were compared for the different samples. Reliability issues have been considered via current measurements (I-V and TZDB) and statistical data treatment techniques (Weibull plots). Oxides based on 3C-SiC layer grown by a process combining VLS and CVD methods demonstrated low interface states densities D-it of 1.2 x 10(10) eV(-1)cm(-2) at 0.63 eV below the conduction band and fixed oxide charges Q(eff)/(g) estimated to -0.1 x 10(11) cm(-2)
|
|
| 2. |
- Lorenzzi, Jean, et al.
(author)
-
3C-SiC MOS based devices : from material growth to device characterization
- 2011
-
In: Silicon carbide and related materials 2010. - : Trans Tech Publications, Ltd.. ; , s. 433-
-
Conference paper (peer-reviewed)abstract
- In this work we report on the growth and preparation of 3C-SiC(111) material for metal-oxide-semiconductor (MOS) application. In order to achieve reasonable material quality to prepare MOS capacitors several and crucial steps are needed: 1) heteroepitaxial growth of high quality 3C-SiC(111) layer by vapour-liquid-solid mechanism on 6H-SiC(0001) substrate, 2) surface polishing, 3) homoepitaxial re-growth by chemical vapour deposition and 4) use of an advanced oxidation process combining plasma enhanced chemical vapour deposition (PECVD) SiO2 and short post-oxidation steps in wet oxygen. Combining all these processes the interface traps density (D-it)can be drastically decreased down to 1.2 x 10(10) eV(-1)cm(-2) at 0.63 eV below the conduction band. To our knowledge, these values are the best ever reported for SiC material in general and 3C-SiC in particular.
|
|
| 3. |
- Marinova, Maya, et al.
(author)
-
Influence of Post-Growth Annealing on the Defects Nature and Distribution in VLS Grown (111) 3C-SiC Layers
- 2011
-
In: Silicon Carbide and Related Materials 2010. ; , s. 241-244
-
Conference paper (peer-reviewed)abstract
- The current communication focuses on the influence of a post-growth annealing on the evolution of defects inside (111) 3C-SiC layers grown by the Vapour Liquid Solid (VLS) mechanism in SiGe melts on Si-face on- and off axis 6H-SiC substrates. The layers are studied by Transmission Electron Microscopy (TEM) and Low Temperature Photoluminescence (LTPL). It was found that the growth on off-axis substrates results in a 3C-SiC layer containing mainly stacking faults (SFs) and microtwins (MT). The density of MT lamellae and SFs reduces in the layers grown on the on-axis substrate compared to off-axis substrate. In the layers grown on off-axis substrates the annealing strongly reduces the density of SFs inclined to the 3C/6H-SiC interface. Additionally, 3C to 6H polytypic transformation appears only at the interface, most probably starting from substrate step edges. This was only seen on off-axis seed since the step edges are more.
|
|
