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Träfflista för sökning "WFRF:(Lapisa Martin) "

Sökning: WFRF:(Lapisa Martin)

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1.
  • Zimmer, Fabian, et al. (författare)
  • Fabrication of large-scale mono-crystalline silicon micro-mirror arrays using adhesive wafer transfer bonding
  • 2009
  • Ingår i: Proceedings of SPIE - The International Society for Optical Engineering. - : SPIE. ; , s. 720807-
  • Konferensbidrag (refereegranskat)abstract
    • Today,spatial light modulators (SLMs) based on individually addressable micro-mirrors playan important role for use in DUV lithography and adaptiveoptics. Especially the mirror planarity and stability are important issuesfor these applications. Mono-crystalline silicon as mirror material offers agreat possibility to combine the perfect surface with the goodmechanical properties of the crystalline material. Nevertheless, the challenge isthe integration of mono-crystalline silicon in a CMOS process withlow temperature budget (below 450°C) and restricted material options. Thus,standard processes like epitaxial growth or re-crystallization of poly-silicon cannotbe used. We will present a CMOS-compatible approach, using adhesivewafer transfer bonding with Benzocyclobutene (BCB) of a 300nm thinsilicon membrane, located on a SOI-donor wafer. After the bondprocess, the SOI-donor wafer is grinded and spin etched toremove the handle silicon and the buried oxide layer, whichresults in a transfer of the mono-crystalline silicon membrane tothe CMOS wafer. This technology is fully compatible for integrationin a CMOS process, in order to fabricate SLMs, consistingof one million individually addressable mono-crystalline silicon micro-mirrors. The mirrors,presented here, have a size of 16×16 µm2. Deflection isachieved by applying a voltage between the mirrors and theunderlying electrodes of the CMOS electronics. In this paper, wewill present the fabrication process as well as first investigationsof the mirror properties.
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2.
  • Zimmer, Fabian, et al. (författare)
  • Fabrication of mono-crystalline Silicon Micro-mirror Arrays using adhesive Wafer Transfer Bonding
  • 2009
  • Ingår i: MikroSystemTechnik KONGRESS 2009.
  • Konferensbidrag (övrigt vetenskapligt/konstnärligt)abstract
    • Spatial light modulators (SLMs) based on indivvidually addressable micro-mirrors do show an increased use in projection displays, DUV lithography and adaptive optics. Mirror planarity and deflection characteristics are important issues for these applications. Mono-crystalline silicon as mirror material offers a great possibility to combine the perfect surface with the good mechanical properties of the crystalline material. Nevertheless, the challenge is the integration of mono-crystalline silicon in a CMOS process with low temperature budget (below 450deg C) and restricted material options. Thus, standard processes like epitaxial growth or re-crystallization of poly-silicon cannot be used. We will present a CMOS-compatible approach, using adhesive wafer transfer bonding with Benzocyclobutene (BCB) of a 300nm thin silicon membrane, located on a SOI donor wafer. After the bond process, the SOI donor wafer is grinded and spin etched to remove the handle silicon and the buried oxide layer, which results in a transfer of the mono-crystalline silicon membrane to the CMOS wafer. This technology is fully compatible for integration in a CMOS process, in order to fabricate SLMs, consisting of one million indivvidually addressable mono-crystalline silicon micro-mirrors. In this paper, we present fabrication process as well as first results of SLM devices with a pixel pitch of 16 micrometer.
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3.
  • Zimmer, Fabian, et al. (författare)
  • One-Megapixel Monocrystalline-Silicon Micromirror Array on CMOS Driving Electronics Manufactured With Very Large-Scale Heterogeneous Integration
  • 2011
  • Ingår i: Journal of microelectromechanical systems. - 1057-7157 .- 1941-0158. ; 20:3, s. 564-572
  • Tidskriftsartikel (refereegranskat)abstract
    • In this paper, we demonstrate the first high-resolution spatial-light-modulator chip with 1 million tilting micromirrors made of monocrystalline silicon on analog high-voltage complementary metal-oxide-semiconductor driving electronics. This device, as result of a feasibility study, shows good optical and excellent mechanical properties. The micromirrors exhibit excellent surface properties, with a surface roughness below 1-nm root mean square. Actuated micromirrors show no imprinting behavior and operate drift free. Very large-scale heterogeneous integration was used to fabricate the micromirror arrays. The detailed fabrication process is presented in this paper, together with a characterization of the SLM devices. Large arrays of individually controllable micromirrors are the enabling component in high-perfomance mask-writing systems and promising for high throughput deep-ultraviolet maskless lithography systems. The adoption of new materials with enhanced characteristics is critical in meeting the challenging demands with regard to surface quality and operation stability in the future. Very large-scale heterogeneous integration may enable virtually any solid-state material to be integrated together with CMOS electronics. [2010-0272]
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4.
  • Zimmer, Fabian, et al. (författare)
  • Very large scale heterogeneous system integration for 1-megapixel mono-crystalline silicon micro-mirror array on CMOS driving electronics
  • 2011
  • Ingår i: 2011 IEEE 24th International Conference on Micro Electro Mechanical Systems (MEMS). - 9781424496327 ; , s. 736-739
  • Konferensbidrag (refereegranskat)abstract
    • In this paper we demonstrate the first high mirror-count 1-level spatial light modulator (SLM) chip with 1 million tilting micro-mirrors made of mono-crystalline silicon on analogue, high-voltage CMOS driving electronics. The device from a feasibility study shows good optical and excellent mechanical properties. The micro-mirrors exhibit excellent surface properties with a surface roughness below 1 nm RMS, actuated micro-mirrors show no imprinting behavior and operate drift-free. Very large scale heterogeneous system integration was used to fabricate the micro-mirror array; the process is presented in this paper together with a characterization of the fabricated device.
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7.
  • Aparicio, Francisco J., et al. (författare)
  • Dye-based photonic sensing systems
  • 2016
  • Ingår i: Sensors and actuators. B, Chemical. - : Elsevier. - 0925-4005 .- 1873-3077. ; 228, s. 649-657
  • Tidskriftsartikel (refereegranskat)abstract
    • We report on dye-based photonic sensing systems which are fabricated and packaged at wafer scale. For the first time luminescent organic nanocomposite thin-films deposited by plasma technology are integrated in photonic sensing systems as active sensing elements. The realized dye-based photonic sensors include an environmental NO2 sensor and a sunlight ultraviolet light (UV) A+B sensor. The luminescent signal from the nanocomposite thin-films responds to changes in the environment and is selectively filtered by a photonic structure consisting of a Fabry-Perot cavity. The sensors are fabricated and packaged at wafer-scale, which makes the technology viable for volume manufacturing. Prototype photonic sensor systems have been tested in real-world scenarios. (C) 2016 Elsevier B.V. All rights reserved.
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9.
  • Fischer, Andreas C., 1982-, et al. (författare)
  • Heterogeneous Integration for Optical MEMS
  • 2010
  • Ingår i: 2010 23RD ANNUAL MEETING OF THE IEEE PHOTONICS SOCIETY. - NEW YORK : IEEE. - 9781424453696 ; , s. 487-488
  • Konferensbidrag (refereegranskat)abstract
    • In this paper we present different large-scale heterogeneous integration technologies for optical MEMS that enable the integration of optical MEMS with standard CMOS-based ICs. Examples that are presented include various monocrystalline silicon micro-mirror arrays and infrared bolometer arrays.
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10.
  • Fischer, Andreas C., 1982-, et al. (författare)
  • Integrating MEMS and ICs
  • 2015
  • Ingår i: Microsystems & Nanoengineering. - : Springer Science and Business Media LLC. - 2055-7434. ; 1:1, s. 1-16
  • Recension (refereegranskat)abstract
    • The majority of microelectromechanical system (MEMS) devices must be combined with integrated circuits (ICs) for operation in larger electronic systems. While MEMS transducers sense or control physical, optical or chemical quantities, ICs typically provide functionalities related to the signals of these transducers, such as analog-to-digital conversion, amplification, filtering and information processing as well as communication between the MEMS transducer and the outside world. Thus, the vast majority of commercial MEMS products, such as accelerometers, gyroscopes and micro-mirror arrays, are integrated and packaged together with ICs. There are a variety of possible methods of integrating and packaging MEMS and IC components, and the technology of choice strongly depends on the device, the field of application and the commercial requirements. In this review paper, traditional as well as innovative and emerging approaches to MEMS and IC integration are reviewed. These include approaches based on the hybrid integration of multiple chips (multi-chip solutions) as well as system-on-chip solutions based on wafer-level monolithic integration and heterogeneous integration techniques. These are important technological building blocks for the ‘More-Than-Moore’ paradigm described in the International Technology Roadmap for Semiconductors. In this paper, the various approaches are categorized in a coherent manner, their merits are discussed, and suitable application areas and implementations are critically investigated. The implications of the different MEMS and IC integration approaches for packaging, testing and final system costs are reviewed.
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12.
  • Fischer, Andreas C., 1982-, et al. (författare)
  • Selective electroless nickel plating on oxygen-plasma-activated gold seed-layers for the fabrication of low contact resistance vias and microstructures
  • 2010
  • Ingår i: MEMS 2010. - : IEEE. - 9781424457618 ; , s. 472-475
  • Konferensbidrag (refereegranskat)abstract
    • This paper presents a novel technique to selectively deposit nickel by electroless plating on gold seed layers using an oxygen-plasma-activation step. No prior wet surface pre- treatments or metal oxide etches are required. This enables the manufacturing of low-resistance vias for heterogeneous three-dimensional (3D) integration of MEMS but it is also a suitable technique for the fabrication of arbitrary shaped nickel-microstructures using chemically stable and cost-effective electroless nickel plating baths.
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13.
  • Lapisa, Martin A., et al. (författare)
  • Hidden-hinge micro-mirror arrays made by heterogeneous integration of two mono-crystalline silicon layers
  • 2011
  • Ingår i: 2011 IEEE 24th International Conference On Micro Electro Mechanical Systems (MEMS). - 9781424496341 ; , s. 696-699
  • Konferensbidrag (refereegranskat)abstract
    • In this paper we present wafer-level heterogeneous integrated hidden-hinge micro-mirror arrays for adaptive optics applications. The micro-mirrors are made of monocrystalline silicon and fabricated by two cycles of adhesive wafer bonding on fan-out substrates with addressing electrodes. The fabrication scheme allows the down-scaling of the micro-mirrors in size, the up-scaling of the array size and the implementation of additional material layers. Furthermore, large distances of the micro-mirrors to the electrodes can be achieved and hence a large deflection of the mirrors is possible. The micro-mirrors exhibit excellent deflection stability; no drift or hysteresis can be observed.
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14.
  • Lapisa, Martin, et al. (författare)
  • CMOS-integrable piston-type micro-mirror array for adaptive optics made of mono-crystalline silicon using 3-D integration
  • 2009
  • Ingår i: Proceedings of the IEEE International Conference on Micro Electro Mechanical Systems. - : IEEE conference proceedings. - 9781424429783 - 9781424429776 ; , s. 1007-1010
  • Konferensbidrag (refereegranskat)abstract
    • This paper presents a novel CMOS-compatible fabrication process and evaluations of a micro mirror array (MMA) made of mono-crystalline silicon (m-Si) for adaptive optic (AO) applications. The m-Si mirror layer is transfer bonded from a silicon-on-insulator (SOI) donor wafer with adhesive wafer bonding towards an intermediate patterned polymer spacer layer and clamped with metal plating. We present a CMOS compatible, bond alignment-free fabrication scheme offering the potential for high air gap distances between substrate and mirrors and we show first measurements of the fabricated mirrors.
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15.
  • Lapisa, Martin, et al. (författare)
  • Drift-free micromirror arrays made of monocrystalline silicon for adaptive optics applications
  • 2012
  • Ingår i: Journal of microelectromechanical systems. - 1057-7157 .- 1941-0158. ; 21:4, s. 959-970
  • Tidskriftsartikel (refereegranskat)abstract
    • In this paper, we report on the heterogeneous integration of monocrystalline silicon membranes for the fabrication of large segmented micromirror arrays for adaptive optics applications. The design relies on a one-level architecture with mirrors and suspension formed within the same material, employing a large actuator gap height of up to 5.1 μ m to allow for a piston-type mirror deflection of up to 1600 nm. Choosing monocrystalline silicon as actuator and mirror material, we demonstrate a completely drift-free operation capability. Furthermore, we investigate stress effects that degrade the mirror topography, and we show that the stress originates from the donor silicon-on-insulator wafer. The novel heterogeneous integration strategy used in this work is capable of reducing this stress to a large extent.
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16.
  • Lapisa, Martin, et al. (författare)
  • Heterogeneous 3D integration of hidden hinge micromirror arrays consisting of two layers of monocrystalline silicon
  • 2013
  • Ingår i: Journal of Micromechanics and Microengineering. - : IOP Publishing. - 0960-1317 .- 1361-6439. ; 23:7, s. 075003-
  • Tidskriftsartikel (refereegranskat)abstract
    • We present a complementary metal–oxide–semiconductor (CMOS) compatible heterogeneous 3D integration process that allows the integration of two monocrystalline silicon layers on top of CMOS control electronics. With this process we demonstrate the fabrication of hidden hinge micromirror arrays from monocrystalline silicon for adaptive optics applications. The piston-type micromirror arrays have the flexures underneath the mirror plates on separate silicon layers. Arrays of 48 × 48 mirror elements with an air-gap between mirror and address electrode of 10 µm were fabricated. The mirrors were found to be drift free and showed no imprinting. A maximum electrostatic mirror displacement of 3 µm is demonstrated.
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17.
  • Lapisa, Martin, et al. (författare)
  • Room-temperature wafer-level hermetic sealing for liquid reservoirs by gold ring embossing
  • 2009
  • Ingår i: TRANSDUCERS 2009. - 9781424441938 - 9781424441907 ; , s. 833-836
  • Konferensbidrag (refereegranskat)abstract
    • In this paper, we present a novel room temperature wafer-level sealing process for hermetic sealing of reservoirs filled with liquids. This technique can be used for e.g. drug delivery devices or thermo pneumatic devices. The sealing mechanism is based on plastic deformation of metal squeeze rings and embossing of target structures. Epoxy based underfill is used for mechanical stabilization of the wafer bond. We present experimental results from room-temperature bonding of glass wafers to silicon wafers with encapsulation of liquids in reservoirs.
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18.
  • Lapisa, Martin, 1977- (författare)
  • Wafer-level 3-D CMOS Integration of Very-large-scale Silicon Micromirror Arrays and Room-temperature Wafer-level Packaging
  • 2013
  • Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
    • This thesis describes the development of wafer-level fabrication and packaging methods for micro-electromechanical (MEMS) devices, based on wafer-bonding.The first part of the thesis is addressing the development of a wafer-level technology that allows the use of high performance materials, such as monocrystalline silicon, for MEMS devices that are closely integrated on top of sensitive integrated circuits substrates. Monocrystalline silicon has excellent mechanical properties that are hard to achieve otherwise, and therefore it fits well in devices for adaptive optics and maskwriting applications where nanometer precision deflection requirements call for mechanically stable materials. However, the temperature sensitivity of the integrated circuits prohibits the use of monocrystalline silicon with conventional deposition and surface micromachining techniques. Here, heterogeneous 3-D integration by adhesive wafer-bonding is used to fabricate three different types of spatial light modulators, based on micromirror arrays made of monocrystalline silicon; micromirror arrays with vertically moving “piston-type” mirrors and with tilting mirrors made of one functional monocrystalline silicon layer, and vertically moving hidden-hinge micromirror arrays made of two functional monocrystalline silicon layers.The second part of the thesis addresses the need for room-temperature packaging methods that allow the packaging of liquids or in general heat sensitive devices on wafer-level. A packaging method was developed that is based on a hybrid wafer-bonding approach, combining the compression bonding of gold gaskets with adhesive bonding. The packaging method is first demonstrated for the wafer-level encapsulation of liquids in reservoirs and then applied to packaging a dye-based photonic gas sensor. 
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19.
  • Lapisa, Martin, et al. (författare)
  • Wafer-Level capping and sealing of heat sensitive substances and liquids with gold gaskets
  • 2013
  • Ingår i: Sensors and Actuators A-Physical. - : Elsevier. - 0924-4247 .- 1873-3069. ; 201, s. 154-163
  • Tidskriftsartikel (refereegranskat)abstract
    • This paper reports on a novel wafer-level packaging method employing gold gaskets and an epoxy underfill. The packaging is done at room-temperature and atmospheric pressure. The mild packaging conditions allow the encapsulation of sensitive devices. The method is demonstrated for two applications; the wafer-level encapsulation of a liquid and the wafer-level packaging of a photonic gas sensor containing heat sensitive dye-films.
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20.
  • Lapisa, Martin, et al. (författare)
  • Wafer-Level Heterogeneous Integration for MOEMS, MEMS, and NEMS
  • 2011
  • Ingår i: IEEE Journal of Selected Topics in Quantum Electronics. - 1077-260X .- 1558-4542. ; 17:3, s. 629-644
  • Tidskriftsartikel (refereegranskat)abstract
    • Wafer-level heterogeneous integration technologies for microoptoelectromechanical systems (MOEMS), microelectromechanical systems (MEMS), and nanoelectromechanical systems (NEMS) enable the combination of dissimilar classes of materials and components into single systems. Thus, high-performance materials and subsystems can be combined in ways that would otherwise not be possible, and thereby forming complex and highly integrated micro-or nanosystems. Examples include the integration of high-performance optical, electrical or mechanical materials such as monocrystalline silicon, graphene or III-V materials with integrated electronic circuits. In this paper the state-of-the-art of wafer-level heterogeneous integration technologies suitable for MOEMS, MEMS, and NEMS devices are reviewed. Various heterogeneous MOEMS, MEMS, and NEMS devices that have been described in literature are presented.
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21.
  • Niklaus, Frank, et al. (författare)
  • Wafer bonding with nano-imprint resists as sacrificial adhesive for fabrication of silicon-on-integrated-circuit (SOIC) wafers in 3D integration of MEMS and ICs
  • 2009
  • Ingår i: Sensors and Actuators A-Physical. - : Elsevier BV. - 0924-4247 .- 1873-3069. ; 154:1, s. 180-186
  • Tidskriftsartikel (refereegranskat)abstract
    • In this paper, we present the use of thermosetting nano-imprint resists in adhesive wafer bonding. The presented wafer bonding process is suitable for heterogeneous three-dimensional (3D) integration of microelectromechanical systems (MEMS) and integrated circuits (ICs). Detailed adhesive bonding process parameters are presented to achieve void-free, well-defined and uniform wafer bonding interfaces. Experiments have been performed to optimize the thickness control and uniformity of the nano-imprint resist layer in between the bonded wafers. In contrast to established polymer adhesives such as, e.g., BCB, nano-imprint resists as adhesives for wafer-to-wafer bonding are specifically suitable if the adhesive is intended as sacrificial material. This is often the case, e.g., in fabrication of silicon-on-integrated-circuit (SOIC) wafers for 3D integration of MEMS membrane structures on top of IC wafers. Such IC integrated MEMS includes. e.g., micro-mirror arrays, infrared bolometer arrays, resonators, capacitive inertial sensors, pressure sensors and microphones.
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22.
  • Niklaus, Frank, et al. (författare)
  • Wafer-level heterogeneous 3D integration for MEMS and NEMS
  • 2012
  • Ingår i: Proceedings of 2012 3rd IEEE International Workshop on Low Temperature Bonding for 3D Integration, LTB-3D 2012. - : IEEE conference proceedings. - 9781467307420 ; , s. 247-252
  • Konferensbidrag (refereegranskat)abstract
    • In this paper the state-of-the-art in wafer-level heterogeneous 3D integration technologies for micro-electromechanical systems (MEMS) and nano-electromechanical systems (NEMS) is reviewed. Various examples of commercial and experimental heterogeneous 3D integration processes for MEMS and NEMS devices are presented and discussed.
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