| 1. |
- Gottlob, H. D. B., et al.
(författare)
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Scaling potential and MOSFET integration of thermally stable Gd silicate dielectrics
- 2009
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Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 86:7-9, s. 1642-1645
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Tidskriftsartikel (refereegranskat)abstract
- We investigate the potential of gadolinium silicate (GdSiO) as a thermally stable high-k gate dielectric in a gate first integration scheme. There silicon diffuses into gadolinium oxide (Gd2O3) from a silicon oxide (SiO2) interlayer specifically prepared for this purpose. We report on the scaling potential based on detailed material analysis. Gate leakage current densities and EOT values are compatible with an ITRS requirement for low stand by power (LSTP). The applicability of this GdSiO process is demonstrated by fully functional silicon on insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs). (C) 2009 Elsevier B.V. All rights reserved.
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| 2. |
- Abermann, S., et al.
(författare)
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Processing and evaluation of metal gate/high-k/Si capacitors incorporating Al, Ni, TiN, and Mo as metal gate, and ZrO2 and HfO2 as high-k dielectric
- 2007
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Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 84:5-8, s. 1635-1638
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Tidskriftsartikel (refereegranskat)abstract
- We evaluate various metal gate/high-k/Si capacitors by their resulting electrical characteristics. Therefore, we process MOS gate stacks incorporating aluminium (Al), nickel (Ni), titanium-nitride (TiN), and molybdenum (Mo) as the gate material, and metal organic chemical vapour deposited (MOCVD) ZrO2 and HfO2 as the gate dielectric, respectively. The influence of the processing sequence - especially of the thermal annealing treatment - on the electrical characteristics of the various gate stacks is being investigated. Whereas post metallization annealing in forming gas atmosphere improves capacitance-voltage behaviour (due to reduced interface-, and oxide charge density), current-voltage characteristics degrade due to a higher leakage current after thermal treatment at higher temperatures. The Flatband-voltage values for the TiN-, Mo-, and Ni-capacitors indicate mid-gap pinning of the metal gates, however, Ni seems to be thermally unstable on ZrO2, at least within the process scheme we applied.
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| 3. |
- Engström, Olof, 1943, et al.
(författare)
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A generalised methodology for oxide leakage current metric
- 2008
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Ingår i: Proceeding of 9th European Workshop on Ultimate Integration of Silicon (ULIS), Udine, Italy. - 9781424417308 ; , s. 167-
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Konferensbidrag (refereegranskat)abstract
- From calculations of semiconductor interfacecharge, oxide voltage and tunneling currents for MOSsystems with equivalent oxide thickness (EOT) in therange of 1 nm, rules are suggested for making itpossible to compare leakage quality of different oxideswith an accuracy of a factor 2 – 3 if the EOT is known.The standard procedure suggested gives considerablybetter accuracy than the commonly used method todetermine leakage at VFB+1V for n-type and VFB-1V forp-type substrates.
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| 4. |
- Engström, Olof, 1943, et al.
(författare)
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Gate stacks
- 2013
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Ingår i: Nanoscale CMOS: Innovative Materials, Modeling and Characterization. - : Wiley. ; , s. 23 - 67
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Bokkapitel (övrigt vetenskapligt/konstnärligt)
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| 5. |
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| 6. |
- Engström, Olof, 1943, et al.
(författare)
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Properties of Metal/High-k Oxide/Graphene Structures
- 2017
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Ingår i: ECS Transactions. - : The Electrochemical Society. - 1938-5862 .- 1938-6737. ; 80:1, s. 157-176
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Konferensbidrag (refereegranskat)abstract
- The challenge of interpreting experimental data from capacitance versus voltage (C-V) measurements on metal/high-k oxide/graphene (MOG) structures is discussed. Theoretical expressions for the influence of interface states, bulk oxide traps, measurement frequency, temperature and puddles are derived and compared with experiments. The nature of oxide traps and their impact on C-V data is treated especially from the view of electron-lattice interaction at electron emission and capture and possible performance as border traps, resembling interface states. We find that characterization on detailed physical origins leading to effects on C-V data is a more complicated issue than the corresponding analysis of metal/oxide/semiconductor (MOS) structures.
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| 7. |
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| 8. |
- Hurley, P.K., et al.
(författare)
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Interface Defects in HfO2, LaSiOx, and Gd2O3 High-k/MetalGate Structures on Silicon
- 2008
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Ingår i: J. Electrochem. Soc.. ; 155:2, s. G13-G20
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Tidskriftsartikel (refereegranskat)abstract
- In this work, we present experimental results examining the energy distribution of the relatively high (>1×10^11 cm−2) electrically active interface defects which are commonly observed in high-dielectric-constant (high-k) metal–insulator–silicon systems during high-k process development. This paper extends previous studies on the Si(100)/SiOx/HfO2 system to include a comparative analysis of the density and energy distribution of interface defects for HfO2, lanthanum silicate (LaSiOx), and Gd2O3 thin films on (100) orientation silicon formed by a range of deposition techniques. The analysis of the interface defect density across the energy gap, for samples which experience no H2/N2 annealing following the gate stack formation, reveals a peak density (~2×10^12 cm−2 eV−1 to ~1×10^13 cm−2 eV−1) at 0.83–0.92 eV above the silicon valence bandedge for the HfO2, LaSiOx, and Gd2O3 thin films on Si(100). The characteristic peak in the interface state density (0.83–0.92 eV) is obtained for samples where no interface silicon oxide layer is observed from transmission electron microscopy. Analysis suggests silicon dangling bond (Pbo) centers as the common origin for the dominant interface defects for the various Si(100)/SiOx/high-k/metal gate systems. The results of forming gas (H2/N2) annealing over the temperature range 350–555°C are presented and indicate interface state density reduction, as expected for silicon dangling bond centers. The technological relevance of the results is discussed.
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| 9. |
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| 10. |
- Illarionov, Yu Yu, et al.
(författare)
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Bias-temperature instability in single-layer graphene field-effect transistors
- 2014
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Ingår i: Applied Physics Letters. - : AIP Publishing. - 0003-6951 .- 1077-3118. ; 105:14, s. 143507-
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Tidskriftsartikel (refereegranskat)abstract
- We present a detailed analysis of the bias-temperature instability (BTI) of single-layer graphene field-effect transistors. Both negative BTI and positive BTI can be benchmarked using models developed for Si technologies. In particular, recovery follows the universal relaxation trend and can be described using the established capture/emission time map approach. We thereby propose a general methodology for assessing the reliability of graphene/dielectric interfaces, which are essential building blocks of graphene devices. (C) 2014 AIP Publishing LLC.
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| 11. |
- Illarionov, Yu.Yu., et al.
(författare)
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Bias-temperature instability in single-layer graphene field-effect transistors : A reliability challenge
- 2014
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Ingår i: 2014 Silicon Nanoelectronics Workshop, SNW 2014. - : Institute of Electrical and Electronics Engineers (IEEE). - 9781479956777
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Konferensbidrag (refereegranskat)abstract
- We present a detailed analysis of the bias-temperature instability (BTI) of single-layer graphene field-effect transistors (GFETs). We demonstrate that the dynamics can be systematically studied when the degradation is expressed in terms of a Dirac point voltage shift. Under these prerequisites it is possible to understand and benchmark both NBTI and PBTI using models previously developed for Si technologies. In particular, we show that the capture/emission time (CET) map approach can be also applied to GFETs and that recovery in GFETs follows the same universal relaxation trend as their Si counterparts. While the measured defect densities can still be considerably larger than those known from Si technology, the dynamics of BTI are in general comparable, allowing for quantitative benchmarking of the graphene/dielectric interface quality.
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| 12. |
- Illarionov, Y.Yu., et al.
(författare)
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Bias-temperature instability on the back gate of single-layer double-gated graphene field-effect transistors
- 2016
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Ingår i: Japanese Journal of Applied Physics. - : Institute of Physics (IOP). - 0021-4922 .- 1347-4065. ; 55:4
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Tidskriftsartikel (refereegranskat)abstract
- We study the positive and negative bias-temperature instabilities (PBTI and NBTI) on the back gate of single-layer double-gated graphene fieldeffect transistors (GFETs). By analyzing the resulting degradation at different stress times and oxide fields we show that there is a significant asymmetry between PBTI and NBTI with respect to their dependences on these parameters. Finally, we compare the results obtained on the high-k top gate and SiO2 back gate of the same device and show that SiO2 gate is more stable with respect to BTI.
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| 13. |
- Illarionov, Yu.Yu., et al.
(författare)
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Hot-carrier degradation in single-layer double-gated graphene field-effect transistors
- 2015
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Ingår i: IEEE International Reliability Physics Symposium Proceedings. - : IEEE conference proceedings. - 9781467373623 ; , s. XT21-XT26
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Konferensbidrag (refereegranskat)abstract
- We report a first study of hot-carrier degradation (HCD) in graphene field-effect transistors (GFETs). Our results show that HCD in GFETs is recoverable, similarly to the bias-temperature instability (BTI). Depending on the top gate bias polarity, the presence of HCD may either accelerate or suppress BTI. Contrary to BTI, which mainly results in a change of the charged trap density in the oxide, HCD also leads to a mobility degradation which strongly correlates with the magnitude of the applied stress.
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| 14. |
- Illarionov, Yu.Yu., et al.
(författare)
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Impact of hot carrier stress on the defect density and mobility in double-gated graphene field-effect transistors
- 2015
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Ingår i: EUROSOI-ULIS 2015 - 2015 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon. - 9781479969111 ; , s. 81-84
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Konferensbidrag (refereegranskat)abstract
- We study the impact of hot-carrier degradation (HCD) on the performance of graphene field-effect transistors (GFETs) for different polarities of HC and bias stress. Our results show that the impact of HCD consists in a change of both charged defect density and carrier mobility. At the same time, the mobility degradation agrees with an attractive/repulsive scattering asymmetry and can be understood based on the analysis of the defect density variation.
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| 15. |
- Lin, Pen-Sheng, et al.
(författare)
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Low-concentration detection of CO2 using suspended silicon waveguides in the mid-IR
- 2022
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Ingår i: 2022 Conference on Lasers and Electro-Optics, CLEO 2022. - : Institute of Electrical and Electronics Engineers Inc..
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Konferensbidrag (refereegranskat)abstract
- We show detection of CO2 concentrations as low as 500 ppm using a suspended silicon photonic mid-IR waveguide. The performance is enabled by the low propagation loss (2.35 ±0.25) dB/cm permitting sensing with waveguides up to 7 cm in length.
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| 16. |
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| 17. |
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| 18. |
- Moreno-Garcia, D., et al.
(författare)
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A Resonant Graphene NEMS Vibrometer
- 2022
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Ingår i: Small. - : Wiley. - 1613-6810 .- 1613-6829. ; 18:28
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Tidskriftsartikel (refereegranskat)abstract
- Measuring vibrations is essential to ensuring building structural safety and machine stability. Predictive maintenance is a central internet of things (IoT) application within the new industrial revolution, where sustainability and performance increase over time are going to be paramount. To reduce the footprint and cost of vibration sensors while improving their performance, new sensor concepts are needed. Here, double-layer graphene membranes are utilized with a suspended silicon proof demonstrating their operation as resonant vibration sensors that show outstanding performance for a given footprint and proof mass. The unveiled sensing effect is based on resonant transduction and has important implications for experimental studies involving thin nano and micro mechanical resonators that are excited by an external shaker.
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| 19. |
- Negm, N., et al.
(författare)
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Graphene waveguide-integrated thermal infrared emitter
- 2022
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Ingår i: Device Research Conference - Conference Digest, DRC. - : Institute of Electrical and Electronics Engineers (IEEE).
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Konferensbidrag (refereegranskat)abstract
- Low-cost and easily integrable mid-infrared (MIR) sources are highly desired for photonic integrated circuits. Thermal incandescent MIR sources are widely used. They work by Joule heating, i.e. an electrical current through the emitter causes thermal emission according to Planck's law. Their simple design with only two contact pads makes them integrable with typical optoelectronic components in high-volume production flows. Graphene's emissivity is comparable to common metallic emitters. In contrast to the latter, graphene is transparent at MIR wavelengths, which enables placing large area graphene emitters in the evanescent field of integrated waveguides [1]-[2]. This enhances emission by near-field coupling directly into the waveguide mode, avoiding the mode-mismatch to free space. Here, we present the first experimental demonstration of a graphene emitter placed directly on a photonic waveguide, hence emitting directly into the waveguide mode.
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| 20. |
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| 21. |
- Schwarz, Mike, et al.
(författare)
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The Schottky barrier transistor in emerging electronic devices
- 2023
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Ingår i: Nanotechnology. - 1361-6528 .- 0957-4484. ; 34:35
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Forskningsöversikt (refereegranskat)abstract
- This paper explores how the Schottky barrier (SB) transistor is used in a variety of applications and material systems. A discussion of SB formation, current transport processes, and an overview of modeling are first considered. Three discussions follow, which detail the role of SB transistors in high performance, ubiquitous and cryogenic electronics. For high performance computing, the SB typically needs to be minimized to achieve optimal performance and we explore the methods adopted in carbon nanotube technology and two-dimensional electronics. On the contrary for ubiquitous electronics, the SB can be used advantageously in source-gated transistors and reconfigurable field-effect transistors (FETs) for sensors, neuromorphic hardware and security applications. Similarly, judicious use of an SB can be an asset for applications involving Josephson junction FETs.
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| 22. |
- Smith, Anderson David, et al.
(författare)
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Graphene-based piezoresistive pressure sensing for uniaxial and biaxial strains
- 2014
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Ingår i: 2014 Silicon Nanoelectronics Workshop, SNW 2014. - : Institute of Electrical and Electronics Engineers (IEEE). - 9781479956777
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Konferensbidrag (refereegranskat)abstract
- The piezoresistive effect in graphene has been experimentally demonstrated for both uniaxial and biaxial strains. For uniaxial strain, rectangular membranes were measured while circular membranes provided biaxial strain. Gauge factors have also been extracted and compared to previous literature as well as simulations.
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| 23. |
- Smith, Anderson, et al.
(författare)
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Wafer Scale Graphene Transfer for Back End of the Line Device Integration
- 2014
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Ingår i: INT CONF ULTI INTEGR. - 2330-5738. ; , s. 29-32
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Tidskriftsartikel (refereegranskat)abstract
- We report on a wafer scale fabrication of graphene based field effect transistors (GFETs) for use in future radio frequency (RF) and sensor applications. The process is also almost entirely CMOS compatible and uses a scalable graphene transfer method that can be incorporated in standard CMOS back end of the line (BEOL) process flows. Such a process can be used to integrate high speed GFET devices and graphene sensors with silicon CMOS circuits.
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| 24. |
- Vaziri, Sam, et al.
(författare)
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Going ballistic : Graphene hot electron transistors
- 2015
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Ingår i: Solid State Communications. - : Elsevier. - 0038-1098 .- 1879-2766. ; 224, s. 64-75
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Tidskriftsartikel (refereegranskat)abstract
- This paper reviews the experimental and theoretical state of the art in ballistic hot electron transistors that utilize two-dimensional base contacts made from graphene, i.e. graphene base transistors (GBTs). Early performance predictions that indicated potential for THz operation still hold true today, even with improved models that take non-idealities into account. Experimental results clearly demonstrate the basic functionality, with on/off current switching over several orders of magnitude, but further developments are required to exploit the full potential of the GBT device family. In particular, interfaces between graphene and semiconductors or dielectrics are far from perfect and thus limit experimental device integrity, reliability and performance.
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