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Sökning: WFRF:(Lemme Max C.)

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1.
  • Bell, D. C., et al. (författare)
  • Precision cutting and patterning of graphene with helium ions
  • 2009
  • Ingår i: Nanotechnology. - : IOP Publishing. - 0957-4484 .- 1361-6528. ; 20:45, s. 455301-
  • Tidskriftsartikel (refereegranskat)abstract
    • We report nanoscale patterning of graphene using a helium ion microscope configured for lithography. Helium ion lithography is a direct-write lithography process, comparable to conventional focused ion beam patterning, with no resist or other material contacting the sample surface. In the present application, graphene samples on Si/SiO(2) substrates are cut using helium ions, with computer controlled alignment, patterning, and exposure. Once suitable beam doses are determined, sharp edge profiles and clean etching are obtained, with little evident damage or doping to the sample. This technique provides fast lithography compatible with graphene, with similar to 15 nm feature sizes.
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2.
  • Gottlob, H. D. B., et al. (författare)
  • Scaling potential and MOSFET integration of thermally stable Gd silicate dielectrics
  • 2009
  • Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 86:7-9, s. 1642-1645
  • Tidskriftsartikel (refereegranskat)abstract
    • We investigate the potential of gadolinium silicate (GdSiO) as a thermally stable high-k gate dielectric in a gate first integration scheme. There silicon diffuses into gadolinium oxide (Gd2O3) from a silicon oxide (SiO2) interlayer specifically prepared for this purpose. We report on the scaling potential based on detailed material analysis. Gate leakage current densities and EOT values are compatible with an ITRS requirement for low stand by power (LSTP). The applicability of this GdSiO process is demonstrated by fully functional silicon on insulator (SOI) metal oxide semiconductor field effect transistors (MOSFETs). (C) 2009 Elsevier B.V. All rights reserved.
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3.
  • Pecunia, Vincenzo, et al. (författare)
  • Roadmap on energy harvesting materials
  • 2023
  • Ingår i: Journal of Physics. - : IOP Publishing. - 2515-7639. ; 6:4
  • Tidskriftsartikel (refereegranskat)abstract
    • Ambient energy harvesting has great potential to contribute to sustainable development and address growing environmental challenges. Converting waste energy from energy-intensive processes and systems (e.g. combustion engines and furnaces) is crucial to reducing their environmental impact and achieving net-zero emissions. Compact energy harvesters will also be key to powering the exponentially growing smart devices ecosystem that is part of the Internet of Things, thus enabling futuristic applications that can improve our quality of life (e.g. smart homes, smart cities, smart manufacturing, and smart healthcare). To achieve these goals, innovative materials are needed to efficiently convert ambient energy into electricity through various physical mechanisms, such as the photovoltaic effect, thermoelectricity, piezoelectricity, triboelectricity, and radiofrequency wireless power transfer. By bringing together the perspectives of experts in various types of energy harvesting materials, this Roadmap provides extensive insights into recent advances and present challenges in the field. Additionally, the Roadmap analyses the key performance metrics of these technologies in relation to their ultimate energy conversion limits. Building on these insights, the Roadmap outlines promising directions for future research to fully harness the potential of energy harvesting materials for green energy anytime, anywhere.
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4.
  • Welch, C. C., et al. (författare)
  • Silicon etch process options for micro- and nanotechnology using inductively coupled plasmas
  • 2006
  • Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 83:4-9, s. 1170-1173
  • Tidskriftsartikel (refereegranskat)abstract
    • Silicon is an essential material in the fabrication of a continually expanding range of micro- and nano-scale opto-and microelectronic devices. The fabrication of many such devices requires patterning of the silicon but until recently exploitation of the technology has been restricted by the difficulty of forming the ever-smaller features and higher aspect ratios demanded. Plasma etching through a mask layer is a very useful means for fine-dimension patterning of silicon. In this work, several solutions are presented for the micro- and nano-scale etching of silicon using inductively coupled plasmas ICP.
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5.
  • Bell, David C., et al. (författare)
  • Precision material modification and patterning with He ions
  • 2009
  • Ingår i: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567. ; 27:6, s. 2755-2758
  • Tidskriftsartikel (refereegranskat)abstract
    • The authors report on the use of a helium ion microscope as a potential technique for precise nanopatterning. Combined with an automated pattern generation system, they demonstrate controlled etching and patterning of materials, giving precise command over the geometery of the modified nanostructure. After the determination of suitable doses, sharp edge profiles and clean etching of areas in materials were observed. In this article they present examples of patterning on SiO(2) and graphene, which is particularly relevant. This technique could be an avenue for precise material modification for future graphene based device fabrication. The technique has the potential to revolutionize the way that very thin, one-atomic layer materials are modified in a controlled and predictable way.
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6.
  • Benetti, M., et al. (författare)
  • POLYSILICON MESOSCOPIC WIRES COATED BY Pd AS H(2) SENSORS
  • 2009
  • Ingår i: PROCEEDINGS OF THE 13TH ITALIAN CONFERENCE ON SENSORS AND MICROSYSTEMS. - SINGAPORE : WORLD SCIENTIFIC PUBL CO PTE LTD. ; , s. 161-165
  • Konferensbidrag (refereegranskat)abstract
    • In this work a novel monocrystalline silicon nanowires array has been investigated and presented as hydrogen sensor, designed and fabricated by employing high resolution microfabrication techniques and featuring a high surface/volume ratio. The nanowires arrays makes up the channel of a MOS system, palladium-silicon dioxide-silicon. Several devices have been fabricated by using a SOI (Silicon On Insulator) substrate, Source and Drain have been geometrically patterned by optical lithography and Boron p-doped. Electron Beam Litography (EBL) defined the MOS channel made up of a nanowires array of different length and width in different transistors. The pads of Source and Drain have been manufactured with an aluminium film deposition. The Gate has been fabricated with a grown silicon oxide layer (17.4 nm) and Palladium has been used as gate contact. Polarizing and exposing the device to H(2)/N(2) cycles at different concentrations some preliminary measurements have been successfully conducted.
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7.
  • Fan, Xuge, et al. (författare)
  • Graphene ribbons with suspended masses as transducers in ultra-small nanoelectromechanical accelerometers
  • 2019
  • Ingår i: Nature Electronics. - : Nature Publishing Group. - 2520-1131. ; 2:9, s. 394-404
  • Tidskriftsartikel (refereegranskat)abstract
    • Nanoelectromechanical system (NEMS) sensors and actuators could be of use in the development of next-generation mobile, wearable and implantable devices. However, these NEMS devices require transducers that are ultra-small, sensitive and can be fabricated at low cost. Here, we show that suspended double-layer graphene ribbons with attached silicon proof masses can be used as combined spring–mass and piezoresistive transducers. The transducers, which are created using processes that are compatible with large-scale semiconductor manufacturing technologies, can yield NEMS accelerometers that occupy at least two orders of magnitude smaller die area than conventional state-of-the-art silicon accelerometers. With our devices, we also extract the Young’s modulus values of double-layer graphene and show that the graphene ribbons have significant built-in stresses.
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8.
  • Fan, Xuge, et al. (författare)
  • Manufacture and characterization of graphene membranes with suspended silicon proof masses for MEMS and NEMS applications
  • 2020
  • Ingår i: MICROSYSTEMS & NANOENGINEERING. - : NATURE PUBLISHING GROUP. - 2055-7434. ; 6:1
  • Tidskriftsartikel (refereegranskat)abstract
    • Graphene's unparalleled strength, chemical stability, ultimate surface-to-volume ratio and excellent electronic properties make it an ideal candidate as a material for membranes in micro- and nanoelectromechanical systems (MEMS and NEMS). However, the integration of graphene into MEMS or NEMS devices and suspended structures such as proof masses on graphene membranes raises several technological challenges, including collapse and rupture of the graphene. We have developed a robust route for realizing membranes made of double-layer CVD graphene and suspending large silicon proof masses on membranes with high yields. We have demonstrated the manufacture of square graphene membranes with side lengths from 7 mu m to 110 mu m, and suspended proof masses consisting of solid silicon cubes that are from 5 mu mx5 mu mx16.4 mu m to 100 mu mx100 mu mx16.4 mu m in size. Our approach is compatible with wafer-scale MEMS and semiconductor manufacturing technologies, and the manufacturing yields of the graphene membranes with suspended proof masses were >90%, with >70% of the graphene membranes having >90% graphene area without visible defects. The measured resonance frequencies of the realized structures ranged from tens to hundreds of kHz, with quality factors ranging from 63 to 148. The graphene membranes with suspended proof masses were extremely robust, and were able to withstand indentation forces from an atomic force microscope (AFM) tip of up to 7000nN. The proposed approach for the reliable and large-scale manufacture of graphene membranes with suspended proof masses will enable the development and study of innovative NEMS devices with new functionalities and improved performances.
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9.
  • Fuchs, A., et al. (författare)
  • Nanowire fin field effect transistors via UV-based nanoimprint lithography
  • 2006
  • Ingår i: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567. ; 24:6, s. 2964-2967
  • Tidskriftsartikel (refereegranskat)abstract
    • A triple step alignment process for UV nanoimprint lithography (UV-NIL) for the fabrication of nanoscale fin field effect transistors (FinFETs) is presented. An alignment accuracy is demonstrated between two functional layers of less than 20 nm (3 sigma). The electrical characterization of the FinFETs fabricated by a full NIL process demonstrates the potential of UV-NIL for future nanoelectronic devices.
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10.
  • Lemme, Max C., 1970-, et al. (författare)
  • Etching of Graphene Devices with a Helium Ion Beam
  • 2009
  • Ingår i: ACS Nano. - : American Chemical Society (ACS). - 1936-0851 .- 1936-086X. ; 3:9, s. 2674-2676
  • Tidskriftsartikel (refereegranskat)abstract
    • We report on the etching of graphene devices with a helium ion beam, including in situ electrical measurement during lithography. The etching process can be used to nanostructure and electrically isolate different regions In a graphene device, as demonstrated by etching a channel in a suspended graphene device with etched gaps down to about 10 nm. Graphene devices on silicon dioxide (02) substrates etch with lower He ion doses and are found to have a residual conductivity after etching, which we attribute to contamination by hydrocarbons.
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11.
  • Lemme, Max C., 1970-, et al. (författare)
  • Highly selective HBr etch process for fabrication of Triple-Gate nano-scale SOI-MOSFETs
  • 2004
  • Ingår i: Microelectronic Engineering. - 0167-9317 .- 1873-5568. ; 73-74:SI, s. 346-350
  • Tidskriftsartikel (refereegranskat)abstract
    • New three-dimensional device concepts are considered necessary for the ultimate scaling of the gate length of metal-oxide-semiconductor field effect transistors (MOSFETs). Both Triple-Gate field effect transistors and FinFETs require a gate etch process with excellent selectivity over the gate oxide material. In this work, a highly selective, anisotropic gate etch process using HBr and O-2 as the reactive gases in an inductively coupled plasma reactive ion etch tool is described. Polysilicon thickness measurements have been taken to calculate etch rate and uniformity. Polysilicon wafers for each experimental condition were given different overetch times and SiO2 losses were plotted against time, with the gradient yielding the SiO2 etch rate. The optimized etch process yields excellent results for nanoscale polysilicon gates.
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12.
  • Lemme, Max C., 1970-, et al. (författare)
  • Triple-gate metal-oxide-semiconductor field effect transistors fabricated with interference lithography
  • 2004
  • Ingår i: Nanotechnology. - : IOP Publishing. - 0957-4484 .- 1361-6528. ; 15:4, s. S208-S210
  • Tidskriftsartikel (refereegranskat)abstract
    • In this work, n-type triple-crate metal-oxide-semiconductor field effect transistors (MOSFETs) are presented, where laser interference lithography (LIL) is integrated into a silicon-on-insulator (SOI) CMOS process to provide for the critical definition of the transistor channels. A mix and match process of optical contact lithography and LIL is developed to achieve device relevant structures. The triple-gate MOSFETs are electrically characterized to demonstrate the feasibility of this low cost fabrication process.
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13.
  • Lippert, G., et al. (författare)
  • Molecular beam epitaxy of graphene on mica
  • 2012
  • Ingår i: Physica status solidi. B, Basic research. - : Wiley. - 0370-1972 .- 1521-3951. ; 249:12, s. 2507-2510
  • Tidskriftsartikel (refereegranskat)abstract
    • Realization of graphene devices is often hindered by the fact that the known layer growth methods do not meet the requirements of the device fabrication in silicon mainstream technology. For example, the relatively straightforward method of decomposition of hexagonal SiC is not CMOS-compatible due to the high-thermal budget it requires [Moon et al., IEEE Electron Device Lett. 31, 260 (2010)]. Techniques based on layer transfer are restricted because of the uncertainty of residual metal contaminants, particles, and structural defects. Of interest is thus a method that would allow one to grow a graphene film directly in the device area where graphene is needed. Production of large area graphene is not necessarily required in this case, but high quality of the film and metal-free growth on an insulating substrate at temperatures below 1000 degrees C are important requirements. We demonstrate direct growth of defect-free graphene on insulators at moderate temperatures by molecular beam epitaxy. The quality of the graphene was probed by high-resolution Raman spectroscopy, indicating a negligible density of defects. The spectra are compared with those from graphene flakes mechanically exfoliated from native graphite onto mica. These results are combined with insights from density functional theory calculations. A model of graphene growth on mica and similar substrates is proposed.
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14.
  • Llatser, I., et al. (författare)
  • Characterization of graphene-based nano-antennas in the terahertz band
  • 2012
  • Ingår i: Proceedings of 6th European Conference on Antennas and Propagation, EuCAP 2012. - : IEEE. - 9781457709180 ; , s. 194-198
  • Konferensbidrag (refereegranskat)abstract
    • Graphene-enabled wireless communications constitute a novel paradigm which has been proposed to implement wireless communications at the nanoscale. Indeed, graphene-based nano-antennas just a few micrometers in size have been predicted to radiate electromagnetic waves at the terahertz band. In this work, the performance of a graphene-based nano-patch antenna in transmission and reception is numerically analyzed. The resonance frequency of the nano-antenna is calculated as a function of its length and width, both analytically and by simulation. The influence of a dielectric substrate with a variable size, and the position of the patch with respect to the substrate is also evaluated. Finally, the radiation pattern of a graphene-based nano-patch antenna is compared to that of an equivalent metallic antenna. These results will prove useful for designers of future graphene-based nano-antennas, which will enable wireless communications at the nanoscale.
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15.
  • Smith, Anderson D., et al. (författare)
  • Biaxial strain in suspended graphene membranes for piezoresistive sensing
  • 2014
  • Ingår i: 2014 IEEE 27th International Conference on Micro Electro Mechanical Systems (MEMS). - : IEEE. - 9781479935093 ; , s. 1055-1058
  • Konferensbidrag (refereegranskat)abstract
    • Pressure sensors based on suspended graphene membranes have shown extraordinary sensitivity for uniaxial strains, which originates from graphene's unique electrical and mechanical properties and thinness [1]. This work compares through both theory and experiment the effect of cavity shape and size on the sensitivity of piezoresistive pressure sensors based on suspended graphene membranes. Further, the paper analyzes the effect of both biaxial and uniaxial strain on the membranes. Previous studies examined uniaxial strain through the fabrication of long, rectangular cavities. The present work uses circular cavities of varying sizes in order to obtain data from biaxially strained graphene membranes.
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16.
  • Smith, Anderson D., et al. (författare)
  • Graphene-based CO2 sensing and its cross-sensitivity with humidity
  • 2017
  • Ingår i: RSC Advances. - : Royal Society of Chemistry. - 2046-2069. ; 7:36, s. 22329-22339
  • Tidskriftsartikel (refereegranskat)abstract
    • We present graphene-based CO2 sensing and analyze its cross-sensitivity with humidity. In order to assess the selectivity of graphene-based gas sensing to various gases, measurements are performed in argon (Ar), nitrogen (N-2), oxygen (O-2), carbon dioxide (CO2), and air by selectively venting the desired gas from compressed gas bottles into an evacuated vacuum chamber. The sensors provide a direct electrical readout in response to changes in high concentrations, from these bottles, of CO2, O-2, nitrogen and argon, as well as changes in humidity from venting atmospheric air. From the signal response to each gas species, the relative graphene sensitivity to each gas is extracted as a relationship between the percentagechange in graphene's resistance response to changes in vacuum chamber pressure. Although there is virtually no response from O-2, N-2 and Ar, there is a sizeable cross-sensitivity between CO2 and humidity occurring at high CO2 concentrations. However, under atmospheric concentrations of CO2, this cross-sensitivity effect is negligible - allowing for the use of graphene-based humidity sensing in atmospheric environments. Finally, charge density difference calculations, computed using density functional theory (DFT) are presented in order to illustrate the bonding of CO2 and water molecules on graphene and the alterations of the graphene electronic structure due to the interactions with the substrate and the molecules.
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17.
  • Smith, Anderson D., et al. (författare)
  • Graphene-based CO2 sensing and its cross-sensitivity with humidity
  • 2017
  • Ingår i: RSC Advances. - : Royal Society of Chemistry. - 2046-2069. ; 7:36, s. 22329-22339
  • Tidskriftsartikel (refereegranskat)abstract
    • We present graphene-based CO2 sensing and analyze its cross-sensitivity with humidity. In order to assess the selectivity of graphene-based gas sensing to various gases, measurements are performed in argon (Ar), nitrogen (N2), oxygen (O2), carbon dioxide (CO2), and air by selectively venting the desired gas from compressed gas bottles into an evacuated vacuum chamber. The sensors provide a direct electrical readout in response to changes in high concentrations, from these bottles, of CO2, O2, nitrogen and argon, as well as changes in humidity from venting atmospheric air. From the signal response to each gas species, the relative graphene sensitivity to each gas is extracted as a relationship between the percentage-change in graphene's resistance response to changes in vacuum chamber pressure. Although there is virtually no response from O2, N2 and Ar, there is a sizeable cross-sensitivity between CO2 and humidity occurring at high CO2 concentrations. However, under atmospheric concentrations of CO2, this cross-sensitivity effect is negligible – allowing for the use of graphene-based humidity sensing in atmospheric environments. Finally, charge density difference calculations, computed using density functional theory (DFT) are presented in order to illustrate the bonding of CO2 and water molecules on graphene and the alterations of the graphene electronic structure due to the interactions with the substrate and the molecules.
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18.
  • Smith, Anderson David, et al. (författare)
  • Piezoresistive Properties of Suspended Graphene Membranes under Uniaxial and Biaxial Strain in Nanoelectromechanical Pressure Sensors
  • 2016
  • Ingår i: ACS Nano. - : American Chemical Society (ACS). - 1936-0851 .- 1936-086X. ; 10:11, s. 9879-9886
  • Tidskriftsartikel (refereegranskat)abstract
    • Graphene membranes act as highly sensitive transducers in nanoelectromechanical devices due to their ultimate thinness. Previously, the piezoresistive effect has been experimentally verified in graphene using uniaxial strain in graphene. Here, we report experimental and theoretical data on the uni- and biaxial piezoresistive properties of suspended graphene membranes applied to piezoresistive pressure sensors. A detailed model that utilizes a linearized Boltzman transport equation describes accurately the charge-carrier density and mobility in strained graphene and, hence, the gauge factor. The gauge factor is found to be practically independent of the doping concentration and crystallographic orientation of the graphene films. These investigations provide deeper insight into the piezoresistive behavior of graphene membranes.
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19.
  • Smith, Anderson D., et al. (författare)
  • Resistive graphene humidity sensors with rapid and direct electrical readout
  • 2015
  • Ingår i: Nanoscale. - : Royal Society of Chemistry (RSC). - 2040-3364 .- 2040-3372. ; 7:45, s. 19099-19109
  • Tidskriftsartikel (refereegranskat)abstract
    • We demonstrate humidity sensing using a change of the electrical resistance of single-layer chemical vapor deposited (CVD) graphene that is placed on top of a SiO2 layer on a Si wafer. To investigate the selectivity of the sensor towards the most common constituents in air, its signal response was characterized individually for water vapor (H2O), nitrogen (N-2), oxygen (O-2), and argon (Ar). In order to assess the humidity sensing effect for a range from 1% relative humidity (RH) to 96% RH, the devices were characterized both in a vacuum chamber and in a humidity chamber at atmospheric pressure. The measured response and recovery times of the graphene humidity sensors are on the order of several hundred milliseconds. Density functional theory simulations are employed to further investigate the sensitivity of the graphene devices towards water vapor. The interaction between the electrostatic dipole moment of the water and the impurity bands in the SiO(2)d substrate leads to electrostatic doping of the graphene layer. The proposed graphene sensor provides rapid response direct electrical readout and is compatible with back end of the line (BEOL) integration on top of CMOS-based integrated circuits.
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20.
  • Wagner, S., et al. (författare)
  • Graphene transfer methods for the fabrication of membrane-based NEMS devices
  • 2016
  • Ingår i: Microelectronic Engineering. - : Elsevier. - 0167-9317 .- 1873-5568. ; 159, s. 108-113
  • Tidskriftsartikel (refereegranskat)abstract
    • Graphene has extraordinary mechanical and electronic properties, making it a promising material for membrane based nanoelectromechanical systems (NEMS). Here, three methods for direct transfer of chemical vapor deposited graphene onto pre-fabricated micro cavity substrates were investigated and analyzed with respect to yield and quality of the free-standing membranes on a large-scale. An effective transfer method for layer-by-layer stacking of graphene was developed to improve the membrane stability and thereby increase the yield of completely covered and sealed cavities. The transfer method with the highest yield was used to fabricate graphene NEMS devices. Electrical measurements were carried out to successfully demonstrate pressure sensing as a possible application for these graphene membranes.
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21.
  • Abadal, Sergi, et al. (författare)
  • Graphene-Enabled Wireless Communication for Massive Multicore Architectures
  • 2013
  • Ingår i: IEEE Communications Magazine. - 0163-6804 .- 1558-1896. ; 51:11, s. 137-143
  • Tidskriftsartikel (refereegranskat)abstract
    • Current trends in microprocessor architecture design are leading towards a dramatic increase of core-level parallelization, wherein a given number of independent processors or cores are interconnected. Since the main bottleneck is foreseen to migrate from computation to communication, efficient and scalable means of inter-core communication are crucial for guaranteeing steady performance improvements in many-core processors. As the number of cores grows, it remains unclear whether initial proposals, such as the Network-on-Chip (NoC) paradigm, will meet the stringent requirements of this scenario. This position paper presents a new research area where massive multicore architectures have wireless communication capabilities at the core level. This goal is feasible by using graphene-based planar antennas, which can radiate signals at the Terahertz band while utilizing lower chip area than its metallic counterparts. To the best of our knowledge, this is the first work that discusses the utilization of graphene-enabled wireless communication for massive multicore processors. Such wireless systems enable broadcasting, multicasting, all-to-all communication, as well as significantly reduce many of the issues present in massively multicore environments, such as data coherency, consistency, synchronization and communication problems. Several open research challenges are pointed out related to implementation, communications and multicore architectures, which pave the way for future research in this multidisciplinary area.
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22.
  • Abermann, S., et al. (författare)
  • Comparative study on the impact of TiN and Mo metal gates on MOCVD-grown HfO2 and ZrO2 high-kappa dielectrics for CMOS technology
  • 2007
  • Ingår i: Physics of Semiconductors, Pts A and B. - : AIP. - 9780735403970 ; , s. 293-294
  • Konferensbidrag (refereegranskat)abstract
    • We compare metal oxide semiconductor capacitors, investigating Titanium-Nitride and Molybdenum as gate materials, as well as metal organic chemical vapor deposited ZrO2 and HfO2 as high-kappa dielectrics, respectively. The impact of different annealing steps on the electrical characteristics of the various gate stacks is a further issue. The positive effect of post metallization annealing in forming gas atmosphere as well as observed mid-gap pinning of TiN and Mo metal gates is presented.
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23.
  • Abermann, S., et al. (författare)
  • Impact of Al-, Ni-, TiN-, and Mo-metal gates on MOCVD-grown HfO2 and ZrO2 high-k dielectrics
  • 2007
  • Ingår i: Microelectronics and reliability. - : Elsevier BV. - 0026-2714 .- 1872-941X. ; 47:4-5, s. 536-539
  • Tidskriftsartikel (refereegranskat)abstract
    • In this work we compare the impacts of nickel (Ni), titanium-nitride (TiN), molybdenum (Mo), and aluminium (Al), gates on MOS capacitors incorporating HfO2- or ZrO2-dielectrics. The primary focus lies on interface trapping, oxide charging, and thermodynamical stability during different annealing steps of these gate stacks. Whereas Ni, Mo, and especially TIN are investigated as most promising candidates for future CMOS devices, Al acted as reference gate material to benchmark the parameters. Post-metallization annealing of both, TiN- and Mo-stacks, resulted in very promising electrical characteristics. However, gate stacks annealed at temperatures of 800 degrees C or 950 degrees C show thermodynamic instability and related undesirable high leakage currents.
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24.
  • Abermann, S., et al. (författare)
  • Processing and evaluation of metal gate/high-kappa/Si capacitors incorporating Al, Ni, TiN, and Mo as metal gate, and ZrO2 and HfO2 as high-kappa dielectric
  • 2007
  • Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 84:5-8, s. 1635-1638
  • Tidskriftsartikel (refereegranskat)abstract
    • We evaluate various metal gate/high-K/Si capacitors by their resulting electrical characteristics. Therefore, we process MOS gate stacks incorporating aluminium (Al), nickel (Ni), titanium-nitride (TiN), and molybdenum (Mo) as the gate material, and metal organic chemical vapour deposited (MOCVD) ZrO2 and HfO2 as the gate dielectric, respectively. The influence of the processing sequence - especially of the thermal annealing treatment - on the electrical characteristics of the various gate stacks is being investigated. Whereas post metallization annealing in forming gas atmosphere improves capacitance-voltage behaviour (due to reduced interface-, and oxide charge density), current-voltage characteristics degrade due to a higher leakage current after thermal treatment at higher temperatures. The Flatband-voltage values for the TiN-, Mo-, and Ni-capacitors indicate mid-gap pinning of the metal gates, however, Ni seems to be thermally unstable on ZrO2, at least within the process scheme we applied.
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25.
  • Balestra, F., et al. (författare)
  • NANOSIL network of excellence-silicon-based nanostructures and nanodevices for long-term nanoelectronics applications
  • 2008
  • Ingår i: Materials Science in Semiconductor Processing. - : Elsevier BV. - 1369-8001 .- 1873-4081. ; 11:5-6, s. 148-159
  • Tidskriftsartikel (refereegranskat)abstract
    • NANOSIL Network of Excellence [NANOSIL NoE web site < www.nanosil-noe.eu >], funded by the European Commission in the 7th Framework Programme (ICT-FP7, no 216171), aims at European scale integration of the excellent European research laboratories and their capabilities in order to strengthen scientific and technological excellence in the field of nanoelectronic materials and devices for terascale integrated circuits (ICs), and to disseminating the results in a wide scientific and industrial community. NANOSIL is exploring and assessing the science and technological aspects of nanodevices and operational regimes relevant to the n+4 technology node and beyond. It encompasses projects on nanoscale CMOS and beyond-CMOS. Innovative concepts, technologies and device architectures are proposed-with fabrication down to the finest features, and utilising a wide spectrum of advanced deposition and processing capabilities, extensive characterization and very rigorous device modeling. This work is carried out through a network of joint processing, characterization and modeling platforms. This critical interaction strengthens European integration in nanoelectronics and will speed up technological innovation for the nanoelectronics of the next two to three decades.
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26.
  • Baus, M., et al. (författare)
  • Device architectures based on graphene channels
  • 2008
  • Ingår i: 2008 IEEE INTERNATIONAL CONFERENCE ON INTEGRATED CIRCUIT DESIGN AND TECHNOLOGY, PROCEEDINGS. - NEW YORK : IEEE. ; , s. 269-272
  • Konferensbidrag (refereegranskat)abstract
    • Graphene is a possible candidate for advanced channel materials in future field effect transistors. This presentation gives a brief overview about recent experimental results in the field of graphene transistors for future electronic applications.
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27.
  • Baus, M, et al. (författare)
  • Fabrication of monolithic bidirectional switch devices
  • 2004
  • Ingår i: Microelectronic Engineering. - 0167-9317 .- 1873-5568. ; 73-4, s. 463-467
  • Tidskriftsartikel (refereegranskat)abstract
    • The fabrication scheme of a novel MOS-based power device, a monolithic bidirectional switch (MBS), is presented. This concept allows the integration of a bidirectional switch with the advantages of low power consumption, small package size, and low fabrication costs. Furthermore, device simulations predict a performance benefit for power applications such as matrix converters. In an MBS, the field effect is used to control carrier concentrations in elevated structures made up of nearly intrinsic silicon. A CMOS-compatible nano-fabrication process for the MBS is proposed, employing local oxidation of silicon for self-aligned contact formation. First electrical results are presented. (C) 2004 Elsevier B.V. All rights reserved.
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28.
  • Baus, M., et al. (författare)
  • Fabrication of monolithic bidirectional switch (MBS) devices with MOS-controlled emitter structures
  • 2006
  • Ingår i: PROCEEDINGS OF THE 18TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES &amp; ICS. ; , s. 181-184
  • Konferensbidrag (refereegranskat)abstract
    • A novel high-voltage power device, the Monolithic Bidirectional Switch (MBS) is investigated in this work. Planar MBS devices have been fabricated by a self-aligned fabrication process using local oxidation of silicon technique and self-aligned sificidation. Results obtained from electrical characterization are compared with numerical simulations. Using highly transparent universal contacts, bidirectional switching with an excellent on/off current ratio is demonstrated. On-current densities of 75 A/cm(2) at V(on) = 3 V have been achieved even in an exploratory device structure. Simulations further demonstrate the high potential of the MBS for future power electronic systems such as the matrix converter.
  •  
29.
  • Baus, M, et al. (författare)
  • Monolithic Bidirectional Switch (MBS) - A novel MOS-based power device
  • 2005
  • Ingår i: PROCEEDINGS OF ESSDERC 2005. - 0780392035 ; , s. 473-476
  • Konferensbidrag (refereegranskat)abstract
    • A novel MOS-based power device, the Monolithic Bidirectional Switch (MBS), is investigated in this work. An analytical model is used to explain basic device operating principles. A self-aligned fabrication process of lateral MBS devices with Schottky contacts and local oxidation of silicon technique (LOCOS) is described. Experimental results are compared with the analytical model to analyze the influence of device parasitics. Bidirectional switching and an on/off-current ratio of more than 100 is demonstrated for MBS devices for the first time.
  •  
30.
  • Buiu, O., et al. (författare)
  • Extracting the relative dielectric constant for "high-k layers" from CV measurements : Errors and error propagation
  • 2007
  • Ingår i: Microelectronics and reliability. - : Elsevier BV. - 0026-2714 .- 1872-941X. ; 47:4-5, s. 678-681
  • Tidskriftsartikel (refereegranskat)abstract
    • The paper pursues an investigation of the errors associated with the extraction of the dielectric constant (i.e., kappa value) from capacitance-voltage measurements on metal oxide semiconductor capacitors. The existence of a transition layer between the high-rc dielectric and the silicon substrate is a factor that affects - in general - the assessment of the electrical data, as well as the extraction of rc. A methodology which accounts for this transition layer and the errors related to other parameters involved in the k value extraction is presented; moreover, we apply this methodology to experimental CV results on HfO2/SiOx/Si structures produced in different conditions.
  •  
31.
  • Czernohorsky, M., et al. (författare)
  • Stability of crystalline Gd(2)O(3) thin films on silicon during rapid thermal annealing
  • 2008
  • Ingår i: Semiconductor Science and Technology. - : IOP Publishing. - 0268-1242 .- 1361-6641. ; 23:3, s. 035010-
  • Tidskriftsartikel (refereegranskat)abstract
    • We investigate the impact of rapid thermal anneals on structural and electrical properties of crystalline Gd(2)O(3) layers grown on Si with different orientations. Due to additional oxygen from the annealing ambient, a structureless two-layer stack ( silicon-oxide-like and silicate-like) between the silicon and the crystalline oxide will be formed. The degradation of layers can be significantly reduced by sealing the layer with a-Si prior to annealing. For the capped layers, the effective capacitance equivalent thickness increases only slightly even after a 1000 degrees C anneal.
  •  
32.
  • Del, Sepideh Khandan, et al. (författare)
  • Optimizing the optical and electrical properties of graphene ink thin films by laser-annealing
  • 2015
  • Ingår i: Current Opinion in Chemical Engineering. - : Institute of Physics (IOP). - 2211-3398. ; 2:1
  • Tidskriftsartikel (refereegranskat)abstract
    • We demonstrate a facile fabrication technique for graphene-based transparent conductive films. Highly flat and uniform graphene films are obtained through the incorporation of an efficient laser annealing technique with one-time drop casting of high-concentration graphene ink. The resulting thin films are uniform and exhibit a transparency of more than 85% at 550 nm and a sheet resistance of about 30 kΩ/sq. These values constitute an increase of 45% in transparency, a reduction of surface roughness by a factor of four and a decrease of 70% in sheet resistance compared to un-annealed films.
  •  
33.
  • Driussi, F., et al. (författare)
  • Fabrication, characterization and modeling of strained SOI MOSFETs with very large effective mobility
  • 2007
  • Ingår i: ESSDERC 2007. - 9781424411238 ; , s. 315-318
  • Konferensbidrag (refereegranskat)abstract
    • Strained Silicon on insulators (sSOI) wafers with a supercritical thickness of 58 nm were produced using thin strain relaxed SiGe buffer layers, wafer bonding, selective etch back and epitaxial overgrowth. Raman spectroscopy revealed an homogeneous strain of 0.63 +/- 0.03% in the strained Si layer. Long channel n-type SOI-MOSFETs showed very large electron mobilities up to 1200 cm(2)/Vs in the strained Si devices. These values are more than two times larger than those of reference SOI n-MOSFETs. Mobility simulations with state of the art scattering models are then used to interpret the experiments.
  •  
34.
  • Echtermeyer, T., et al. (författare)
  • Investigation of MOS capacitors and SOI-MOSFETs with epitaxial gadolinium oxide (Gd2O3) and titanium nitride (TiN) electrodes
  • 2007
  • Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 51:4, s. 617-621
  • Tidskriftsartikel (refereegranskat)abstract
    • Electrical properties of metal oxide semiconductor (MOS) capacitors with gate stacks of epitaxial gadolinium oxide (Gd2O3) and titanium nitride (TiN) are studied. The influence of CMOS compatible rapid thermal annealing on these gate stacks is examined. Finally, n- and p-type MOS-field effect transistors (MOSFETs) on silicon on insulator (SOI) material with epitaxial Gd2O3 and TiN gate electrodes are presented.
  •  
35.
  • Echtermeyer, T. J., et al. (författare)
  • Graphene field-effect devices
  • 2007
  • Ingår i: The European Physical Journal Special Topics. - : Springer Science and Business Media LLC. - 1951-6355 .- 1951-6401. ; 148:1, s. 19-26
  • Tidskriftsartikel (refereegranskat)abstract
    • In this article, graphene is investigated with respect to its electronic properties when introduced into field effect devices ( FED). With the exception of manual graphene deposition, conventional top-down CMOS-compatible processes are applied. Few and monolayer graphene sheets are characterized by scanning electron microscopy, atomic force microscopy and Raman spectroscopy. The electrical properties of monolayer graphene sandwiched between two silicon dioxide films are studied. Carrier mobilities in graphene pseudo-MOS structures are compared to those obtained from double-gated Graphene-FEDs and silicon metal-oxide-semiconductor field-effect-transistors ( MOSFETs).
  •  
36.
  • Echtermeyer, Tim J., et al. (författare)
  • Nonvolatile switching in graphene field-effect devices
  • 2008
  • Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 29:8, s. 952-954
  • Tidskriftsartikel (refereegranskat)abstract
    • The absence of a band gap in graphene restricts its straightforward application as a channel material in field-effect transistors. In this letter, we report on a new approach to engineer a band gap in graphene field-effect devices (FEDs) by controlled structural modification of the graphene channel itself. The conductance in the FEDs is switched between a conductive "ON-state" and an insulating "OFF-state" with more than six orders of magnitude difference in conductance. Above a critical value of an electric field applied to the FED gate under certain environmental conditions, a chemical modification takes place to form insulating graphene derivatives. The effect can be reversed by electrical fields of opposite polarity or short current pulses to recover the initial state. These reversible switches could potentially be applied to nonvolatile memories and novel neuromorphic processing concepts.
  •  
37.
  • Efavi, J K, et al. (författare)
  • Investigation of NiAlN as gate-material for submicron CMOS technology
  • 2004
  • Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 76:1-4, s. 354-359
  • Tidskriftsartikel (refereegranskat)abstract
    • Nickel-Aluminium-Nitride (NiAlN) is investigated as gate material for submicron CMOS technology for the first time. The MAIN films have been reactively sputtered from a Ni0.5Al0.5 target in a mixture of argon and nitrogen gas. The influence of the reactive gas content and process temperatures on the work function is presented. Electrical properties are extracted from high and low frequency capacitance-voltage measurements (QSCV, HFCV). Resistivity measurements are shown for various process conditions. Interface properties are observed by transmission electron microscopy. Primarily results show NiAlN's suitability for use as gate material in a CMOS replacement gate technology. Fabrication of n-type metal-oxide-semiconductor field effect transistors with a MAIN gates activated at 900 degreesC is demonstrated.
  •  
38.
  • Efavi, J K, et al. (författare)
  • Tungsten work function engineering for dual metal gate nano-CMOS
  • 2005
  • Ingår i: Journal of materials science. Materials in electronics. - : Springer Science and Business Media LLC. - 0957-4522 .- 1573-482X. ; 16:7, s. 433-436
  • Tidskriftsartikel (refereegranskat)abstract
    • A buffer layer technology for work function engineering of tungsten for dual metal gate Nano-CMOS is investigated. For the first time, tungsten is used as a p-type gate material using 1 nm of sputtered Aluminum Nitride (AlNx) as a buffer layer on silicon dioxide (SiO2) gate dielectric. A tungsten work function of 5.12 eV is realized using this technology in contrast to a mid-gap value of 4.6 eV without a buffer layer. Device characteristics of a p-MOSFET on silicon-on-insulator (SOI) substrate fabricated with this technology are presented.
  •  
39.
  • Engstrom, O., et al. (författare)
  • Navigation aids in the search for future high-k dielectrics : Physical and electrical trends
  • 2007
  • Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 51:4, s. 622-626
  • Tidskriftsartikel (refereegranskat)abstract
    • From experimental literature data on metal oxides combined with theoretical estimates, we present empirical relations for k-values and energy band offset values, that can be used in the search for gate dielectric materials fulfilling the needs of future CMOS generations. Only a few materials investigated so far have properties meeting the demands for k and energy band offset values in the development of CMOS down to 22 nm. (c) 2007 Elsevier Ltd. All rights reserved.
  •  
40.
  • Fan, Xuge, et al. (författare)
  • Direct observation of grain boundaries in graphene through vapor hydrofluoric acid (VHF) exposure
  • 2018
  • Ingår i: Science Advances. - : American Association for the Advancement of Science. - 2375-2548. ; 4:5
  • Tidskriftsartikel (refereegranskat)abstract
    • The shape and density of grain boundary defects in graphene strongly influence its electrical, mechanical, and chemical properties. However, it is difficult and elaborate to gain information about the large-area distribution of grain boundary defects in graphene. An approach is presented that allows fast visualization of the large-area distribution of grain boundary–based line defects in chemical vapor deposition graphene after transferring graphene from the original copper substrate to a silicon dioxide surface. The approach is based on exposing graphene to vapor hydrofluoric acid (VHF), causing partial etching of the silicon dioxide underneath the graphene as VHF diffuses through graphene defects. The defects can then be identified using optical microscopy, scanning electron microscopy, or Raman spectroscopy. The methodology enables simple evaluation of the grain sizes in polycrystalline graphene and can therefore be a valuable procedure for optimizing graphene synthesis processes.
  •  
41.
  • Fan, Xuge, 1985-, et al. (författare)
  • Humidity and CO2 gas sensing properties of double-layer graphene
  • 2018
  • Ingår i: Carbon. - Netherlands : Elsevier. - 0008-6223 .- 1873-3891. ; 127, s. 576-587
  • Tidskriftsartikel (refereegranskat)abstract
    • Graphene has interesting gas sensing properties with strong responses of the graphene resistance when exposed to gases. However, the resistance response of double-layer graphene when exposed to humidity and gasses has not yet been characterized and understood. In this paper we study the resistance response of double-layer graphene when exposed to humidity and CO2, respectively. The measured response and recovery times of the graphene resistance to humidity are on the order of several hundred milliseconds. For relative humidity levels of less than ~ 3% RH, the resistance of double-layer graphene is not significantly influenced by the humidity variation. We use such a low humidity atmosphere to investigate the resistance response of double-layer graphene that is exposed to pure CO2 gas, showing a consistent response and recovery behaviour. The resistance of the double-layer graphene decreases linearly with increase of the concentration of pure CO2 gas. Density functional theory simulations indicate that double-layer graphene has a weaker gas response compared to single-layer graphene, which is in agreement with our experimental data. Our investigations contribute to improved understanding of the humidity and CO2 gas sensing properties of double-layer graphene which is important for realizing viable graphene-based gas sensors in the future.
  •  
42.
  • Fan, Xuge, et al. (författare)
  • Suspended Graphene Membranes with Attached Silicon Proof Masses as Piezoresistive Nanoelectromechanical Systems Accelerometers
  • 2019
  • Ingår i: Nano letters (Print). - : American Chemical Society (ACS). - 1530-6984 .- 1530-6992. ; 19:10, s. 6788-6799
  • Tidskriftsartikel (refereegranskat)abstract
    • Graphene is an atomically thin material that features unique electrical and mechanical properties, which makes it an extremely promising material for future nanoelectromechanical systems (NEMS). Recently, basic NEMS accelerometer functionality has been demonstrated by utilizing piezoresistive graphene ribbons with suspended silicon proof masses. However, the proposed graphene ribbons have limitations regarding mechanical robustness, manufacturing yield, and the maximum measurement current that can be applied across the ribbons. Here, we report on suspended graphene membranes that are fully clamped at their circumference and have attached silicon proof masses. We demonstrate their utility as piezoresistive NEMS accelerometers, and they are found to be more robust, have longer life span and higher manufacturing yield, can withstand higher measurement currents, and are able to suspend larger silicon proof masses, as compared to the previous graphene ribbon devices. These findings are an important step toward bringing ultraminiaturized piezoresistive graphene NEMS closer toward deployment in emerging applications such as in wearable electronics, biomedical implants, and internet of things (IoT) devices.
  •  
43.
  • Geringer, V., et al. (författare)
  • Intrinsic and extrinsic corrugation of monolayer graphene deposited on SiO(2)
  • 2009
  • Ingår i: Physical Review Letters. - 0031-9007 .- 1079-7114. ; 102:7, s. 076102-
  • Tidskriftsartikel (refereegranskat)abstract
    • Using scanning tunneling microscopy in an ultrahigh vacuum and atomic force microscopy, we investigate the corrugation of graphene flakes deposited by exfoliation on a Si/SiO(2) (300 nm) surface. While the corrugation on SiO(2) is long range with a correlation length of about 25 nm, some of the graphene monolayers exhibit an additional corrugation with a preferential wavelength of about 15 nm. A detailed analysis shows that the long-range corrugation of the substrate is also visible on graphene, but with a reduced amplitude, leading to the conclusion that the graphene is partly freely suspended between hills of the substrate. Thus, the intrinsic rippling observed previously on artificially suspended graphene can exist as well, if graphene is deposited on SiO(2).
  •  
44.
  • Gomeniuk, Y., et al. (författare)
  • Low-temperature conductance measurements of surface states in HfO2-Si structures with different gate materials
  • 2006
  • Ingår i: Materials Science in Semiconductor Processing. - : Elsevier BV. - 1369-8001 .- 1873-4081. ; 9:6, s. 980-984
  • Tidskriftsartikel (refereegranskat)abstract
    • Metal-oxide-semiconductor capacitors based on HfO2 gate stack with different metal and metal compound gates (Al, TiN, NiSi and NiAlN) are compared to study the effect of the gate electrode material on the trap density at the insulator-semiconductor interface. C-V and G-omega measurements were made in the frequency range from 1 kHz to 1 MHz in the temperature range 180-300 K. From the maximum of the plot G/omega vs. ln(omega) the density of interface states was calculated, and from its position on the frequency axis the trap cross-section was found. Reducing temperature makes it possible to decrease leakage current through the dielectric and to investigate the states located closer to the band edge. The structures under study were shown to contain significant interface trap densities located near the valence band edge (around 2 x 10(11) cm(-2)eV(-1) for Al and up to (3.5-5.5) x 10(12)cm(-2)eV(-1) for other gate materials). The peak in the surface state distribution is situated at 0.18 eV above the valence band edge for Al electrode. The capture cross-section is 5.8 x 10(-17)cm(2) at 200 K for Al-HfO2-Si structure.
  •  
45.
  • Gottlob, H. D. B., et al. (författare)
  • 0.86-nm CET gate stacks with epitaxial Gd2O3 high-k dielectrics and FUSINiSi metal electrodes
  • 2006
  • Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 27:10, s. 814-816
  • Tidskriftsartikel (refereegranskat)abstract
    • In this letter, ultrathin gadolinium oxide (Gd2O3) high-kappa gate dielectrics with complementary-metal-oxide-semiconductor (CMOS)-compatible fully silicided nickel-silicide metal gate electrodes are reported for the first time. MOS capacitors with a Gd2O3 thickness of 3.1 nm yield a capacitance equivalent oxide thickness of CET = 0.86 nm. The extracted dielectric constant is kappa =-13-14. Leakage currents and equivalent oxide thicknesses of this novel gate stack meet the International Technology Roadmap for Semiconductors targets for the near term schedule and beyond.
  •  
46.
  • Gottlob, H. D. B., et al. (författare)
  • Approaches to CMOS integration of epitaxial gadolinium oxide high-K dielectrics
  • 2006
  • Ingår i: ESSDERC 2006. - 9781424403011 ; , s. 150-153
  • Konferensbidrag (refereegranskat)abstract
    • Two process concepts for integration of novel gate stacks with epitaxial high-K dielectrics and metal gate electrodes are presented. A "gate first" process based on a planar gate stack on ultra thin SOI material has been used for successful fabrication of MOSFETs with TiN/Gd2O3 gate stack. Furthermore MOSFETs with W/Gd2O3 gate stack have been fabricated with a replacement gate process. This is the first successful attempt to integrate crystalline high-K dielectrics into a "gentle" damascene metal gate process in order to reduce process induced oxide damages.
  •  
47.
  • Gottlob, H. D. B., et al. (författare)
  • CMOS integration of epitaxial Gd(2)O(3) high-k gate dielectrics
  • 2006
  • Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 50:6, s. 979-985
  • Tidskriftsartikel (refereegranskat)abstract
    • Epitaxial gadolinium oxide (Gd(2)O(3)) high-k dielectrics are investigated with respect to their CMOS compatibility in metal oxide semiconductor (MOS) capacitors and field effect transistors (MOSFETs). MOS capacitors with various gate electrodes are exposed to typical CMOS process steps and evaluated with capacitance voltage (CV) and current voltage (JV) measurements. The effects of high temperature processes on thermal stabilities of channel/dielectric and dielectric/gate electrode interfaces is studied in detail. A feasible CMOS process with epitaxial gate oxides and metal gate electrodes is identified and demonstrated by a fully functional n-MOSFET for the first time.
  •  
48.
  • Gottlob, H. D. B., et al. (författare)
  • Gd silicate : A high-k dielectric compatible with high temperature annealing
  • 2009
  • Ingår i: Journal of Vacuum Science & Technology B. - : American Vacuum Society. - 1071-1023 .- 1520-8567 .- 2166-2754 .- 2166-2746. ; 27:1, s. 249-252
  • Tidskriftsartikel (refereegranskat)abstract
    • The authors report on the investigation of amorphous Gd-based silicates as high-k dielectrics. Two different stacks of amorphous gadolinium oxide (Gd(2)O(3)) and silicon oxide (SiO(2)) on silicon substrates are compared after annealing at temperatures up to 1000 degrees C. Subsequently formed metal oxide semiconductor capacitors show a significant reduction in the capacitance equivalent thicknesses after annealing. Transmission electron microscopy, medium energy ion scattering, and x-ray diffraction analysis reveal distinct structural changes such as consumption of the SiO(2) layer and formation of amorphous Gd silicate. The controlled formation of Gd silicates in this work indicates a route toward high-k dielectrics compatible with conventional, gate first complementary metal-oxide semiconductor integration schemes.
  •  
49.
  • Gottlob, H. D. B., et al. (författare)
  • Gentle FUSI NiSi metal gate process for high-k dielectric screening
  • 2008
  • Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 85:10, s. 2019-2021
  • Tidskriftsartikel (refereegranskat)abstract
    • In this paper, a process flow well suited for screening of novel high-k dielectrics is presented. In vacuo silicon capping of the dielectrics excludes process and handling induced influences especially if hygroscopic materials are investigated. A gentle, low thermal budget process is demonstrated to form metal gate electrodes by turning the silicon capping into a fully silicided nickel silicide. This process enables the investigation of rare earth oxide based high-k dielectrics and specifically their intrinsic material properties using metal oxide semiconductor (MOS) capacitors. We demonstrate the formation of nickel monosilicide electrodes which show smooth interfaces to the lanthanum- and gadolinium-based high-k oxide films. The dielectrics have equivalent oxide thicknesses of EOT = 0.95 nm (lanthanum silicate) and EOT = 0.6 nm (epitaxial gadolinium oxide).
  •  
50.
  • Gottlob, H D B, et al. (författare)
  • Introduction of crystalline high-k gate dielectrics in a CMOS process
  • 2005
  • Ingår i: Journal of Non-Crystalline Solids. - : Elsevier BV. - 0022-3093 .- 1873-4812. ; 351:21-23, s. 1885-1889
  • Tidskriftsartikel (refereegranskat)abstract
    • In this work we report on methods to introduce crystalline rare-earth (RE) oxides with high (k > 3.9) dielectric constants (high-k) in a CMOS process flow. Key process steps compatible with crystalline praseodymium oxide (Pr2O3) high-k gate dielectric have been developed and evaluated in metal-oxide-semiconductor (MOS) structures and n-MOS transistors fabricated in an adapted conventional bulk process. From capacitance-voltage measurements a dielectric constant of k = 36 has been calculated. Furthermore an alternative process sequence suitable for the introduction of high-k material into silicon on insulator (SOI) MOS-field-effect-transistors (MOSFET) is presented. The feasibility of this process is shown by realization of n- and p-MOSFETs with standard SiO2 gate dielectric as demonstrator. SiO2 gate dielectric can be replaced by crystalline RE-oxides in the next batch fabrication.
  •  
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