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Träfflista för sökning "WFRF:(Lopes J.M.J) "

Sökning: WFRF:(Lopes J.M.J)

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1.
  • Ducroquet, F., et al. (författare)
  • Admittance spectroscopy of Si/LaLuO3 and Si/GdSiO MOS Structures (Invited)
  • 2012
  • Ingår i: ECS Transactions. - : The Electrochemical Society. - 1938-5862 .- 1938-6737. ; 45:3, s. 103 - 117
  • Konferensbidrag (refereegranskat)abstract
    • Interface states at the gate oxide/channel of metal oxide semiconductor (MOS) transistors generally result in detrimental effects on the device performance which need to be considered for the new generations of high-k dielectrics. In this paper, the admittance of Gadolinium silicate (GdSiO) and Lanthanum Lutetium oxide (LaLuO3) MOS capacitors were investigated as a function of the signal frequency, temperature and gate voltage. The Arrhenius plots of the peak pulsations extracted from the conductance spectra have been discussed on the bases of simulated data taking into account a distribution of the trap energy levels and a thermally enhanced capture cross-section. The consequences of a peaked interface state distribution on the evolution of activation energies are shown to lead to Arrhenius plots following the Meyer-Neldel Rule.
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3.
  • Gomeniuk, Y. Y., et al. (författare)
  • Electrical properties of high-k LaLuO3 gate oxide for SOI MOSFETs
  • 2011
  • Ingår i: 6th International Workshop on Semiconductor-on-Insulator Materials and Devices. - 9783037851784 ; , s. 87-93
  • Konferensbidrag (refereegranskat)abstract
    • The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-? LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO 3/Si interface is presented and typical maxima of 1.2×10 11 eV-1cm-2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 μm and 50 μm, respectively) are presented. The front channel mobility appeared to be 126 cm2V -1s-1 and 70 cm2V-1s-1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.
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4.
  • Gomeniuk, Y. Y, et al. (författare)
  • Electrical properties of LaLuO3/Si(100) structures prepared by molecular beam deposition
  • 2010
  • Ingår i: ECS Transactions. - : The Electrochemical Society. - 1938-5862 .- 1938-6737. - 9781566778220 ; 33:3, s. 221-227
  • Konferensbidrag (refereegranskat)abstract
    • The paper presents the results of electrical characterization in the wide temperature range (120-320 K) of the interface and bulk properties of high-k LaLuO3 dielectric deposited by molecular beam deposition (MBD) on silicon substrate. The energy distribution of interface state density is presented and typical maxima of 1.2×1011 and 2.5×10 11 eV-1 cm-2 were found at about 0.25-0.3 eV from the silicon valence band. The charge carrier transport through the dielectric at the forward bias was found to occur via Poole-Frenkel mechanism, while variable range hopping conduction (Mott's law) controls the current at the reverse bias.
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5.
  • Mitrovic, I. Z., et al. (författare)
  • On the nature of the interfacial layer in ultra-thin TiN/LaluO3 gate stacks
  • 2012
  • Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 112:4, s. 044102-
  • Tidskriftsartikel (refereegranskat)abstract
    • We present a detailed investigation on the nature of the interfacial layer (IL) in ultra-thin TiN/LaLuO3 (LLO) gate stacks, which is of importance to facilitate CMOS scaling. The molecular beam deposited LaLuO3 films are found to be amorphous by high-resolution transmission electron microscopy. A similar to 9 angstrom thick LaLuO3/interlayer transition observed by medium energy ion scattering correlates with the presence of a dual silicate/SiO2-like interfacial layer derived from the analysis of photoelectron line positions and electron energy loss spectra. A theoretical model is used for the dielectric transition in a bi-layer LaLuO3/IL structure, linking physical and electrical characterization data. The obtained leakage current of 10(-3) A/cm(2) at 1.5 V and equivalent oxide thickness of 0.75 nm for TiN/LaLuO3 gate stacks are adequate for scaling in the 14-12 nm node.
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6.
  • Aad, G., et al. (författare)
  • 2013
  • Tidskriftsartikel (refereegranskat)
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7.
  • Aad, G., et al. (författare)
  • 2012
  • Tidskriftsartikel (refereegranskat)
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8.
  • Aad, G., et al. (författare)
  • 2013
  • Tidskriftsartikel (refereegranskat)
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9.
  • Aad, G., et al. (författare)
  • 2013
  • Tidskriftsartikel (refereegranskat)
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10.
  • Aad, G., et al. (författare)
  • 2013
  • Tidskriftsartikel (refereegranskat)
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  • Resultat 1-10 av 10

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