| 1. |
- Bakowski, Mietek, et al.
(författare)
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Design and characterization of newly developed 10 kV 2 A SiC p-i-n diode for soft-switching industrial power supply
- 2015
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Ingår i: IEEE Transactions on Electron Devices. - : Institute of Electrical and Electronics Engineers Inc.. - 0018-9383 .- 1557-9646. ; 62:2, s. 366-373
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Tidskriftsartikel (refereegranskat)abstract
- 10 kV, 2 A SiC p-i-n diodes have been designed and fabricated. The devices feature excellent stability of forward characteristics and robust junction termination with avalanche capability of 1 J. The fabricated diodes have been electrically evaluated with respect to dynamic ON-state voltage, reverse recovery behavior, bipolar stability, and avalanche capability. More than 60% reduction of losses has been demonstrated using newly developed 10-kV p-i-n diodes in a multikilowatt high voltage, high-frequency dc/dc soft-switching converter
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| 2. |
- Eriksson, Jens, et al.
(författare)
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Nanoscale characterization of electrical transport at metal/3C-SiC interfaces
- 2010
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Ingår i: NANOSCALE RESEARCH LETTERS. - : Springer. - 1931-7573. ; 6:120
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Tidskriftsartikel (refereegranskat)abstract
- In this work, the transport properties of metal/3C-SiC interfaces were monitored employing a nanoscale characterization approach in combination with conventional electrical measurements. In particular, using conductive atomic force microscopy allowed demonstrating that the stacking fault is the most pervasive, electrically active extended defect at 3C-SiC(111) surfaces, and it can be electrically passivated by an ultraviolet irradiation treatment. For the Au/3C-SiC Schottky interface, a contact area dependence of the Schottky barrier height (Phi(B)) was found even after this passivation, indicating that there are still some electrically active defects at the interface. Improved electrical properties were observed in the case of the Pt/3C-SiC system. In this case, annealing at 500 degrees C resulted in a reduction of the leakage current and an increase of the Schottky barrier height (from 0.77 to 1.12 eV). A structural analysis of the reaction zone carried out by transmission electron microscopy [TEM] and X-ray diffraction showed that the improved electrical properties can be attributed to a consumption of the surface layer of SiC due to silicide (Pt2Si) formation. The degradation of Schottky characteristics at higher temperatures (up to 900 degrees C) could be ascribed to the out-diffusion and aggregation of carbon into clusters, observed by TEM analysis.
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| 3. |
- Ghandi, Reza, et al.
(författare)
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Surface-passivation effects on the performance of 4H-SiC BJTs
- 2011
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Ingår i: IEEE Transactions on Electron Devices. - 0018-9383 .- 1557-9646. ; 58, s. 259-265
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Tidskriftsartikel (refereegranskat)abstract
- In this brief, the electrical performance in terms of maximum current gain and breakdown voltage is compared experimentally and by device simulation for 4H-SiC BJTs passivated with different surface-passivation layers. Variation in bipolar junction transistor (BJT) performance has been correlated to densities of interface traps and fixed oxide charge, as evaluated through MOS capacitors. Six different methods were used to fabricate SiO2 surface passivation on BJT samples from the same wafer. The highest current gain was obtained for plasma-deposited SiO2 which was annealed in N2O ambient at 1100 °C for 3 h. Variations in breakdown voltage for different surface passivations were also found, and this was attributed to differences in fixed oxide charge that can affect the optimum dose of the high-voltage junction-termination extension (JTE). The dependence of breakdown voltage on the dose was also evaluated through nonimplanted BJTs with etched JTE.
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| 4. |
- Hertel, Stefan, et al.
(författare)
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Tailoring the graphene/silicon carbide interface for monolithic wafer-scale electronics
- 2012
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Ingår i: Nature Communications. - : Springer Science and Business Media LLC. - 2041-1723. ; 3
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Tidskriftsartikel (refereegranskat)abstract
- Graphene is an outstanding electronic material, predicted to have a role in post-silicon electronics. However, owing to the absence of an electronic bandgap, graphene switching devices with high on/off ratio are still lacking. Here in the search for a comprehensive concept for wafer-scale graphene electronics, we present a monolithic transistor that uses the entire material system epitaxial graphene on silicon carbide (0001). This system consists of the graphene layer with its vanishing energy gap, the underlying semiconductor and their common interface. The graphene/semiconductor interfaces are tailor-made for ohmic as well as for Schottky contacts side-by-side on the same chip. We demonstrate normally on and normally off operation of a single transistor with on/off ratios exceeding 10 4 and no damping at megahertz frequencies. In its simplest realization, the fabrication process requires only one lithography step to build transistors, diodes, resistors and eventually integrated circuits without the need of metallic interconnects.
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| 5. |
- Lim, Jang-Kwon, et al.
(författare)
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Temperature-dependent characteristics of 4H-SiC buried grid JBS diodes
- 2015
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Ingår i: Materials Science Forum. - : Trans Tech Publications Inc.. - 9783038354789 ; 821/823, s. 600-603
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Konferensbidrag (refereegranskat)abstract
- 4H-SiC Schottky Barrier Diodes (SBD) have been developed using p-type buried grids (BGs) formed by Al implantation. In order to reduce on-state resistance and improve forward conduction, the doping concentration of the channel region between the buried grids was increased. The fabricated diodes were encapsulated with TO-254 packages and electrically evaluated. Experimental forward and reverse characteristics were measured in the temperature range from 25 °C to 250 °C. On a bare die level, the forward voltage drop was reduced from 5.36 V to 3.90 V at 20 A as the channel doping concentration was increased in order to reduce the channel resistance. After encapsulation in a TO-254 package, the forward voltage drop was decreased by approximately 10% due to a lower contact resistance. The on-state resistance of an identical device measured on the bare die and in the TO-254 package increased with increasing temperature due to the decreased electron mobility in the drift region resulting in higher resistance. The incremental contact resistances of the bare dies were larger than in the packaged devices. One key issue associated with conventional Junction Barrier Schottky (JBS) diodes is a high leakage current at high temperature operation over 200 °C. The developed Buried Grid JBS (BG JBS) diode has significantly reduced leakage current due to a better field shielding at the Schottky contact. The leakage current of the packaged BG JBS diodes is compared to conventional SBD and commercial JBS diodes.
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| 6. |
- Lorenzzi, Jean, et al.
(författare)
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3C-SiC MOS based devices : from material growth to device characterization
- 2011
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Ingår i: Silicon carbide and related materials 2010. - : Trans Tech Publications, Ltd.. ; , s. 433-
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Konferensbidrag (refereegranskat)abstract
- In this work we report on the growth and preparation of 3C-SiC(111) material for metal-oxide-semiconductor (MOS) application. In order to achieve reasonable material quality to prepare MOS capacitors several and crucial steps are needed: 1) heteroepitaxial growth of high quality 3C-SiC(111) layer by vapour-liquid-solid mechanism on 6H-SiC(0001) substrate, 2) surface polishing, 3) homoepitaxial re-growth by chemical vapour deposition and 4) use of an advanced oxidation process combining plasma enhanced chemical vapour deposition (PECVD) SiO2 and short post-oxidation steps in wet oxygen. Combining all these processes the interface traps density (D-it)can be drastically decreased down to 1.2 x 10(10) eV(-1)cm(-2) at 0.63 eV below the conduction band. To our knowledge, these values are the best ever reported for SiC material in general and 3C-SiC in particular.
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| 7. |
- Mikhaylov, Aleksey I., et al.
(författare)
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Alternative method of interface traps passivation by introducing of thin silicon nitride layer at 4H-SiC/SiO2 interface
- 2014
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Ingår i: Materials Research Society Symposium Proceedings. - : Springer Science and Business Media LLC.
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Konferensbidrag (refereegranskat)abstract
- An alternative approach for reduction of interface traps density at 4H-SiC/SiO2 interface is proposed. Silicon nitride / silicon oxide stack was deposited on p-type 4H-SiC (0001) epilayers and subsequently over-oxidized. The electrical characterization of the interface was done by employing metal-oxide semiconductor (MOS) devices, inversion-channel MOS devices and lateral MOS field effect transistors (MOSFETs).
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| 8. |
- Mikhaylov, Aleksey I., et al.
(författare)
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Effect of phosphorus implantation prior to oxidation on electrical properties of thermally grown SiO2/4H-SiC MOS structures
- 2015
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Ingår i: Mater. Sci. Forum. - : Trans Tech Publications Ltd. - 9783038352945 ; , s. 133-138
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Konferensbidrag (refereegranskat)abstract
- The electrical properties of metal-oxide-semiconductor (MOS) devices fabricated using dry oxidation on phosphorus-implanted n-type 4H-SiC (0001) epilayers have been investigated. MOS structures were compared in terms of interface traps and reliability with reference sample which was produced by dry oxidation under the same conditions. The notably lower interface traps density measured in MOS capacitor with phosphorus concentration exceeding 1018 cm-3 at the SiO2/SiC interface was attributed to interface traps passivation by incorporated phosphorus ions. © (2015) Trans Tech Publications, Switzerland.
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| 9. |
- Mikhaylov, Aleksey I., et al.
(författare)
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On the ion implantation of phosphorus as a method for the passivation of states at the interface between 4H-SiC and SiO2 produced by thermal oxidation in dry oxygen
- 2014
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Ingår i: Semiconductors (Woodbury, N.Y.). - : Maik Nauka-Interperiodica Publishing. - 1063-7826 .- 1090-6479. ; 48:12, s. 1581-1585
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Tidskriftsartikel (refereegranskat)abstract
- A method is suggested for reducing the density of surface states at the 4H-SiC/SiO2 interface by the implantation of phosphorus ions into a 4H-SiC epitaxial layer immediately before the growth of a gate insulator in an atmosphere of dry oxygen. A significant decrease in the density of surface states is observed at a phosphor-ion concentration at the SiO2/SiC interface exceeding 1018 cm−3. However, together with the passivation of surface states, the introduction of phosphorus ions leads to an increase in the built-in charge in the insulator and also slightly deteriorates the reliability of the gate insulator fabricated by this technique.
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| 10. |
- Roensch, Sebastian, et al.
(författare)
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Drain-current deep level transient spectroscopy investigation on epitaxial graphene/6H-SiC field effect transistors
- 2014
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Ingår i: Mater. Sci. Forum. - 9783038350101 ; , s. 436-439
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Konferensbidrag (refereegranskat)abstract
- The electrically active deep levels in a graphene/silicon carbide field effect transistor (FET) were investigated by drain-current deep level transient spectroscopy (ID-DLTS). An evaluation procedure for ID-DLTS is developed in order to obtain the activation energy, the capture cross section and the trap concentration. We observed three defect centers corresponding to the intrinsic defects E1/E2, Ei and Z1/Z2 in n-type 6H-SiC. The determined parameters have been verified by conventional capacitance DLTS.
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| 11. |
- Schöner, Adolf, et al.
(författare)
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Progress in buried grid technology for improvements in on-resistance of high voltage SiC devices
- 2016
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Ingår i: ECS Transactions. - : The Electrochemical Society. - 9781607685395 ; , s. 183-190
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Konferensbidrag (refereegranskat)abstract
- Buried grid technology is suggested to protect field sensitive device areas from high electric field in order to improve the high temperature and high voltage performance of SiC devices. More than three orders of magnitude lower leakage currents have been demonstrated at high temperature operation. The drawback is that the total resistance increases due to the introduction of the buried grid leading to higher voltage drop at rated current and higher conduction losses. In this paper, we discuss doping and barrier engineering methods in order to take full advantage of the superior shielding effect of the buried grid technology and at the same time minimize the effect on the current conduction. As example, the design considerations for a 1200 V SiC buried grid JBS diode in terms of epi structure doping as well as buried grid properties is comprehensively investigated to optimize the on-state condition.
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| 12. |
- Sledziewski, Tomasz, et al.
(författare)
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Reduction of density of 4H-SiC/SiO2 interface traps by pre-oxidation phosphorus implantation
- 2014
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Ingår i: Materials Science Forum. - 9783038350101 ; , s. 575-578
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Konferensbidrag (refereegranskat)abstract
- The effect of phosphorus (P) on the electrical properties of the 4H-SiC/SiO2 interface was investigated. Phosphorus was introduced by surface-near ion implantation with varying ion energy and dose prior to thermal oxidation. Secondary ion mass spectrometry revealed that only part of the implanted P followed the oxidation front to the interface. A negative flatband shift due to residual P in the oxide was found from C-V measurements. Conductance method measurements revealed a significant reduction of density of interface traps Dit with energy EC-Eit > 0.3 V for P+-implanted samples with [P]interface = 1.5 · 1018 cm-3 in the SiC layer at the interface. .
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| 13. |
- Yen, Cheng Tyng, et al.
(författare)
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Comparative study of 4H-SiC DMOSFETs with N2O thermal oxide and deposited oxide with post oxidation anneal
- 2014
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Ingår i: Materials Science Forum. - 9783038350101 ; , s. 989-992
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Konferensbidrag (refereegranskat)abstract
- Two kinds of gate oxides, direct thermal oxidation in a nitrous oxide ambient at 1250°C (TGO) and a PECVD oxide followed by a post deposition oxidation in nitrous oxide ambient at 1150°C (DGO) were studied. DGO showed a lower interface trap density and was able to provide a higher current as being implemented in MOSFETs through the improved channel mobility. However the 6.45 MV/cm average breakdown field of DGO is lower than the 10.1 MV/cm breakdown field of TGO. The lower breakdown field, more leaky behavior and the existence of multiple breakdown mechanisms suggest that DGO needs further improvements before it can be used in real applications.
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| 14. |
- Yen, Cheng Tyng, et al.
(författare)
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SiC epi-channel lateral MOSFETs
- 2014
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Ingår i: Materials Science Forum. - 9783038350101 ; , s. 927-930
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Konferensbidrag (refereegranskat)abstract
- SiC lateral MOSFETs with multi-layered epi-channels were studied in this work. The epi-channel consisting of a high concentration n-type epilayer sandwiched between two lightly doped p-type layers showed a maximum field effect mobility of 17 cm2/V.s, as compared to 1.53 cm2/V.s for inversion type devices without epi-channels. These devices are normally-off with an average threshold voltage of 1.34V.
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| 15. |
- Yuan, Zimo, et al.
(författare)
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Tailoring the Charge Carrier Lifetime Distribution of 10 kV SiC PiN Diodes by Physical Simulations
- 2023
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Ingår i: Key Engineering Materials. - : Trans Tech Publications, Ltd.. ; 946, s. 119-124
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Bokkapitel (övrigt vetenskapligt/konstnärligt)abstract
- Proton Implantation, Shockley-Read-Hall (SRH) Lifetime, IV characteristics, reverse recovery. Abstract. In this paper, Shockley-Read-Hall (SRH) lifetime depth profiles in the drift layer of 10 kV SiC PiN diodes are calculated after MeV proton implantation. It is assumed that the carbon vacancy is the domination trap for charge carrier recombination and the SRH lifetime is calculated with defect parameters from the literature and proton-induced defect distributions deduced from SRIM calculations. The lifetime profiles are imported to Sentaurus TCAD and static and dynamic simulations using tailored lifetime profiles are carried out to study the electrical effect of proton implantation parameters. The results are compared to measurements, specializing on optimization of the trade off between on-state and turn-off losses, represented by the forward voltage drop, VT, and reverse recovery charge, Qrr, respectively. Both the simulated and measured IV characteristics show that increasing proton dose, or energy, has the effect on increasing forward voltage drop and on-state losses, while simultaneously, the localized SRH lifetime drop decreases the plasma level, increases the speed of recombination and decreases reverse recovery charge. Finally, TCAD simulations with different combinations of proton energies and fluences are used to optimize the trade-off between static and dynamic performances. Reverse recovery charge and forward voltage drops of these groups of diodes are plotted together, showing that a medium energy which induces the most defects in the depletion region relatively close to the anode gives the best dynamic performances, with a minimum degradation of static performance.
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| 16. |
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| 17. |
- Zhang, Andy Zhenzhong, et al.
(författare)
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Planarization of epitaxial SiC trench structures by plasma ion etching
- 2015
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Ingår i: Materials Science Forum. - 0255-5476 .- 1662-9752. - 9783038354789 ; 821-823, s. 549-552
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Tidskriftsartikel (refereegranskat)abstract
- In this work, we present a planarization concept for epitaxial SiC trench structures involving reactive ion etching (RIE) and inductive coupled plasma (ICP) dry etching. The general idea is to transfer the flat surface from spun-on BCB/photo-resist layers to deposited silicon dioxide and finally to bulk SiC by applying process conditions with the same etch rate for the different materials. In this way several microns of unwanted material can be removed and planar SiC surfaces are obtained. With this method trench structures filled by epitaxial re-growth can be planarized with smooth surfaces and good homogeneity over the wafer. Cost-efficient device manufacturing can be achieved by using standard semiconductor process equipment. This technology makes it possible to manufacture advanced epitaxial SiC material structures for devices such as trench JBS diodes and double-gate trench JFETs.
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