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Sökning: WFRF:(Salemi Arash 1976 )

  • Resultat 1-4 av 4
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1.
  • Elahipanah, Hossein, 1982-, et al. (författare)
  • 500 °C High Current 4H-SiC Lateral BJTs for High-Temperature Integrated Circuits
  • 2017
  • Ingår i: IEEE Electron Device Letters. - : IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. - 0741-3106 .- 1558-0563.
  • Tidskriftsartikel (refereegranskat)abstract
    • High-current 4H-SiC lateral BJTs for high-temperature monolithic integrated circuits are fabricated. The BJTs have three different sizes and the designs are optimized in terms of emitter finger width and length and the device layout to have higher current density (JC), lower on-resistance (RON), and more uniform current distribution. A maximum current gain (β) of >53 at significantly high current density was achieved for different sizes of SiC BJTs. The BJTs are measured from room temperature to 500 °C. An open-base breakdown voltage (VCEO) of >50 V is measured for the devices.
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2.
  • Elahipanah, Hossein, 1982-, et al. (författare)
  • A Wafer-Scale Self-Aligned Ni-Silicide (SALICIDE) Low-Ohmic Contact Technology on n-type 4H-SiC
  • 2017
  • Ingår i: ECS Journal of Solid State Science and Technology. - : ECS. - 2162-8769 .- 2162-8777. ; 6:4, s. 197-200
  • Tidskriftsartikel (refereegranskat)abstract
    • A self-aligned nickel (Ni) silicide process for n-type Ohmic contacts on 4H-SiC is demonstrated and electrically verified in a wafer-scale device process. The key point is to anneal the contacts in two steps. The process is successfully employed on wafer-level and a contact resistivity below 5×10-6 Ω·cm2 is achieved. The influence of the proposed process on the oxide quality is investigated and no significant effect is observed. The proposed self-aligned technology eliminates the undesirable effects of the lift-off process. Moreover, it is simple, fast, and manufacturable at wafer-scale, which saves time and cost.
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3.
  • Elahipanah, Hossein, 1982-, et al. (författare)
  • Modification of Etched Junction Termination Extension for the High Voltage 4H-SiC Power Devices
  • 2016
  • Ingår i: Materials Science Forum. - : Trans Tech Publications Inc.. - 0255-5476 .- 1662-9752. ; 858, s. 978-981
  • Tidskriftsartikel (populärvet., debatt m.m.)abstract
    • High voltage 4H-SiC bipolar junction transistors (BJTs) with modified etched junction termination extension (JTE) are fabricated and optimized in terms of the length and remaining dose of JTEs. It is found that the JTE1 is the most effective one in spreading the electric field. Hence, for a given total termination length, a decremental JTE length from the innermost edge to the outermost mesa edge of the device results in better modification of the electric field. A breakdown voltage of 4.95 kV is measured for the modified device, which shows ~20% improvement of the termination efficiency for no extra cost or extra process step. Equal-size BJTs by interdigitated-emitter with different number of fingers and cell pitches are fabricated. It is presented that the maximum current gain decreases by having more fingers while the maximum current gain is achieved at higher current density.
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4.
  • Salemi, Arash, 1976- (författare)
  • Silicon Carbide Technology for High- and Ultra-High-Voltage Bipolar Junction Transistors and PiN Diodes
  • 2017
  • Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
    • Silicon carbide (SiC) is an attractive material for high-voltage and high-temperature electronic applications owing to the wide bandgap, high critical electric field, and high thermal conductivity. High- and ultra-high-voltage silicon carbide bipolar devices, such as bipolar junction transistors (BJTs) and PiN diodes, have the advantage of a low ON-resistance due to conductivity modulation compared to unipolar devices. However, in order to be fully competitive with unipolar devices, it is important to further improve the off-state and on-state characteristics, such as breakdown voltage, leakage current, common-emitter current gain, switching, current density, and ON-resistance.In order to achieve a high breakdown voltage with a low leakage current, an efficient and easy to fabricate junction edge protection or termination is needed. Among different proposed junction edge protections, a mesa design integrated with junction termination extensions (JTEs) is a powerful approach. In this work, implantation-free 4H-SiC BJTs in two classes of voltage, i.e., 6 kV-class and 15 kV-class with an efficient and optimized implantation-free junction termination (O-JTE) and multiple-shallow-trench junction termination extension (ST-JTE) are designed, fabricated and characterized. These terminations result in high termination efficiency of 92% and 93%, respectively.The 6 kV-class BJTs shows a maximum current gain of β = 44. A comprehensive study on the geometrical design is done in order to improve the on-state performances. For the first time, new cell geometries (square and hexagon) are presented for the SiC BJTs. The results show a significant improvement of the on-state characteristics because of a better utilization of the base area. At a given current gain, new cell geometries show a 42% higher current density and 21% lower ON-resistance. The results of this study, including an optimized fabrication process, are utilized in the 15 kV-class BJTs where a record high current gain of β = 139 is achieved.Ultra-high-voltage PiN diodes in two classes of voltage, i.e., 10+ kV using on-axis 4H-SiC and 15 kV-class off-axis 4H-SiC, are presented. O-JTE is utilized for 15 kV-class PiN diodes, while three steps ion-implantation are used to form the JTE in 10+ kV PiN diodes. Carbon implantation followed by high-temperature annealing is also performed for the 10+ kV PiN diodes in order to enhance the lifetime. Both type diodes depict conductivity modulation in the drift layer. No bipolar degradation is observed in 10+ kV PiN diodes.
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  • Resultat 1-4 av 4

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