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Sökning: WFRF:(Schöner A)

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1.
  • Mikhaylova, A. I., et al. (författare)
  • Specific features of the current–voltage characteristics of SiO2/4H-SiC MIS structures with phosphorus implanted into silicon carbide
  • 2016
  • Ingår i: Semiconductors (Woodbury, N.Y.). - 1063-7826 .- 1090-6479. ; 50:1, s. 103-105
  • Tidskriftsartikel (refereegranskat)abstract
    • The effect of phosphorus implantation into a 4H-SiC epitaxial layer immediately before the thermal growth of a gate insulator in an atmosphere of dry oxygen on the reliability of the gate insulator is studied. It is found that, together with passivating surface states, the introduction of phosphorus ions leads to insignificant weakening of the dielectric breakdown field and to a decrease in the height of the energy barrier between silicon carbide and the insulator, which is due to the presence of phosphorus atoms at the 4H-SiC/SiO2 interface and in the bulk of silicon dioxide.
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2.
  • Elahipanah, Hossein, et al. (författare)
  • Design optimization of a high temperature 1.2 kV 4H-SiC buried grid JBS rectifier
  • 2017
  • Ingår i: 11th European Conference on Silicon Carbide and Related Materials, ECSCRM 2016. - : Trans Tech Publications Inc.. - 9783035710434 ; , s. 455-458
  • Konferensbidrag (refereegranskat)abstract
    • 1.2 kV SiC buried grid junction barrier Schottky (BG-JBS) diodes are demonstrated. The design considerations for high temperature applications are investigated. The design is optimized in terms of doping concentration and thickness of the epilayers, as well as grid size and spacing dimensions, in order to obtain low on-resistance and reasonable leakage current even at high temperatures. The device behavior at temperatures ranging from 25 to 250ºC is analyzed and measured on wafer level. The forward voltage drop of 1.1 V at 100 A/cm2 and 3.8 V at 1000 A/cm2 is measured, respectively. At reverse voltage of 1 kV, a leakage current density below 0.1 μA/cm2 and below 0.1 mA/cm2 is measured at 25 and 250ºC, respectively. This proves the effective shielding effect of the BG-JBS design and provides benefits in high voltage applications, particularly for high temperature operation.
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3.
  • Kobayashi, M., et al. (författare)
  • 3C-SiC MOSFET with High Channel Mobility and CVD Gate Oxide
  • 2011
  • Ingår i: Materials Science Forum. - 0255-5476 .- 1662-9752. ; 679-680, s. 645-648
  • Tidskriftsartikel (refereegranskat)abstract
    • 3C-SiC MOSFET with 200 cm2/Vs channel mobility was fabricated. High performance device processes were adopted, including room temperature implantation with resist mask, polysilicon-metal gates, aluminium interconnects with titanium and titanium nitride and a specially developed activation anneal at 1600°C in Ar to get a smooth 3C-SiC surface and hence the expected high channel mobility. CVD deposited oxide with post oxidation annealing was investigated to reduce unwanted oxide charges and hence to get a better gate oxide integrity compared to thermally grown oxides. 3C-SiC MOSFETs with 600 V blocking voltage and 10 A drain current were fabricated using the improved processes described above. The MOSFETs assembled with TO-220 PKG indicated specific on-resistances of 5 to 7 mΩcm2.
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4.
  • Mikhaylov, Aleksey I., et al. (författare)
  • On the ion implantation of phosphorus as a method for the passivation of states at the interface between 4H-SiC and SiO2 produced by thermal oxidation in dry oxygen
  • 2014
  • Ingår i: Semiconductors (Woodbury, N.Y.). - : Maik Nauka-Interperiodica Publishing. - 1063-7826 .- 1090-6479. ; 48:12, s. 1581-1585
  • Tidskriftsartikel (refereegranskat)abstract
    • A method is suggested for reducing the density of surface states at the 4H-SiC/SiO2 interface by the implantation of phosphorus ions into a 4H-SiC epitaxial layer immediately before the growth of a gate insulator in an atmosphere of dry oxygen. A significant decrease in the density of surface states is observed at a phosphor-ion concentration at the SiO2/SiC interface exceeding 1018 cm−3. However, together with the passivation of surface states, the introduction of phosphorus ions leads to an increase in the built-in charge in the insulator and also slightly deteriorates the reliability of the gate insulator fabricated by this technique.
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5.
  • Esteve, Romain, et al. (författare)
  • Comparative study of thermal oxides and post-oxidized depositedoxides on n-type free standing 3C-SiC
  • 2010
  • Ingår i: Materials Science Forum. - 0255-5476 .- 1662-9752. ; 645-648, s. 829-832
  • Tidskriftsartikel (refereegranskat)abstract
    • The electrical properties of oxides fabricated on n-type 3C-SiC (001) using wet oxidationand an advanced oxidation process combining SiO 2 deposition with rapid post oxidation steps havebeen compared. Two alternative SiO 2 deposition techniques have been studied: the plasmaenhanced chemical vapor deposition (PECVD) and the low pressure chemical vapor deposition(LPCVD). The post-oxidized PECVD oxide is been demonstrated to be beneficial in terms ofinterface traps density and reliability.
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8.
  • Esteve, Romain, et al. (författare)
  • Toward 4H-SiC MISFETs Devices Based on ONO (SiO2-Si3N4-SiO2) Structures
  • 2011
  • Ingår i: Journal of the Electrochemical Society. - : The Electrochemical Society. - 0013-4651 .- 1945-7111. ; 5:158, s. 496-501
  • Tidskriftsartikel (refereegranskat)abstract
    • The electrical properties of metal-insulator-semiconductor (MIS) devices based on ONO (SiO2-Si3N4-SiO2) structures fabricatedon n-type 4H-SiC (0001) epilayers have been investigated. Three different combinations of low-pressure chemical vapordeposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD) and thermal oxidations (TO) in N2O and wet oxygenH2O:O2 were studied for the formation of the ONO stack. In addition, the influence of the thickness of SiO2and Si3N4 layers were considered and recommendations for optimal ONO structure are given. Oxide characterization tests and reliability investigations have been performed at room and high temperatures. This comparative study resulted in the development of ONO structuresdescribing low oxide/near interface/interface defects and high reliability of the devices even at high temperature.
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9.
  • Hjort, T., et al. (författare)
  • High temperature capable SiC Schottky diodes, based on buried grid design
  • 2014
  • Ingår i: International Conference and Exhibition on High Temperature Electronics. ; , s. 158-160
  • Konferensbidrag (refereegranskat)abstract
    • Electrical characteristics of 4H-SiC Schottky barrier diodes, based on buried grid design are presented. The diodes, rated to 1200V/10A and assembled into high temperature capable T0254 packages, have been tested and studied up to 250°C. Compared to conventional SiC Schottky diodes, Ascatron’s buried grid SiC Schottky diode demonstrates several orders of magnitude reduced leakage current at high temperature operation.
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10.
  • Lim, Jang-Kwon, et al. (författare)
  • A theoretical and experimental comparison of 4H- and 6H-SiC MSM UV photodetectors
  • 2012
  • Ingår i: Silicon Carbide and Related Materials 2011. - : Trans Tech Publications Inc.. - 9783037854198 ; , s. 1207-1210
  • Konferensbidrag (refereegranskat)abstract
    • This paper reports on fabrication and modeling of 4H- and 6H-SiC metal-semiconductor-metal (MSM) photodetectors (PDs). MSM PDs have been fabricated on 4H-SiC and 6H-SiC epitaxial layers, and their performance analyzed by MEDICI simulation and measurements. The simulations were also used to optimize the sensitivity by varying the width and spacing of the interdigitated electrodes. The fabricated PDs with 2 ÎŒm wide metal electrodes and 3 ÎŒm spacing between the electrodes exhibited, under UV illumination, a peak current to dark current ratio of 10 5 and 10 4 in 4H-SiC and 6H-SiC, respectively. The measured spectral responsivity of 6H-SiC PDs was higher compared to that of 4H-SiC PDs, with a cutoff at 407 nm compared to 384 nm in 4H-SiC PDs. Also the peak responsivity occurred at a shorter wavelength in 6H material. A high rejection ratio between the photocurrent and dark current was found in both cases. These experimental results were in agreement with simulation.
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11.
  • Reshanov, S. A., et al. (författare)
  • Full epitaxial trench type buried grid SiC JBS diodes
  • 2014
  • Ingår i: ECS Transactions. - : The Electrochemical Society. - 1938-5862 .- 1938-6737. ; , s. 289-293
  • Konferensbidrag (refereegranskat)abstract
    • The paper presents the advanced concept of fully epitaxial SiC junction barrier Schottky (JBS) diodes. It combines trench etching with embedded epitaxial re-growth and enables cost-efficient manufacturing. Fabricated devices are rated for 20A / 1200V and have leakage currents below 0.1μA at 1000V blocking voltage.
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12.
  • Åstlund, L, et al. (författare)
  • 4H- 6H-SiC UV photodetectors
  • 2012
  • Ingår i: Phys. Status Solid. ; c9:7, s. 1680-2
  • Tidskriftsartikel (refereegranskat)
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15.
  • Domeij, Martin, et al. (författare)
  • SiC power bipolar junction transistors : Modeling and improvement of the current gain
  • 2005
  • Ingår i: 2005 European Conference on Power Electronics and Applications. - Dresden : IEEE. - 9075815085 - 9789075815085 ; , s. 1665888-
  • Konferensbidrag (refereegranskat)abstract
    • Epitaxial silicon carbide bipolar junction transistors (BJTs) for power switching applications have been designed and fabricated with a maximum breakdown voltage of 1100 V. The BJTs have high common emitter current gains with maximum values exceeding 60, a result that is attributed to design optimization of the base and emitter layers and to a high material quality obtained by a continuous epitaxial growth. Device simulations of the current gain as function of collector current have been compared with measurements. The measurements show a clear emitter-size effect that is in good agreement with simulations including surface recombination in interface states at the etched termination of the base-emitter junction. Simulations indicate an optimum emitter doping around 1-1019 cm-3 in agreement with typical state-of-the-art BJTs.
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16.
  • Doyle, J. P., et al. (författare)
  • Electrically active point defects in n-type 4H–SiC
  • 1998
  • Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 84:3, s. 61-68
  • Tidskriftsartikel (refereegranskat)abstract
    • An electrically active defect has been observed at a level position of ∼ 0.70 eV below the conduction band edge (Ec) with an extrapolated capture cross section of ∼ 5×10−14 cm2 in epitaxial layers of 4H–SiC grown by vapor phase epitaxy with a concentration of approximately 1×1013 cm−3. Secondary ion mass spectrometry revealed no evidence of the transition metals Ti, V, and Cr. Furthermore, after electron irradiation with 2 MeV electrons, the 0.70 eV level is not observed to increase in concentration although three new levels are observed at approximately 0.32, 0.62, and 0.68 eV below Ec with extrapolated capture cross sections of 4×10−14, 4×10−14, and 5×10−15 cm2, respectively. However, the defects causing these levels are unstable and decay after a period of time at room temperature, resulting in the formation of the 0.70 eV level. Our results suggest strongly that the 0.70 eV level originates from a defect of intrinsic nature. The unstable behavior of the electron irradiation-induced defects at room temperature has not been observed in the 6H–SiC polytype.
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17.
  • Hertel, Stefan, et al. (författare)
  • Tailoring the graphene/silicon carbide interface for monolithic wafer-scale electronics
  • 2012
  • Ingår i: Nature Communications. - : Springer Science and Business Media LLC. - 2041-1723. ; 3
  • Tidskriftsartikel (refereegranskat)abstract
    • Graphene is an outstanding electronic material, predicted to have a role in post-silicon electronics. However, owing to the absence of an electronic bandgap, graphene switching devices with high on/off ratio are still lacking. Here in the search for a comprehensive concept for wafer-scale graphene electronics, we present a monolithic transistor that uses the entire material system epitaxial graphene on silicon carbide (0001). This system consists of the graphene layer with its vanishing energy gap, the underlying semiconductor and their common interface. The graphene/semiconductor interfaces are tailor-made for ohmic as well as for Schottky contacts side-by-side on the same chip. We demonstrate normally on and normally off operation of a single transistor with on/off ratios exceeding 10 4 and no damping at megahertz frequencies. In its simplest realization, the fabrication process requires only one lithography step to build transistors, diodes, resistors and eventually integrated circuits without the need of metallic interconnects.
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19.
  • Mikhaylov, Aleksey I., et al. (författare)
  • Alternative method of interface traps passivation by introducing of thin silicon nitride layer at 4H-SiC/SiO2 interface
  • 2014
  • Ingår i: Materials Research Society Symposium Proceedings. - : Springer Science and Business Media LLC.
  • Konferensbidrag (refereegranskat)abstract
    • An alternative approach for reduction of interface traps density at 4H-SiC/SiO2 interface is proposed. Silicon nitride / silicon oxide stack was deposited on p-type 4H-SiC (0001) epilayers and subsequently over-oxidized. The electrical characterization of the interface was done by employing metal-oxide semiconductor (MOS) devices, inversion-channel MOS devices and lateral MOS field effect transistors (MOSFETs).
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20.
  • Mikhaylov, Aleksey I., et al. (författare)
  • Effect of phosphorus implantation prior to oxidation on electrical properties of thermally grown SiO2/4H-SiC MOS structures
  • 2015
  • Ingår i: Mater. Sci. Forum. - : Trans Tech Publications Ltd. - 9783038352945 ; , s. 133-138
  • Konferensbidrag (refereegranskat)abstract
    • The electrical properties of metal-oxide-semiconductor (MOS) devices fabricated using dry oxidation on phosphorus-implanted n-type 4H-SiC (0001) epilayers have been investigated. MOS structures were compared in terms of interface traps and reliability with reference sample which was produced by dry oxidation under the same conditions. The notably lower interface traps density measured in MOS capacitor with phosphorus concentration exceeding 1018 cm-3 at the SiO2/SiC interface was attributed to interface traps passivation by incorporated phosphorus ions. © (2015) Trans Tech Publications, Switzerland.
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21.
  • Nordell, N., et al. (författare)
  • Control of Al and B doping transients in 6H and 4H SiC grown by vapor phase epitaxy
  • 1997
  • Ingår i: Journal of Electronic Materials. - : Springer Science and Business Media LLC. - 0361-5235 .- 1543-186X. ; 26:3, s. 187-192
  • Tidskriftsartikel (refereegranskat)abstract
    • The atomic concentration profiles in 4H and 6H SiC created by Al and B doping turn-on and turn-off during vapor phase epitaxy (VPE) was investigated by secondary ion mass spectrometry (SIMS). It was found that dopant traces were adsorbed to the reactor walls and re-evaporated after the dopant precursor flow was switched off. This adsorption/re-evaporation process limits the doping dynamic range to about three orders of magnitude for Al, and two orders of magnitude for B. An order of magnitude in doping dynamics could be gained by simultaneously switching the gases and changing the C:Si precursor ratio. By adding a 10 min growth interruption with an H or HC1 etch at the doping turn-off, the background doping tail could be considerably suppressed. In total, a doping dynamics for Al of almost five orders of magnitude can be controlled within a 30 nm layer. For B, the dynamic range is more than three orders of magnitude, and the abruptness is most probably diffusion limited. Abackground doping level of 2 × 1015 cm−3 for Al and 2 × 1016 cm−3 for B was obtained. For Al, the background doping is most probably due to the adsorption/re-evaporation of dopants at the reactor walls; while for B, the background doping may in addition be limited by diffusion.
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22.
  • Persson, P. O. Å, et al. (författare)
  • Transmission electron microscopy investigation of defects in B-implanted 6H-SiC
  • 1998
  • Ingår i: Silicon carbide, III-nitrides and related materials : ICSCIII-N'97. - : Trans Tech Publications Inc.. - 0878497900 ; , s. 413-416
  • Konferensbidrag (refereegranskat)abstract
    • Silicon carbide is due to its wide bandgap, high saturated electron drift velocity, high electric breakdown field and high thermal conductivity a suitable material for electron devices operating at high temperatures, high powers and high frequencies.[1,2] In order for SIC to reach its full potential in device technology, doping is essential. Usually ion implantation is used for doping since diffusion is difficult in SiC. Boron is a useful material for implantation because of its low atomic weight and greater penetration depth than other accepters, yet very few studies have been conducted on B-implanted 6H-SiC. [3,4] In this investigation we have used transmission electron microscopy (TEM) to study structural defects that are found in B-implanted 6H-SiC layers.
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24.
  • Schöner, Adolf, et al. (författare)
  • Progress in buried grid technology for improvements in on-resistance of high voltage SiC devices
  • 2016
  • Ingår i: ECS Transactions. - : The Electrochemical Society. - 9781607685395 ; , s. 183-190
  • Konferensbidrag (refereegranskat)abstract
    • Buried grid technology is suggested to protect field sensitive device areas from high electric field in order to improve the high temperature and high voltage performance of SiC devices. More than three orders of magnitude lower leakage currents have been demonstrated at high temperature operation. The drawback is that the total resistance increases due to the introduction of the buried grid leading to higher voltage drop at rated current and higher conduction losses. In this paper, we discuss doping and barrier engineering methods in order to take full advantage of the superior shielding effect of the buried grid technology and at the same time minimize the effect on the current conduction. As example, the design considerations for a 1200 V SiC buried grid JBS diode in terms of epi structure doping as well as buried grid properties is comprehensively investigated to optimize the on-state condition.
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25.
  • Sledziewski, Tomasz, et al. (författare)
  • Reduction of density of 4H-SiC/SiO2 interface traps by pre-oxidation phosphorus implantation
  • 2014
  • Ingår i: Materials Science Forum. - 9783038350101 ; , s. 575-578
  • Konferensbidrag (refereegranskat)abstract
    • The effect of phosphorus (P) on the electrical properties of the 4H-SiC/SiO2 interface was investigated. Phosphorus was introduced by surface-near ion implantation with varying ion energy and dose prior to thermal oxidation. Secondary ion mass spectrometry revealed that only part of the implanted P followed the oxidation front to the interface. A negative flatband shift due to residual P in the oxide was found from C-V measurements. Conductance method measurements revealed a significant reduction of density of interface traps Dit with energy EC-Eit > 0.3 V for P+-implanted samples with [P]interface = 1.5 · 1018 cm-3 in the SiC layer at the interface. .
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26.
  • Usman, Muhammad, et al. (författare)
  • Characterization of Al-based high-k stacked dielectric layers deposited on 4H-SiC by Atomic Layer Deposition
  • 2011
  • Ingår i: SILICON CARBIDE AND RELATED MATERIALS 2010. ; , s. 441-444
  • Konferensbidrag (refereegranskat)abstract
    • Aluminum-based high-k dielectric materials have been studied for their potential use as passivation for SiC devices. Metal-insulator-semiconductor structures were prepared and their dielectric properties were analyzed using capacitance-voltage and current-voltage measurements. Atomic layer deposition was used for the deposition of dielectric layers consisting of AlN with or without a buffer layer of SiO2, and also a stack of alternating AlN and Al2O3 layers. It has been observed that AlN has a polycrystalline structure which provides leakage paths for the current through the grain boundaries. However, adding alternate amorphous layers of Al2O3 prevent this leakage and give better overall dielectric properties. It is also concluded that the breakdown of the dielectric starts from the degradation of the thin interfacial SiO2 layer.
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28.
  • Yen, Cheng Tyng, et al. (författare)
  • Comparative study of 4H-SiC DMOSFETs with N2O thermal oxide and deposited oxide with post oxidation anneal
  • 2014
  • Ingår i: Materials Science Forum. - 9783038350101 ; , s. 989-992
  • Konferensbidrag (refereegranskat)abstract
    • Two kinds of gate oxides, direct thermal oxidation in a nitrous oxide ambient at 1250°C (TGO) and a PECVD oxide followed by a post deposition oxidation in nitrous oxide ambient at 1150°C (DGO) were studied. DGO showed a lower interface trap density and was able to provide a higher current as being implemented in MOSFETs through the improved channel mobility. However the 6.45 MV/cm average breakdown field of DGO is lower than the 10.1 MV/cm breakdown field of TGO. The lower breakdown field, more leaky behavior and the existence of multiple breakdown mechanisms suggest that DGO needs further improvements before it can be used in real applications.
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29.
  • Yen, Cheng Tyng, et al. (författare)
  • SiC epi-channel lateral MOSFETs
  • 2014
  • Ingår i: Materials Science Forum. - 9783038350101 ; , s. 927-930
  • Konferensbidrag (refereegranskat)abstract
    • SiC lateral MOSFETs with multi-layered epi-channels were studied in this work. The epi-channel consisting of a high concentration n-type epilayer sandwiched between two lightly doped p-type layers showed a maximum field effect mobility of 17 cm2/V.s, as compared to 1.53 cm2/V.s for inversion type devices without epi-channels. These devices are normally-off with an average threshold voltage of 1.34V.
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30.
  • Yuan, Zimo, et al. (författare)
  • Localized Lifetime Control of 10 kV 4H-SiC PiN Diodes by MeV Proton Implantation
  • 2022
  • Ingår i: Materials Science Forum. - : Trans Tech Publications Ltd. - 1662-9752. - 9783035727609 ; , s. 442-446
  • Konferensbidrag (refereegranskat)abstract
    • In this paper, proton implantation with different combinations of MeV energies and doses from 2×109 to 1×1011 cm-2 is used to create defects in the drift region of 10 kV 4H-SiC PiN diodes to obtain a localized drop in the SRH lifetime. On-state and reverse recovery behaviors are measured to observe how MeV proton implantation influences these devices and values of reverse recovery charge Qrr are extracted. These measurements are carried out under different temperatures, showing that the reverse recovery behavior is sensitive to temperature due to the activation of incompletely ionized p-type acceptors. The results also show that increasing proton implantation energies and fluencies can have a strong effect on diodes and cause lower Qrr and switching losses, but also higher on-state voltage drop and forward conduction losses. The trade-off between static and dynamic performance is evaluated using Qrr and forward voltage drop. Higher fluencies, or energies, help to improve the turn-off performance, but at a cost of the static performance. © 2022 The Author(s).
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32.
  • Zhang, Andy Zhenzhong, et al. (författare)
  • Planarization of epitaxial SiC trench structures by plasma ion etching
  • 2015
  • Ingår i: Materials Science Forum. - 0255-5476 .- 1662-9752. - 9783038354789 ; 821-823, s. 549-552
  • Tidskriftsartikel (refereegranskat)abstract
    • In this work, we present a planarization concept for epitaxial SiC trench structures involving reactive ion etching (RIE) and inductive coupled plasma (ICP) dry etching. The general idea is to transfer the flat surface from spun-on BCB/photo-resist layers to deposited silicon dioxide and finally to bulk SiC by applying process conditions with the same etch rate for the different materials. In this way several microns of unwanted material can be removed and planar SiC surfaces are obtained. With this method trench structures filled by epitaxial re-growth can be planarized with smooth surfaces and good homogeneity over the wafer. Cost-efficient device manufacturing can be achieved by using standard semiconductor process equipment. This technology makes it possible to manufacture advanced epitaxial SiC material structures for devices such as trench JBS diodes and double-gate trench JFETs.
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