| 1. |
- Andersson, Kristoffer, 1976, et al.
(författare)
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Fabrication and characterization of field-plated buried-gate SiC MESFETs
- 2006
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Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 27:7, s. 573-575
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Tidskriftsartikel (refereegranskat)abstract
- Silicon carbide (SiC) MESFETs were fabricated using a standard SiC MESFET structure with the application of the "buried-channel" and field-plate (FP) techniques in the process. FPs combined with a buried-gate are shown to be favorable concerning output power density and power-added efficiency (PAE), due to higher breakdown voltage and decreased output conductance. A very high power density of 7.8 W/mm was measured on-wafer at 3 GHz for a two-finger 400-/spl mu/m gate periphery SiC MESFET. The PAE for this device was 70% at class AB bias. Two-tone measurements at 3 GHz /spl plusmn/ 100 kHz indicate an optimum FP length for high linearity operation.
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| 2. |
- Nilsson, Per-Åke, 1964, et al.
(författare)
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Influence of Field Plates and Surface Traps on Microwave Silicon Carbide MESFETs
- 2008
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Ingår i: IEEE Transactions on Electron Devices. - 1557-9646 .- 0018-9383. ; 55:8, s. 1875-1879
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Tidskriftsartikel (refereegranskat)abstract
- The influence of field plates and surface traps on silicon carbide MESFETs for microwave operation was investigated. By increasing the length of gate-connected field plates from 50 to 800 nm, it was possible to increase the gate–drain breakdown voltage of the devices from 125 to 170 V. At the same time, the current slump effect of traps in the passivation oxide was reduced. By using a combination of field plates and a passivation oxide with low interface trap density, it was possible to reach an output power density of 8 W/mm at 3 GHz.
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| 3. |
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| 4. |
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| 5. |
- Vidarsson, Arnar M., et al.
(författare)
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Observations of very fast electron traps at SiC/high-κ dielectric interfaces
- 2023
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Ingår i: APL Materials. - : AIP Publishing. - 2166-532X. ; 11:11
-
Tidskriftsartikel (refereegranskat)abstract
- Very fast interface traps have recently been suggested to be the main cause behind poor channel-carrier mobility in SiC metal-oxide-semiconductor field effect transistors. It has been hypothesized that the NI traps are defects located inside the SiO2 dielectric with energy levels close to the SiC conduction band edge and the observed conductance spectroscopy signal is a result of electron tunneling to and from these defects. Using aluminum nitride and aluminum oxide as gate dielectrics instead of SiO2, we detect NI traps at these SiC/dielectric interfaces as well. A detailed investigation of the NI trap density and behavior as a function of temperature is presented and discussed. Advanced scanning transmission electron microscopy in combination with electron energy loss spectroscopy reveals no SiO2 at the interfaces. This strongly suggests that the NI traps are related to the surface region of the SiC rather than being a property of the gate dielectric.
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| 6. |
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| 7. |
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| 8. |
- Fagerlind, Martin, 1980, et al.
(författare)
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Investigation of the interface between silicon nitride passivations and AlGaN/AlN/GaN heterostructures by C(V) characterization of metal-insulator-semiconductor-heterostructure capacitors
- 2010
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Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 108:1
-
Tidskriftsartikel (refereegranskat)abstract
- Capacitance-voltage [C(V)] measurements of metal-insulator-semiconductor-heterostructure capacitors are used to investigate the interface between silicon nitride passivation and AlGaN/AlN/GaN heterostructure material. AlGaN/AlN/GaN samples having different silicon nitride passivating layers, deposited using three different deposition techniques, are evaluated. Different interface state distributions result in large differences in the C(V) characteristics. A method to extract fixed charge as well as traps from the C(V) characteristics is presented. Rough estimates of the emission time constants of the traps can be extracted by careful analysis of the C(V) characteristics. The fixed charge is positive for all samples, with a density varying between 1.3 x 10(12) and 7.1 x 10(12) cm(-2). For the traps, the peak density of interface states is varying between 16 x 10(12) and 31 x 10(12) cm(-2) eV(-1) for the three samples. It is concluded that, of the deposition methods investigated in this report, the low pressure chemical vapor deposited silicon nitride passivation shows the most promising results with regards to low densities of interface states. (C) 2010 American Institute of Physics. [doi:10.1063/1.3428442]
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| 9. |
- Gudjonsson, Gudjon, 1973, et al.
(författare)
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Design and Fabrication of 4H-SiC RF MOSFETs
- 2007
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Ingår i: IEEE Transactions on Electron Devices. - 1557-9646 .- 0018-9383. ; 54:12, s. 3138-3145
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Tidskriftsartikel (refereegranskat)abstract
- We present simulations, fabrication and analysis of 4H-SiC RF power MOSFETs. We obtain an extrinsic transition frequency of 11.2 GHz and an f max = 11.9 GHz, a breakdown voltage above 200 V and an output power of 1.9 W/mm at 3 GHz. The measured devices are double fingered, source-gate-draingate-source with 2 × 0.4 mm total gate width and the nominal channel length of the devices is 0.5 μm. To the authors knowledge, this is the highest transition frequency and output power density ever reported for SiC RF MOSFETs. The antipunchthrough is introduced as a way to take advantage of the SiC's material properties. A detailed description of the device processing is also given. © 2007 IEEE.
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| 10. |
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| 11. |
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| 12. |
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| 13. |
- Gudjonsson, Gudjon, 1973, et al.
(författare)
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High Frequency 4H-SiC MOSFETs
- 2007
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Ingår i: Materials Science Forum. - 1662-9752 .- 0255-5476. ; 556-557, s. 795-798
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Konferensbidrag (refereegranskat)
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| 14. |
- Gudjonsson, Gudjon, 1973, et al.
(författare)
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High Power Density 4H-SiC RF MOSFETs
- 2006
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Ingår i: IEEE Electron Device Letters. ; 527-529, s. 1277-1280
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Tidskriftsartikel (refereegranskat)
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| 15. |
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| 16. |
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| 17. |
- Sveinbjörnsson, Einar, 1964, et al.
(författare)
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High channel mobility 4H-SiC MOSFETs
- 2006
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Ingår i: Materials Science Forum. ; 527-529, s. 961-966
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Konferensbidrag (refereegranskat)
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| 18. |
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| 19. |
- Winters, Michael, 1986, et al.
(författare)
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Hysteresis modeling in graphene field effect transistors
- 2015
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Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 117:7, s. Art. no, 074501-
-
Tidskriftsartikel (refereegranskat)abstract
- Graphene field effect transistors with an Al2O3 gate dielectric are fabricated on H-intercalated bilayer graphene grown on semi-insulating 4H-SiC by chemical vapour deposition. DC measurements of the gate voltage nu(g) versus the drain current i(d) reveal a severe hysteresis of clockwise orientation. A capacitive model is used to derive the relationship between the applied gate voltage and the Fermi energy. The electron transport equations are then used to calculate the drain current for a given applied gate voltage. The hysteresis in measured data is then modeled via a modified Preisach kernel.
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| 20. |
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| 21. |
- Allerstam, Fredrik, 1978, et al.
(författare)
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A study of deep energy-level traps at the 4H-SiC/SiO2 interface and their passivation by hydrogen
- 2009
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Ingår i: Materials Science Forum. - 1662-9752 .- 0255-5476. ; 600-603, s. 755-758
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Konferensbidrag (refereegranskat)abstract
- This study is focused on characterization of deep energy-level interface traps formed during sodium enhanced oxidation of n-type Si face 4H-SiC. The traps are located 0.9 eV below the SiC conduction band edge as revealed by deep level transient spectroscopy. Furthermore these traps are passivated using post-metallization anneal at 400°C in forming gas ambient. © (2009) Trans Tech Publications, Switzerland.
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| 22. |
- Allerstam, Fredrik, 1978, et al.
(författare)
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Comparison between oxidation processes used to obtain the high inversion channel mobility in 4H-SiC MOSFETs
- 2007
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Ingår i: Semiconductor Science and Technology. - : IOP Publishing. - 1361-6641 .- 0268-1242. ; 22:4, s. 307-311
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Tidskriftsartikel (refereegranskat)abstract
- In this work two oxidation methods aimed at improving the silicon face 4H-SiC/SiO 2 interface are compared. One is an oxidation in N 2 O performed in a quartz tube using quartz sample holders and the other is a dry oxidation performed in an alumina tube using alumina sample holders. In n-type metal oxide semiconductor (MOS) capacitors the interface state density near the SiC conduction band edge is estimated using capacitance-voltage (C-V) and thermal dielectric relaxation current (TDRC) measurements. N-channel metal oxide semiconductor field effect transistors (MOSFETs) are characterized by current-voltage (I-V) techniques and the inversion channel mobility is extracted. It is shown that the high inversion channel mobility (154 cm 2 V -1 s -1 ) seen in samples oxidized using alumina correlates with a low interface trap density (3.6 × 10 11 cm -2 ). In the case of N 2 O oxidation the mobility is lower (24 cm 2 V -1 s -1 ) and the interface trap density is higher (1.6 × 10 12 cm -2 ). Room temperature C-V measurements are of limited use when studying traps near the conduction band edge in MOS structures while the TDRC measurement technique gives a better estimate of their density. © 2007 IOP Publishing Ltd.
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| 23. |
- Allerstam, Fredrik, 1978, et al.
(författare)
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Effect of high temperature oxidation of 4H-SiC on the near-interface traps measured by TDRC
- 2009
-
Ingår i: Materials Science Forum. - 1662-9752 .- 0255-5476. - 9780878493340 ; 615 617, s. 537-540
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Konferensbidrag (refereegranskat)abstract
- In this work the effect of oxidation temperature of 4H-SiC on the density of nearinterface traps is studied. It is seen that the portion of traps with slower emission times decreases with increasing oxidation temperature. Despite this reduction, high temperature oxidation alone is not useful to achieve low density of interface traps at the SiO2/4H-SiC interface.
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| 24. |
- Allerstam, Fredrik, 1978, et al.
(författare)
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Formation of deep traps at the 4H-SiC/SiO2 interface when utilizing sodium enhanced oxidation
- 2007
-
Ingår i: Materials Science Forum. - 1662-9752 .- 0255-5476. ; 556-557, s. 517-520
-
Konferensbidrag (refereegranskat)abstract
- This paper reports studies of deep acceptor-type interface traps at the 4H-SiC/SiO2 interface. These traps are created during sodium enhanced oxidation of Si-terminated 4H-SiC. The trap concentration is above 3×1012 cm-2 and their activation energy is larger than 0.8 eV.
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| 25. |
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| 26. |
- Bergsten, Johan, 1988, et al.
(författare)
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Electron Trapping in Extended Defects in Microwave AlGaN/GaN HEMTs with Carbon-Doped Buffers
- 2018
-
Ingår i: IEEE Transactions on Electron Devices. - : IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. - 1557-9646 .- 0018-9383. ; 65:6, s. 2446-2453
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Tidskriftsartikel (refereegranskat)abstract
- This paper investigates AlGaN/GaN high-electron mobility transistors (HEMTs) fabricated on epistructures with carbon (C)-doped buffers. Metalorganic chemical vapor deposition is used to grow two C-doped structures with different doping profiles, using growth parameters to change the C incorporation. The C concentration is low enough to result in n-type GaN. Reference devices are also fabricated on a structure using iron (Fe) as dopant, to exclude any process related variations and provide a relevant benchmark. All devices exhibit similar dc performance. However, pulsed I - V$ measurements show extensive dispersion in the C-doped devices, with values of dynamic R-mathrm-scriptscriptstyle ON 3 -4 times larger than in the dc case. Due to the extensive trapping, the devices with C-doped buffers can only supply about half the output power of the Fe-doped sample, 2.5 W/mm compared to 4.8 W/mm at 10 GHz. In drain current transient measurements, the trap filling time is varied, finding large prevalence of trapping at dislocations for the C-doped samples. Clusters of C around the dislocations are suggested to be the main cause for the increased dispersion.
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| 27. |
- Dammann, M., et al.
(författare)
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Reliability and degradation mechanism of AlGaN/GaN HEMTs for next generation mobile communication systems
- 2009
-
Ingår i: Microelectronics and Reliability. - : Elsevier BV. - 0026-2714. ; 49:5, s. 474-477
-
Tidskriftsartikel (refereegranskat)abstract
- Excellent reliability performance of AlGaN/GaN HEMTs on SiC substrates for next generation mobile communication systems has been demonstrated using DC and RF stress tests on 8 x 60 mu m wide and 0.5 mu m long AlGaN/GaN HEMTs at a drain voltage of V-d = 50 V. Drain current recovery measurements after stress indicate that the degradation is partly caused by slow traps generated in the SiN passivation or in the HEMT epitaxial layers. The traps in the SiN passivation layer were characterized using high and low frequency capacitance-voltage (CV) measurements of MIS test structures on thick lightly doped GaN layers. (C) 2009 Elsevier Ltd. All rights reserved.
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| 28. |
- Ghezellou, Misagh, 1988-, et al.
(författare)
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The role of boron related defects in limiting charge carrier lifetime in 4H–SiC epitaxial layers
- 2023
-
Ingår i: APL Materials. - : American Institute of Physics (AIP). - 2166-532X. ; 11:3
-
Tidskriftsartikel (refereegranskat)abstract
- One of the main challenges in realizing 4H–SiC (silicon carbide)-based bipolar devices is the improvement of minority carrier lifetime in as-grown epitaxial layers. Although Z1/2 has been identified as the dominant carrier lifetime limiting defect, we report on B-related centers being another dominant source of recombination and acting as lifetime limiting defects in 4H–SiC epitaxial layers. Combining time-resolved photoluminescence (TRPL) measurement in near band edge emission and 530 nm, deep level transient spectroscopy, and minority carrier transient spectroscopy (MCTS), it was found that B related deep levels in the lower half of the bandgap are responsible for killing the minority carriers in n-type, 4H–SiC epitaxial layers when the concentration of Z1/2 is already low. The impact of these centers on the charge carrier dynamics is investigated by correlating the MCTS results with temperature-dependent TRPL decay measurements. It is shown that the influence of shallow B acceptors on the minority carrier lifetime becomes neutralized at temperatures above ∼422 K. Instead, the deep B related acceptor level, known as the D-center, remains active until temperatures above ∼570 K. Moreover, a correlation between the deep level concentrations, minority carrier lifetimes, and growth parameters indicates that intentional nitrogen doping hinders the formation of deep B acceptor levels. Furthermore, tuning growth parameters, including growth temperature and C/Si ratio, is shown to be crucial for improving the minority carrier lifetime in as-grown 4H–SiC epitaxial layers.
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| 29. |
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| 30. |
- Karhu, Robin, 1987-
(författare)
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CVD growth of SiC for high-power and high-frequency applications
- 2019
-
Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Silicon Carbide (SiC) is a wide bandgap semiconductor that has attracted a lot of interest for electronic applications due to its high thermal conductivity, high saturation electron drift velocity and high critical electric field strength. In recent years commercial SiC devices have started to make their way into high and medium voltage applications.Despite the advancements in SiC growth over the years, several issues remain. One of these issues is that the bulk grown SiC wafers are not suitable for electronic applications due to the high background doping and high density of basal plane dislocations (BPD). Due to these problems SiC for electronic devices must be grown by homoepitaxy. The epitaxial growth is performed in chemical vapor deposition (CVD) reactors. In this work, growth has been performed in a horizontal hot-wall CVD (HWCVD) reactor. In these reactors it is possible to produce high-quality SiC epitaxial layers within a wide range of doping, both n- and p-type.SiC is a well-known example of polytypism, where the different polytypes exist as different stacking sequences of the Si-C bilayers. Polytypism makes polytype stability a problem during growth of SiC. To maintain polytype stability during homoepitaxy of the hexagonal polytypes the substrates are usually cut so that the angle between the surface normal and the c-axis is a few degrees, typically 4 or 8°. The off-cut creates a high density of micro-steps at the surface. These steps allow for the replication of the substrates polytype into the growing epitaxial layer, the growth will take place in a step-flow manner. However, there are some drawbacks with step-flow growth. One is that BPDs can replicate from the substrate into the epitaxial layer. Another problem is that 4H-SiC is often used as a substrate for growth of GaN epitaxial layers. The epitaxial growth of GaN has been developed on on-axis substrates (surface normal coincides with c-axis), so epitaxial 4H-SiC layers grown on off-axis substrates cannot be used as substrates for GaN epitaxial growth.In efforts to solve the problems with off-axis homoepitaxy of 4H-SiC, on-axis homoepitaxy has been developed. In this work, further development of wafer-scale on-axis homoepitaxy has been made. This development has been made on a Si-face of 4H-SiC substrates. The advances include highly resistive epilayers grown on on-axis substrates. In this thesis the ability to control the surface morphology of epitaxial layers grown on on-axis homoepitaxy is demonstrated. This work also includes growth of isotopically enriched 4H-SiC on on-axis substrates, this has been done to increase the thermal conductivity of the grown epitaxial layers.In (paper 1) on-axis homoepitaxy of 4H-SiC has been developed on 100 mm diameter substrates. This paper also contains comparisons between different precursors. In (paper 2) we have further developed on-axis homoepitaxy on 100 mm diameter wafers, by doping the epitaxial layers with vanadium. The vanadium doping of the epitaxial layers makes the layers highly resistive and thus suitable to use as a substrate for III-nitride growth. In (paper 3) we developed a method to control the surface morphology and reduce the as-grown surface roughness in samples grown on on-axis substrates. In (paper 4) we have increased the thermal conductivity of 4H-SiC epitaxial layers by growing the layers using isotopically enriched precursors. In (paper 5) we have investigated the role chlorine have in homoepitaxial growth of 4H-SiC. In (paper 6) we have investigated the charge carrier lifetime in as-grown samples and traced variations in lifetime to structural defects in the substrate. In (paper 7) we have investigated the formation mechanism of a morphological defect in homoepitaxial grown 4H-SiC.
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| 31. |
- Khosa, Rabia Y., et al.
(författare)
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Electrical characterization of amorphous Al2O3 dielectric films on n-type 4H-SiC
- 2018
-
Ingår i: AIP Advances. - : AIP Publishing. - 2158-3226 .- 2158-3226. ; 8:2
-
Tidskriftsartikel (refereegranskat)abstract
- We report on the electrical properties of Al 2 O 3 films grown on 4H-SiC by successive thermal oxidation of thin Al layers at low temperatures (200°C - 300°C). MOS capacitors made using these films contain lower density of interface traps, are more immune to electron injection and exhibit higher breakdown field (5MV/cm) than Al 2 O 3 films grown by atomic layer deposition (ALD) or rapid thermal processing (RTP). Furthermore, the interface state density is significantly lower than in MOS capacitors with nitrided thermal silicon dioxide, grown in N 2 O, serving as the gate dielectric. Deposition of an additional SiO 2 film on the top of the Al 2 O 3 layer increases the breakdown voltage of the MOS capacitors while maintaining low density of interface traps. We examine the origin of negative charges frequently encountered in Al 2 O 3 films grown on SiC and find that these charges consist of trapped electrons which can be released from the Al 2 O 3 layer by depletion bias stress and ultraviolet light exposure. This electron trapping needs to be reduced if Al 2 O 3 is to be used as a gate dielectric in SiC MOS technology.
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| 32. |
- Khosa, Rabia Y., et al.
(författare)
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Electrical characterization of high k-dielectrics for 4H-SiC MIS devices
- 2019
-
Ingår i: Materials Science in Semiconductor Processing. - : Elsevier BV. - 1369-8001 .- 1873-4081. ; 98, s. 55-58
-
Tidskriftsartikel (refereegranskat)abstract
- We report promising results regarding the possible use of AlN or Al 2 O 3 as a gate dielectric in 4H-SiC MISFETs. The crystalline AlN films are grown by hot wall metal organic chemical vapor deposition (MOCVD) at 1100 °C. The amorphous Al 2 O 3 films are grown by repeated deposition and subsequent low temperature (200 °C) oxidation of thin Al layers using a hot plate. Our investigation shows a very low density of interface traps at the AlN/4H-SiC and the Al 2 O 3 /4H-SiC interface estimated from capacitance-voltage (CV) analysis of MIS capacitors. Current-voltage (IV) analysis shows that the breakdown electric field across the AlN or Al 2 O 3 is ∼ 3 MV/cm or ∼ 5 MV/cm respectively. By depositing an additional SiO 2 layer by plasma enhanced chemical vapor deposition at 300 °C on top of the AlN or Al 2 O 3 layers, it is possible to increase the breakdown voltage of the MIS capacitors significantly without having pronounced impact on the quality of the AlN/SiC or Al 2 O 3 /SiC interfaces.
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| 33. |
- Khosa, Rabia Y., et al.
(författare)
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Electrical characterization of MOCVD grown single crystalline ALN thin films on 4H-SiC
- 2019
-
Ingår i: Materials Science Forum. - : Trans Tech Publications Ltd. - 1662-9752 .- 0255-5476. ; 963 MSF, s. 460-464, s. 460-464
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Konferensbidrag (refereegranskat)abstract
- We report on a very low density of interface traps at the AlN/4H-SiC interface estimated from capacitance-voltage (CV) analysis of metal-insulator-semiconductor (MIS) capacitors. Single crystalline aluminum nitride (AlN) films are grown by metal organic chemical vapor deposition (MOCVD). Current-voltage (IV) analysis shows that the breakdown electric field across the AlN dielectric is 3 MV/cm. By depositing an additional SiO2 layer on top of the AlN layer it is possible to increase the breakdown voltage of the MIS capacitors significantly without having pronounced impact on the quality of the AlN/SiC interface.
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| 34. |
- Khosa, Rabia Y., et al.
(författare)
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Electrical properties of 4H-SiC MIS capacitors with AlN gate dielectric grown by MOCVD
- 2019
-
Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 153, s. 52-58
-
Tidskriftsartikel (refereegranskat)abstract
- We report on the electrical properties of the AlN/4H-SiC interface using capacitance- and conductance-voltage (CV and GV) analysis of AlN/SiC MIS capacitors. The crystalline AlN layers are made by hot wall MOCVD. CV analysis at room temperature reveals an order of magnitude lower density of interface traps at the AlN/SiC interface than at nitrided SiO2/SiC interfaces. Electron trapping in bulk traps within the AlN is significant when the MIS capacitors are biased into accumulation resulting in a large flatband voltage shift towards higher gate voltage. This process is reversible and the electrons are fully released from the AlN layer if depletion bias is applied at elevated temperatures. Current-voltage (IV) analysis reveals that the breakdown electric field intensity across the AlN dielectric is 3–4 MV/cm and is limited by trap assisted leakage. By depositing an additional SiO2 layer on top of the AlN layer, it is possible to increase the breakdown voltage of the MIS capacitors significantly without having much impact on the quality of the AlN/SiC interface.
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| 35. |
- Lee, Hyung-Seok, et al.
(författare)
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1200 V 4H-SiC BJTs with a Common Emitter Current Gain of 60 and Low On-resistance
- 2009
-
Ingår i: Materials Science Forum. - : Trans Tech Publications, Ltd.. - 1662-9752 .- 0255-5476. - 9780878493579 ; 600-603, s. 1151-1154
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Konferensbidrag (refereegranskat)abstract
- This paper reports a 4H-SiC bipolar junction transistor (BJT) with a breakdown voltage (BV(CEO)) of 1200 V, a maximum current gain (beta) of 60 and the low on-resistance (R(sp-on))of 5.2 m Omega cm(2). The high gain is attributed to an improved surface passivation SiO(2) layer which was grown in N(2)O ambient in a diffusion furnace. The SiC BJTs with passivation oxide grown in N(2)O ambient show less emitter size dependence than reference SiC BJTs, with conventional SiO(2) passivation, due to a reduced surface recombination current. SiC BJT devices with an active area of 1.8 mm x 1.8 mm showed a current gain of 53 in pulsed mode and a forward voltage drop Of V(CE)=2V at I(C)=15 A (J(C)=460 A/cm(2)).
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| 36. |
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| 37. |
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| 38. |
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| 39. |
- Malmros, Anna, 1977, et al.
(författare)
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Enhanced Mobility in InAlN/AlN/GaN HEMTs Using a GaN Interlayer
- 2019
-
Ingår i: IEEE Transactions on Electron Devices. - : IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. - 1557-9646 .- 0018-9383. ; 66:7, s. 2910-2915
-
Tidskriftsartikel (refereegranskat)abstract
- © 1963-2012 IEEE. An enhancement of the electron mobility ( \mu ) in InAlN/AlN/GaN heterostructures is demonstrated by the incorporation of a thin GaN interlayer (IL) between the InAlN and AlN. The introduction of a GaN IL increases \mu at room temperature (RT) from 1600 to 1930 cm2/Vs. The effect is further enhanced at cryogenic temperature (5 K), where the GaN IL sample exhibits a \mu of 16000 cm2/Vs, compared to 6900 cm2/Vs without IL. The results indicate the reduction of one or more scattering mechanisms normally present in InAlN/AlN/GaN heterostructures. We propose that the improvement in \mu is either due to the suppression of fluctuations in the quantum well subband energies or to reduced Coulomb scattering, both related to compositional variations in the InAlN. HEMTs fabricated on the GaN IL sample demonstrate larger improvement in dc-and high-frequency performance at 5 K; {f}-{\text {max}} increases by 25 GHz to 153 GHz, compared to an increase of 6 GHz to 133 GHz without IL. The difference in improvement was associated mainly with the drop in the access resistances.
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| 40. |
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| 41. |
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| 42. |
- Papamichail, Alexis, et al.
(författare)
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Mg-doping and free-hole properties of hot-wall MOCVD GaN
- 2022
-
Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 131:18
-
Tidskriftsartikel (refereegranskat)abstract
- The hot-wall metal-organic chemical vapor deposition (MOCVD), previously shown to enable superior III-nitride material quality and high performance devices, has been explored for Mg doping of GaN. We have investigated the Mg incorporation in a wide doping range (2.45 × 10 18 cm-3 up to 1.10 × 10 20 cm-3) and demonstrate GaN:Mg with low background impurity concentrations under optimized growth conditions. Dopant and impurity levels are discussed in view of Ga supersaturation, which provides a unified concept to explain the complexity of growth conditions impact on Mg acceptor incorporation and compensation. The results are analyzed in relation to the extended defects, revealed by scanning transmission electron microscopy, x-ray diffraction, and surface morphology, and in correlation with the electrical properties obtained by Hall effect and capacitance-voltage (C-V) measurements. This allows to establish a comprehensive picture of GaN:Mg growth by hot-wall MOCVD providing guidance for growth parameters optimization depending on the targeted application. We show that substantially lower H concentration as compared to Mg acceptors can be achieved in GaN:Mg without any in situ or post-growth annealing resulting in p-type conductivity in as-grown material. State-of-the-art p-GaN layers with a low resistivity and a high free-hole density (0.77 ω cm and 8.4 × 10 17 cm - 3, respectively) are obtained after post-growth annealing demonstrating the viability of hot-wall MOCVD for growth of power electronic device structures.
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| 43. |
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| 44. |
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| 45. |
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| 46. |
- Sveinbjörnsson, Einar, 1964
(författare)
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Electrical Properties of Gold-related Defect Complexes in Silicon
- 1994
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- This thesis describes three extensive experiments concerning the properties of gold as an impurity atom in crystalline silicon. The first study is an investigation of the effect of phosphorus diffusion on the distribution of gold atoms within a silicon crystal. It is demonstrated how gold atoms diffuse back and forth between the highly phosphorus-doped surface layer and the bulk of the material when the annealing temperature is varied. This is investigated using secondary ion mass spectroscopy (SIMS) to study the gold within the highly phosphorus-doped layer and using deep level transient spectroscopy (DLTS) to estimate the gold content in the bulk of the specimen. This phenomenon is related to large solubility enhancement of gold in silicon with phosphorus concentrations above approximately 3x1019 atoms/cm3. In the second study, hydrogen-gold complexes are investigated. Hydrogen is injected into the surface region of gold-doped samples during wet etching. From the results of annealing experiments we distinguish between three different configurations of hydrogen in relation to the substitutional gold atom. There is one position, S, where the electronic energy of the gold donor level is unaffected, a second position G, detected as three deep levels, and a third configuration, PA, where the gold center is apparently electrically inactive. The Au-H configurations transform into one another upon annealing. Heat treatment at temperatures above approximately 200oC results in an irreversible dissociation of the Au-H complexes and the gold centers are reactivated. The third experiment concerns the interaction between lithium and gold in n-type silicon. We find that lithium diffusion into gold-doped silicon results in passivation of gold acceptors. The passivation is attributed to a coulomb pair between Au- and Li+, with a free binding energy of approximately 0.87 eV. In addition, an electrically active Au-Li complex is observed consisting of one gold atom and one or more lithium atoms.
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| 47. |
- Sveinbjörnsson, Einar, 1964, et al.
(författare)
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Electroluminescence from silicon p-n junctions prepared by wafer bonding
- 1998
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Ingår i: Proceedings of the Fourth International Symposium on Semiconductor Wafer Bonding: Science, Technology, and Applications. ; , s. 264-
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Konferensbidrag (refereegranskat)abstract
- We report on electro- and photoluminescence from silicon p-n diodes formed by hydrophobic wafer bonding. Four main spectral features associated with the bonded interface are detected at photon energies between 0.8 and 0.9 eV. Two of these signals are identified as the dislocation-related signals D1 and D2 while two peaks at 0.83 eV and 0.89 eV remain unidentified. However, we observe a signal similar to the 0.83 eV signal in polysilicon and at the junction of a silicon bicrystal
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| 48. |
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| 49. |
- Tilak, V., et al.
(författare)
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Scattering Mechanisms in Silicon Carbide MOSFETs with Gate Oxides Fabricated using Sodium Enhanced Oxidation Technique
- 2009
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Ingår i: Materials Science Forum. - : Trans Tech Publications, Ltd.. - 1662-9752 .- 0255-5476. - 9780878493579 ; 600-603, s. 687-690
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Konferensbidrag (refereegranskat)abstract
- The improvement of the SiC-SiO(2) interface has been the main focus of research in SiC MOSFET technology due to the presence of high density of interface traps (D(it)) leading to poor threshold voltage temperature stability and poor mobility. In SiC MOSFETs with the gate oxide grown in the presence of sodium, known as sodium enhanced oxidation(SEO), a lower Dit and higher field effect mobility has been observed [1]. Hall effect measurements were performed from 125 degrees K-225 degrees K on such MOSFET samples. The Hall measurements were made as a function of temperature for various sheet charge concentrations. The sheet charge density was measured as a function of gate bias at 225 degrees K and there is very little trapped charge in the sample with oxide grown by SEO while about 50% of the total charge is trapped in a sample with N(2)O grown oxide annealed in NO. In samples with oxide grown by SEO, there is a monotonic increase in mobility with sheet charge density and the mobility also increases with temperature. This is an indication that the main scattering mechanism is Coulomb scattering in this regime.
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| 50. |
- Tilak, V., et al.
(författare)
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Trap and Inversion Layer Mobility Characterization Using Hall Effect in Silicon Carbide-Based MOSFETs With Gate Oxides Grown by Sodium Enhanced Oxidation
- 2009
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Ingår i: IEEE Transactions on Electron Devices. - 1557-9646 .- 0018-9383. ; 56:2, s. 162-169
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Tidskriftsartikel (refereegranskat)abstract
- Low-temperature MOS-gated Hall measurements and gated diode capacitance-voltage (C-V) measurements were performed to characterize both trap density and Hall mobility on 4H-silicon carbide MOSFETs with gate oxides grown by sodium enhanced oxidation (SEO) and thermally grown in N2O. The interface trap density D-it was determined close to the conduction band edge by Hall effect measurements to be 2 X 10(13) cm(-2) . eV(-1) in the N2O-based oxide sample and 1 X 10(11) cm(-2) . eV(-1) in the SEO sample. The presence of these interface trap states above the conduction band edge suggest that they are near interface oxide trap states rather than conventional fast interface trap states. The threshold voltage changes with temperature in MOSFETs with gate oxides grown thermally with N2O but not significantly in MOSFETs with gate oxides grown by SEO. The superior threshold voltage stability at low temperatures in the SEO-based MOSFET compared to the N20 oxidation-based MOSFET is due to lower trap density near the conduction band edge. Gated diode C-V measurements showed that MOSFETs with gate oxide grown by SEO had a higher density of interface traps (2.2 x 10(12) cm(-2)) deeper in the bandgap compared to MOSFETs with gate oxides thermally grown in N2O (1.4 x 10(12) cm(-1)). A maximum Hall mobility of 65 cm(2)/V. S was measured in the SEO-based MOSFET, and 16 cm(2)/V . s was measured on the N2O oxidation-based MOSFET at 225 K. The mobility correlates well with the interface trap density close to the conduction band edge as measured by Hall effect measurements but does not correlate with gated diode C-V measurements of traps deeper in the band gap. Temperature-dependent gated Hall mobility measurements were used to show that the inversion layer mobility in the SEO samples were limited by Coulomb scattering from interface trapped charge and surface roughness scattering but not by phonon scattering.
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