| 1. |
- Chandran, J, et al.
(författare)
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Xilinx Virtex II Pro implementation of a reconfigurable UMTS digital channel filter
- 2004
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Ingår i: [Host publication title missing]. - 0769520812 ; , s. 77-82
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Konferensbidrag (refereegranskat)abstract
- A reconfigurable digital root raised cosine (RRC) filter for a UMTS terrestrial radio access (UTRA) mobile terminal receiver is implemented on a Xilinx Vitrex II Pro Field Programmable Gate Array (FPGA). The filter employs a finite impulse response (FIR) and monitors in-band and out-of-band received signal powers and calculates the appropriate filter length that meets the bit-energy to interference ratio (Eb/No) of the system. The results presented are for the time division duplex (TDD) mode of UTRA.
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| 2. |
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| 3. |
- Veljanovski, Ronny, et al.
(författare)
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Design and ASIC Performance Analysis of a Reconfigurable Digital Filter for a UMTS Application
- 2003
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Ingår i: Seventh International Symposium on Signal Processing and Its Applications, 2003. Proceedings.. - 0780379462 ; 2, s. 255-258
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Konferensbidrag (refereegranskat)abstract
- A reconfigurable digital root raised cosine (RRC) filter for a UMTS terrestrial radio access (UTRA) mobile terminal receiver is described and analysed. The filter monitors in-band and out-of-band received signal powers and calculates the appropriate filter length that meets the bit-energy to interference ratio (Eb/No). This design is advantageous, as only minimum battery power is used resulting in power consumption savings compared to fixed filter length digital filters. A 70% average power reduction is available for the UTRA - time division duplex (TDD) system.
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