| 1. |
- Faraz, Sadia, et al.
(författare)
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Effect of annealing atmosphere on the diode behaviourof zno/si heterojunction
- 2021
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Ingår i: Elektronika ir Elektrotechnika. - : Kauno Technologijos Universitetas. - 1392-1215 .- 2029-5731. ; 27:4, s. 49-54
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Tidskriftsartikel (refereegranskat)abstract
- The effect of thermal annealing atmosphere on the electrical characteristics of Zinc oxide (ZnO) nanorods/p-Silicon (Si) diodes is investigated. ZnO nanorods are grown by low-temperature aqueous solution growth method and annealed in Nitrogen and Oxygen atmosphere. As-grown and annealed nanorods are studied by scanning electron microscopy (SEM) and photoluminescence (PL) spectroscopy. Electrical characteristics of ZnO/Si heterojunction diodes are studied by current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature. Improvements in rectifying behaviour, ideality factor, carrier concentration, and series resistance are observed after annealing. The ideality factor of 4.4 for as-grown improved to 3.8 and for Nitrogen and Oxygen annealed improved to 3.5 nanorods diodes. The series resistances decreased from 1.6 to 1.8 times after annealing. An overall improved behaviour is observed for oxygen annealed heterojunction diodes. The study suggests that by controlling the ZnO nanorods annealing temperatures and atmospheres the electronic and optoelectronic properties of ZnO devices can be improved.
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| 2. |
- Faraz, S. M., et al.
(författare)
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Effect of annealing temperature on the interface state density of n-ZnO nanorod/p-Si heterojunction diodes
- 2021
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Ingår i: Open Physics. - : De Gruyter Open Ltd. - 2391-5471. ; 19:1, s. 467-476
-
Tidskriftsartikel (refereegranskat)abstract
- The effect of post-growth annealing treatment of zinc oxide (ZnO) nanorods on the electrical properties of their heterojunction diodes (HJDs) is investigated. ZnO nanorods are synthesized by the low-temperature aqueous solution growth technique and annealed at temperatures of 400 and 600°C. The as-grown and annealed nanorods are studied by scanning electron microscopy (SEM) and photoluminescence (PL) spectroscopy. Electrical characterization of the ZnO/Si heterojunction diode is done by current–voltage (I–V) and capacitance–voltage (C–V) measurements at room temperature. The barrier height (ϕB), ideality factor (n), doping concentration and density of interface states (NSS) are extracted. All HJDs exhibited a nonlinear behavior with rectification factors of 23, 1,596 and 309 at ±5 V for the as-grown, 400 and 600°C-annealed nanorod HJDs, respectively. Barrier heights of 0.81 and 0.63 V are obtained for HJDs of 400 and 600°C-annealed nanorods, respectively. The energy distribution of the interface state density has been investigated and found to be in the range 0.70 × 1010 to 1.05 × 1012 eV/cm2 below the conduction band from EC = 0.03 to EC = 0.58 eV. The highest density of interface states is observed in HJDs of 600°C-annealed nanorods. Overall improved behavior is observed for the heterojunctions diodes of 400°C-annealed ZnO nanorods. © 2021 Sadia Muniza Faraz et al.
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| 3. |
- Haque, Muhammad Fahim Ul
(författare)
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Pulse-Width Modulated RF Transmitters
- 2017
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- The market for wireless portable devices has grown signicantly over the recent years.Wireless devices with ever-increased functionality require high rate data transmissionand reduced costs. High data rate is achieved through communication standards such asLTE and WLAN, which generate signals with high peak-to-average-power ratio (PAPR),hence requiring a power amplier (PA) that can handle a large dynamic range signal. Tokeep the costs low, modern CMOS processes allow the integration of the digital, analogand radio functions on to a single chip. However, the design of PAs with large dynamicrange and high eciency is challenging due to the low voltage headroom.To prolong the battery life, the PAs have to be power-ecient as they consume a sizablepercentage of the total power. For LTE and WLAN, traditional transmitters operatethe PA at back-o power, below their peak efficiency, whereas pulse-width modulation(PWM) transmitters use the PA at their peak power, resulting in a higher efficiency.PWM transmitters can use both linear and SMPAs where the latter are more power efficient and easy to implement in nanometer CMOS. The PWM transmitters have a higher efficiency but suffer from image and aliasing distortion, resulting in a lower dynamic range,amplitude and phase resolution.This thesis studies several new transmitter architectures to improve the dynamicrange, amplitude and phase resolution of PWM transmitters with relaxed filtering requirements.The architectures are suited for fully integrated CMOS solutions, in particular forportable applications.The first transmitter (MAF-PWMT) eliminates aliasing and image distortions whileallowing the use of SMPAs by combining RF-PWM and band-limited PWM. The transmittercan be implemented using all-digital techniques and exhibits an improved linearity and spectral performance. The approach is validated using a Class-D PA based transmitter where an improvement of 10.2 dB in the dynamic range compared to a PWM transmitter for a 1.4 MHz of LTE signal is achieved.The second transmitter (AC-PWMT) compensates for aliasing distortion by combining PWM and outphasing. It can be used with switch-mode PAs (SMPAs) or linear PAs at peak power. The proposed transmitter shows better linearity, improved spectral performanceand increased dynamic range as it does not suffer from AM-AM distortion of the PAs and aliasing distortion due to digital PWM. The idea is validated using push-pull PAs and the proposed transmitter shows an improvement of 9 dB in the dynamic rangeas compared to a PWM transmitter using digital pulse-width modulation for a 1.4 MHzLTE signal.The third transmitter (MD-PWMT) is an all-digital implementation of the second transmitter. The PWM is implemented using a Field Programmable Gate Array(FPGA) core, and outphasing is implemented as pulse-position modulation using FPGA transceivers, which drive two class-D PAs. The digital implementation offers the exibility to adapt the transmitter for multi-standard and multi-band signals. From the measurement results, an improvement of 5 dB in the dynamic range is observed as compared to an all-digital PWM transmitter for a 1.4 MHz LTE signal.The fourth transmitter (EP-PWMT) improves the phase linearity of an all-digital PWM transmitter using PWM and asymmetric outphasing. The transmitter uses PWM to encode the amplitude, and outphasing for enhanced phase control thus doubling the phase resolution. The measurement setup uses Class-D PAs to amplify a 1.4 MHz LTEup-link signal. An improvement of 2.8 dB in the adjacent channel leakage ratio is observed whereas the EVM is reduced by 3.3 % as compared to an all-digital PWM transmitter.The fifth transmitter (CRF-ML-PWMT) combines multilevel and RF-PWM, whereas the sixth transmitter (CRF-MP-PMWT) combines multiphase PWM and RF-PWM. Both transmitters have smaller chip area as compared to the conventional multiphase and multilevel PWM transmitters, as a combiner is not required. The proposed transmitters also show better dynamic range and improved amplitude resolution as compared to conventional RF-PWM transmitters.The solutions presented in this thesis aims to enhance the performance and simplify the digital implementation of PWM-based RF transmitters.
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| 4. |
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| 5. |
- Ahuja, Rajeev, et al.
(författare)
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Optical properties of 4H-SiC
- 2002
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Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 91:4, s. 2099-2103
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Tidskriftsartikel (refereegranskat)abstract
- The optical band gap energy and the dielectric functions of n-type 4H-SiC have been investigated experimentally by transmission spectroscopy and spectroscopic ellipsometry and theoretically by an ab initio full-potential linear muffin-tin-orbital method. We present the real and imaginary parts of the dielectric functions, resolved into the transverse and longitudinal photon moment a, and we show that the anisotropy is small in 4H-SiC. The measurements and the calculations fall closely together in a wide range of energies.
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| 6. |
- Arshad, Sana, et al.
(författare)
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50-830 MHz noise and distortion canceling CMOS low noise amplifier
- 2018
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Ingår i: Integration. - : Elsevier. - 0167-9260 .- 1872-7522. ; 60, s. 63-73
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Tidskriftsartikel (refereegranskat)abstract
- In this paper, a modified resistive shunt feedback topology is proposed that performs noise cancelation and serves as an opposite polarity non-linearity generator to cancel the distortion produced by the main stage. The proposed topology has a bandwidth similar to a resistive shunt feedback LNA, but with a superior noise figure (NF) and linearity. The proposed wideband LNA is fabricated in 130 nm CMOS technology and occupies an area of 0.5 mm(2). Measured results depict 3-dB bandwidth from 50 to 830 MHz. The measured gain and NF at 420 MHz are 17 dB and 2.2 dB, respectively. The high value of the 1/f noise is one of the key problems in low frequency CMOS designs. The proposed topology also addresses this challenge and a low NF is attained at low frequencies. Measured 811 and S22 are better than -8.9 dB and -8.5 dB, respectively within the 0.05-1 GHz band. The 1-dB compression point is -11.5 dBm at 700 MHz, while the IIP3 is -6.3 dBm. The forward core consumes 14 mW from a 1.8 V supply. This LNA is suitable for VHF and UHF SDR communication receivers.
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| 7. |
- Arshad, Sana, et al.
(författare)
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Highly Linear Inductively Degenerated 0.13 mu m CMOS LNA using FDC Technique
- 2014
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Ingår i: 2014 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS). - : IEEE. - 9781479952304 ; , s. 225-228
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Konferensbidrag (refereegranskat)abstract
- In this paper, a highly linear, inductively degenerated, common source narrowband LNA is presented. An extremely simple feed-forward distortion circuit (FDC) which consists of an appropriately sized ac-coupled diode connected NMOS is proposed. This circuit generates distortion components at output, when added at the input node as a feed forward element (M-6). These distortion components partially cancel the 3rd order nonlinearity of the cascode pair (M-2 and M-3), thus improving the overall linearity of LNA. The prototype is manufactured in standard 0.13 mu m CMOS process from IBM. Simulation and partial measurement results show the S11 and S22 to be -19.27dB and -7.14dB respectively at 2.45GHz. The simulation results of the LNA demonstrate a power gain of 18.5dB, NF of 4.38dB, input referred 1dBCP of -11.76dBm and IIP3 of +0.7dBm consuming 27.7mA from 1.0V power supply. The proposed LNA achieves the best input referred IIP3 reported in recent literature using 0.13 mu m CMOS in 2.4GHz frequency band.
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| 8. |
- Asghar, M., et al.
(författare)
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Properties of dominant electron trap center in n-type SiC epilayers by means of deep level transient spectroscopy
- 2007
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Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 101:7
-
Tidskriftsartikel (refereegranskat)abstract
- Characterization of dominant electron trap in as-grown SiC epilayers has been carried out using deep level transient spectroscopy. Two electron traps E1 and Z1 at Ec-0.21 and Ec-0.61 are observed, respectively, Z1 being the dominant level. Line shape fitting, capture cross section, and insensitivity with doping concentration have revealed interesting features of Z1 center. Spatial distribution discloses that the level is generated in the vicinity of epilayers/substrate interface and the rest of the overgrown layers is defect-free. Owing to the Si-rich growth conditions, the depth profile of Z1 relates it to carbon vacancy. The alpha particle irradiation transforms Z1 level into Z 1/Z2 center involving silicon and carbon vacancies. Isochronal annealing study further strengthens the proposed origin of the debated level. © 2007 American Institute of Physics.
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| 9. |
- Ashraf, H., et al.
(författare)
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Study of electric field enhanced emission rates of an electron trap in n-type GaN grown by hydride vapor phase epitaxy
- 2010
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Ingår i: Journal of Applied Physics. - : American Institute of Physics. - 0021-8979 .- 1089-7550. ; 108:10
-
Tidskriftsartikel (refereegranskat)abstract
- Electric field-enhanced emission of electrons from a deep level defect in GaN grown by hydride vapor phase epitaxy has been studied. Using the field dependent mode of conventional deep level transient spectroscopy (DLTS), several frequency scans were performed keeping applied electric field (12.8-31.4 MV/m) and sample temperature (300-360 K) constant. Arrhenius plots of the resultant data yielded an activation energy of the electron trap E ranging from E-c -0.48 +/- 0.02 eV to E-c-0.35 +/- 0.02 eV, respectively. The extrapolation of the as-measured field dependent data (activation energy) revealed the zero-field emission energy (pure thermal activation energy) of the trap to be 0.55 +/- 0.02 eV. Various theoretical models were applied to justify the field-enhanced emission of the carriers from the trap. Eventually it was found that the Poole-Frenkel model associated with a square well potential of radius r=4.8 nm was consistent with the experimental data, and, as a result, the trap is attributed to a charged impurity. Earlier, qualitative measurements like current-voltage (I-V) and capacitance-voltage (C-V) measurements were performed, and screening parameters of the device were extracted to ascertain the reliability of DLTS data.
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| 10. |
- Azam, Sher, et al.
(författare)
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Comparison of Two GaN Transistor Technologies in Broadband Power Amplifiers
- 2010
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Ingår i: MICROWAVE JOURNAL. - : Horizon House Publications, Inc.. - 0192-6225. ; 53:4, s. 184-192
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Tidskriftsartikel (refereegranskat)abstract
- This article compares the performance of two different GaN transistor technologies, GaN HEMT on silicon substrate (PA1) and GaN on SiC (PA2), utilized in two broadband power amplifiers operating at 0.7 to 1.8 GHz. The study explores the broadband power amplifier potential of both GaN HEMT technologies for phased-array radar (PAR) and electronic warfare (EW) systems. The measured maximum output power for PA1 is 42.5 dBm (18 W) with a maximum PAE of 66 percent and a gain of 19.5 dB. The measured maximum output power for PA2 is 40 dBm with a PAE of 37 percent and a power gain slightly above 10 dB. The high power gain, ME, wider bandwidth and unconditional stability was obtained without feedback for the amplifier based on GaN HEMT technology, fabricated on Si substrate.
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| 11. |
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| 12. |
- Azam, Sher, 1971-
(författare)
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Microwave Power Devices and Amplifiers for Radars and Communication Systems
- 2009
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- SiC MESFETs and GaN HEMTs posses an enormous potential in power amplifiers at microwave frequencies due to their wide bandgap features of high electric field strength, high electron saturation velocity and high operating temperature. The high power density combined with the comparably high impedance attainable by these devices also offers new possibilities for wideband power microwave systems. Similarly Si-LDMOS being low cost and lonely silicon based RF power transistor has great contributions especially in the communication sector.The focus of this thesis work is both device study and their application in different classes of power amplifiers. In the first part of our research work, we studied the performance of transistors in device simulation using physical transistor structure in Technology Computer Aided Design (TCAD). A comparison between the physical simulations and measured device characteristics has been carried out. We optimized GaN HEMT, Si-LDMOS and enhanced version of our previously fabricated and tested SiC MESFET transistor for enhanced RF and DC characteristics. For large signal AC performance we further extended the computational load pull (CLP) simulation technique to study the switching response of the power transistors. The beauty of our techniques is that, we need no lumped or distributive matching networks to study active device behavior in almost all major classes of power amplifiers. Using these techniques, we studied class A, AB, pulse input class-C and class-F switching response of SiC MESFET. We obtained maximum PAE of 78.3 % with power density of 2.5 W/mm for class C and 84 % for class F power amplifier at 500 MHz. The Si-LDMOS has a vital role and is a strong competitor to wideband gap semiconductor technology in communication sector. We also studied Si-LDMOS (transistor structure provided by Infineon Technologies at Kista, Stockholm) for improved DC and RF performance. The interface charges between the oxide and RESURF region are used not only to improve DC drain current and RF power, gain & efficiency but also enhance its operating frequency up to 4 GHz.In the second part of our research work, six single stage (using single transistor) power amplifiers have been designed, fabricated and characterized in three phases for applications in communications, Phased Array Radars and EW systems. In the first phase, two class AB power amplifiers are designed and fabricated. The first PA (26 W) is designed and fabricated at 200-500 MHz using SiC MESFET. Typical results for this PA at 60 V drain bias at 500 MHz are, 24.9 dB of power gain, 44.15 dBm output power (26 W) and 66 % PAE. The second PA is designed at 30-100 MHz using SiC MESFET. At 60 V drain bias Pmax is 46.7 dBm (~47 W) with a power gain of 21 dB.In the second phase, for performance comparison, three broadband class AB power amplifiers are designed and fabricated at 0.7-1.8 GHz using SiC MESFET and two different GaN HEMT technologies (GaN HEMT on SiC and GaN HEMT on Silicon substrate). The measured maximum output power for the SiC MESFET amplifier at a drain bias of Vd= 66 V at 700 MHz the Pmax was 42.2 dBm (~16.6 W) with a PAE of 34.4 %. The results for GaN HEMT on SiC amplifier are; maximum output power at Vd = 48 V is 40 dBm (~10 W), with a PAE of 34 % and a power gain above 10 dB. The maximum output power for GaN HEMT on Si amplifier is 42.5 dBm (~18 W) with a maximum PAE of 39 % and a gain of 19.5 dB.In the third phase, a high power single stage class E power amplifier is implemented with lumped elements at 0.89-1.02 GHz using Silicon GaN HEMT as an active device. The maximum drain efficiency (DE) and PAE of 67 and 65 % respectively is obtained with a maximum output power of 42.2 dBm (~ 17 W) and a maximum power gain of 15 dB.
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| 13. |
- Azam, Sher, 1971-, et al.
(författare)
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Performance of SiC Microwave Transistors in Power Amplifiers
- 2008
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Ingår i: Proc. of MRS Symposium on wide bandgap semiconductor electronics 8. - 9781605110394 ; , s. 203-208
-
Konferensbidrag (refereegranskat)abstract
- The performance of SiC microwave power transistors is studied in fabricated class-AB power amplifiers and class-C switching power amplifier using physical structure of an enhanced version of previously fabricated and tested SiC MESFET. The results for pulse input in class-C at 1 GHz are; efficiency of 71.4 %, power density of 1.0 W/mm. The switching loss was 0.424 W/mm. The results for two class-AB power amplifiers are; the 30-100 MHz amplifier showed 45.6 dBm (∼ 36 W) output powers at P1dB, at 50 MHz. The power added efficiency (PAE) is 48 % together with 21 dB of power gain. The maximum output power at P1dB at 60 V drain bias and Vg= -8.5 V was 46.7 dBm (∼47 W). The typical results obtained in 200-500 MHz amplifier are; at 60 V drain bias the P1dB is 43.85 dBm (24 W) except at 300 MHz where only 41.8 dBm was obtained. The maximum out put power was 44.15 dBm (26 W) at 500 MHz corresponding to a power density of 5.2 W/mm. The PAE @ P1dB [%] at 500 MHz is 66 %.
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| 14. |
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| 15. |
- Bano, Nargis, et al.
(författare)
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Depth-resolved cathodoluminescence study of zinc oxide nanorods catalytically grown on p-type 4H-SiC
- 2010
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Ingår i: Journal of Luminescence. - : Elsevier Science B.V., Amsterdam.. - 0022-2313 .- 1872-7883. ; 130:6, s. 963-968
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Tidskriftsartikel (refereegranskat)abstract
- Optical properties of ZnO nanorods (NRs) grown by vapour-liquid-solid (VLS) technique on 4H-p-SiC substrates were probed by cathodoluminescence (CL) measurements at room temperature and at 5 K complemented with electroluminescence. At room temperature the CL spectra for defect related emission intensity was enhanced with the electron beam penetration depth. We observed a variation in defect related green emission along the nanorod axis. This indicates a relatively poor structural quality near the interface between ZnO NRs and p-SiC substrate. We associate the green emission with oxygen vacancies. Analysis of the low-temperature (5 K) emission spectra in the UV region suggests that the synthesized nanorods contain shallow donors and acceptors.
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| 16. |
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| 17. |
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| 18. |
- Chang, KC, et al.
(författare)
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High-carbon concentrations at the silicon dioxide-silicon carbide interface identified by electron energy loss spectroscopy
- 2000
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Ingår i: Applied Physics Letters. - 0003-6951 .- 1077-3118. ; 77:14, s. 2186-2188
-
Tidskriftsartikel (refereegranskat)abstract
- High carbon concentrations at distinct regions at thermally-grown SiO2/6H-SiC(0001) interfaces have been detected by electron energy loss spectroscopy (EELS). The thickness of these C-rich regions is estimated to be 10-15 Angstrom. The oxides were grown on n-type 6H-SiC at 1100 degrees C in a wet O-2 ambient for 4 h immediately after cleaning the substrates with the complete RCA process. In contrast, C-rich regions were not detected from EELS analyses of thermally grown SiO2/Si interfaces nor of chemical vapor deposition deposited SiO2/SiC interfaces. Silicon-rich layers within the SiC substrate adjacent to the thermally grown SiO2/SiC interface were also evident. The interface state density D-it in metal-oxide-SiC diodes (with thermally grown SiO2) was approximately 9x10(11) cm(-2) eV(-1) at E- E-v=2.0 eV, which compares well with reported values for SiC metal-oxide-semiconductor (MOS) diodes that have not received a postoxidation anneal. The C-rich regions and the change in SiC stoichiometry may be associated with the higher than desirable D-it's and the low channel mobilities in SiC-based MOS field effect transistors. (C) 2000 American Institute of Physics. [S0003-6951(00)01940-9].
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| 19. |
- Ciechonski, Rafal, 1976-, et al.
(författare)
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Evaluation of MOS structures processed on 4H–SiC layers grown by PVT epitaxy
- 2005
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 49:12, s. 1917-1920
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Tidskriftsartikel (refereegranskat)abstract
- MOS capacitors have been fabricated on 4H–SiC epilayers grown by physical vapor transport (PVT) epitaxy. The properties were compared with those on similar structures based on chemical vapor deposition (CVD) layers. Capacitance–voltage (C–V) and conductance measurements (G–V) were performed in the frequency range of 1 kHz to 1 MHz and also at temperatures up to 475 K. Detailed investigations of the PVT structures indicate a stable behaviour of the interface traps from room temperature up to 475 K. The amount of positive oxide charge QO is 6.83 × 109 cm−2 at room temperature and decreases with temperature increase. This suggests that the processed devices are temperature stable. The density of interface states Dit obtained by Nicollian–Brews conductance method is lower in the structure based on the PVT grown sample.
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| 20. |
- Ellison, A, et al.
(författare)
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Fast SiC epitaxial growth in a chimney CVD reactor and HTCVD crystal growth developments
- 2000
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Ingår i: Materials science Forum, Vols. 338-342. - : Trans Tech Publications Inc.. - 0878498540 ; , s. 131-136
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Konferensbidrag (refereegranskat)abstract
- The epitaxial growth of SiC is investigated in a CVD process based on a vertical hot-wall, or "chimney", reactor geometry. Carried out at increased temperatures (1650 to 1850 degreesC) and concentrations of reactants, the growth process enables epitaxial rates ranging from 10 to 50 mum/h. The growth rate is shown to be influenced by two competing processes: the supply of growth species in the presence of homogeneous gas-phase nucleation, and, the etching effect of the hydrogen carrier gas. The quality of thick (20 to 100 mum) low-doped 4H-SiC epitaxial layers grown at rates ranging between 10 and 25 mum/h are discussed in terms of thickness uniformity, surface morphology and purity. The feasibility of high voltage Schottky rectifiers (V-BR from 2 to similar to3.8 kV) on as-grown chimney CVD epilayers is reported. In a second part, recent developments of the High Temperature Chemical Vapor Deposition (HTCVD) technique for SiC crystal growth are described. Using pure gases (SiH4 and C2H4) as source material and growth temperatures of 2100-2300 degreesC, this technique enables at present growth rates ranging from 0.4 to 0.8 mm/h. 6H and 4H-SiC crystals of thickness up to 7 mm and diameters up to 40 mm have been grown. We report micropipe densities of similar to 80 cm(-2) over areas of 0.5 cm(2) in 35 mm diameter 4H-SiC wafers sliced from HTCVD grown crystals. Undoped wafer demonstrators exhibit semi-insulating behavior with a bulk resistivity higher than 7.10(9) Omega cm at room temperature.
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| 21. |
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| 22. |
- Ewing, D.J., et al.
(författare)
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Inhomogeneities in Ni4H-SiC Schottky barriers : Localized Fermi-level pinning by defect states
- 2007
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Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 101:11
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Tidskriftsartikel (refereegranskat)abstract
- We investigated arrays of Ni, Pt, or Ti Schottky diodes on n -type 4H-SiC epitaxial layers using current-voltage (I-V) measurements, electron beam induced current (EBIC), polarized light microscopy, x-ray topography, and depth-resolved cathodoluminescence spectroscopy. A significant percentage of diodes (∼7%-30% depending on epitaxial growth method and diode size) displayed "nonideal" or inhomogeneous barrier height characteristics. We used a thermionic emission model based on two parallel diodes to determine the barrier heights and ideality factors of high- and low-barrier regions within individual nonideal diodes. Whereas high-barrier barrier heights increased with metal work function, low-barrier barrier heights remained constant at ∼0.60, 0.85, and 1.05 eV. The sources of these nonidealities were investigated with a variety of spectroscopic and imaging techniques to determine the nature and energy levels of the defects. EBIC indicated that clusters of defects occurred in all inhomogeneous diodes. Cathodoluminescence spectra revealed additional peaks in the nonideal diodes at 2.65, 2.40, and 2.20 eV, which complement the low-barrier barrier heights. It is proposed that defect clusters act to locally pin the Fermi level, creating localized low-barrier patches, which account for the inhomogeneous electrical characteristics. © 2007 American Institute of Physics.
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| 23. |
- Ewing, D.J., et al.
(författare)
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Inhomogeneous electrical characteristics in 4H-SiC Schottky diodes
- 2007
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Ingår i: Semiconductor Science and Technology. - : IOP Publishing. - 0268-1242 .- 1361-6641. ; 22:12, s. 1287-1291
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Tidskriftsartikel (refereegranskat)abstract
- Hundreds of current-voltage (I-V) measurements of Ni, Pt and Ti Schottky diodes on 4H-SiC were conducted at low applied voltages. The SiC substrates contained homoepitaxial layers grown by either chemical vapor deposition or sublimation. While near-ideal contacts were fabricated on all samples, a significant percentage of diodes (∼7%-50% depending on the epitaxial growth method and the diode size) displayed a non-ideal, or inhomogeneous, barrier height. These 'non-ideal' diodes occurred regardless of growth technique, pre-deposition cleaning method, or contact metal. In concurrence with our earlier reports in which the non-ideal diodes were modeled as two Schottky barriers in parallel, the lower of the two Schottky barriers, when present, was predominantly centered at one of the three values: ∼0.60, 0.85 or 1.05 eV. The sources of these non-idealities were investigated using electron-beam- induced current (EBIC) and deep-level transient spectroscopy (DLTS) to determine the nature and energy levels of the defects. DLTS revealed a defect level that corresponds with the low- (non-ideal) barrier height, at ∼0.60 eV. It was also observed that the I-V characteristics tended to degrade with increasing deep-level concentration and that inhomogeneous diodes tended to contain defect clusters. Based on the results, it is proposed that inhomogeneities, in the form of one or more low-barrier height regions within a high-barrier height diode, are caused by defect clusters that locally pin the Fermi level. © 2007 IOP Publishing Ltd.
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| 24. |
- Faraz, Sadia Muniza, et al.
(författare)
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Annealing Effects on Electrical and Optical Properties of N-ZnO/P-Si Heterojunction Diodes
- 2011
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Ingår i: <em>Advanced Materials Research Vol. 324 (2011) pp 233-236</em>. - : Trans Tech Publications Inc.. ; , s. 233-236
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Konferensbidrag (refereegranskat)abstract
- The effects of post fabrication annealing on the electrical characteristics of n-ZnO/p-Si heterostructure are studied. The nanorods of ZnO are grown by aqueous chemical growth (ACG) technique on p-Si substrate and ohmic contacts of Al/Pt and Al are made on ZnO and Si. The devices are annealed at 400 and 600 oC in air, oxygen and nitrogen ambient. The characteristics are studied by photoluminescence (PL), current–voltage (I-V) and capacitance - voltage (C-V) measurements. PL spectra indicated higher ultraviolet (UV) to visible emission ratio with a strong peak of near band edge emission (NBE) centered from 375-380 nm and very weak broad deep-level emissions (DLE) centered from 510-580 nm. All diodes show typical non linear rectifying behavior as characterized by I-V measurements. The results indicated that annealing in air and oxygen resulted in better electrical characteristics with a decrease in the reverse current.
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| 25. |
- Faraz, Sadia Muniza, et al.
(författare)
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Electrical Characterization of Si/ZnO Nanorod PN Heterojunction Diode
- 2020
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Ingår i: Advances in Condensed Matter Physics. - : HINDAWI LTD. - 1687-8108 .- 1687-8124. ; 2020
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Tidskriftsartikel (refereegranskat)abstract
- The electrical characterization of p-Silicon (Si) and n-Zinc oxide (ZnO) nanorod heterojunction diode has been performed. ZnO nanorods were grown on p-Silicon substrate by the aqueous chemical growth (ACG) method. The SEM image revealed high density, vertically aligned hexagonal ZnO nanorods with an average height of about 1.2 mu m. Electrical characterization of n-ZnO nanorods/p-Si heterojunction diode was done by current-voltage (I-V), capacitance-voltage (C-V), and conductance-voltage (G-V) measurements at room temperature. The heterojunction exhibited good electrical characteristics with diode-like rectifying behaviour with an ideality factor of 2.7, rectification factor of 52, and barrier height of 0.7 V. Energy band (EB) structure has been studied to investigate the factors responsible for small rectification factor. In order to investigate nonidealities, series resistance and distribution of interface state density (N-SS) below the conduction band (CB) were extracted with the help of I-V and C-V and G-V measurements. The series resistances were found to be 0.70, 0.73, and 0.75 K omega, and density distribution interface states from 8.38 x 10(12) to 5.83 x 10(11) eV(-1) cm(-2) were obtained from 0.01 eV to 0.55 eV below the conduction band.
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| 26. |
- Faraz, S. M., et al.
(författare)
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Voltage- and Frequency-Dependent Electrical Characteristics and Interface State Density of Ni/ZnO Schottky Diodes
- 2022
-
Ingår i: Acta Physica Polonica. A. - : POLISH ACAD SCIENCES INST PHYSICS. - 0587-4246 .- 1898-794X. ; 141:2, s. 99-104
-
Tidskriftsartikel (refereegranskat)abstract
- Frequency and voltage dependent electrical characteristics are reported for Ni/ZnO Schottky diodes. Schottky diodes are realized from nano-structured ZnO thin films grown by DC magnetron sputtering. Electrical characterizations are performed by current-voltage (I-V), capacitance-voltage (C-V) and conductance-voltage (G/omega-V) measurements. The diode parameters are extracted, such as barrier height (phi(B)), ideality factor (n) and carrier concentration (N-D). The diodes exhibited a non-linear rectifying behaviour with a barrier height of 0.68 eV and an ideality factor greater than unity. Charge transport mechanism and possible reasons responsible for non-idealities are investigated. The density of interface states (N-SS) below the conduction band are extracted from the measured values of I-V and C-V as a function of E-C - E-SS. From E-C- 0.51 to E-C - 0.64 eV below the conduction band edge, the interface state density N-SS is found to be in the range 1.74 x 10(12)-1.87 x 10(11) eV cm. The interface states density obtained from capacitance-frequency (C-f) characteristics varied from 0.53 x 10(12)-0.12 x 10(12) eV cm from E-C 0.82 eV to E-C 0.89 eV below the conduction band. A complete description of current transport and interface properties is important for the realization of good quality Schottky diodes and for the design and implementation of high performance electronic circuits and systems.
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| 27. |
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| 28. |
- Jonsson, Rolf, et al.
(författare)
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Computational load pull simulations of SiC microwave power transistors
- 2003
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Ingår i: Solid-State Electronics. - 0038-1101 .- 1879-2405. ; 47:11, s. 1921-1926
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Tidskriftsartikel (refereegranskat)abstract
- The design of power transistors for microwave applications requires a good understanding of their large signal behaviour in a real circuit context. The computational load-pull simulation technique is a powerful new way to evaluate the full time-domain voltages and currents of microwave power transistors during realistic operation. With this method it is possible to relate details in the time domain voltages and currents to corresponding variations in carrier densities, electrical field, etc. in the device. We have utilised the standard device simulator Medici, directly driven by sine voltage sources on both input and output. The resulting data from the simulations was then analysed using Matlab. Several 4H-SiC MESFET structures were evaluated by this technique and we found the p-type buffer layer doping and thickness to be crucial to obtain an optimum RF power. A 4H-SiC MESFET structure was found to have an output power of 6.2 W/mm at 1 GHz. ⌐ 2003 Elsevier Ltd. All rights reserved.
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| 29. |
- Jonsson, Rolf, et al.
(författare)
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DC and RF performance of insulating gate 4H-SiC depletion mode Field Effect Transistors
- 2004
-
Ingår i: Materials Science Forum, Vols. 457-460. ; , s. 1225-1228
-
Konferensbidrag (refereegranskat)abstract
- A depletion mode 4H-SiC MOSFET for RT applications is studied using drift-diffusion physical device simulations. The structure is basically the same as for a MESFET. A MOS gate with a 30 nm thick SiO2 layer replaces the Schottky gate. A 40% increase in the drain current was observed for a positive gate bias of 7 V compared to 0 V. The small signal AC analysis showed f(T) and f(max) to be 15.7 and 52.9 GHz respectively.
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| 30. |
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| 31. |
- Kashif, Ahsan-Ullah, et al.
(författare)
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A TCAD approach for non-linear evaluation of microwave power transistor and its experimental verification by LDMOS
- 2010
-
Ingår i: Journal of Computational Electronics. - : SpringerLink. - 1569-8025 .- 1572-8137. ; 9:2, s. 79-86
-
Tidskriftsartikel (refereegranskat)abstract
- A simulation technique is developed in TCAD to study the non-linear behavior of RF power transistor. The technique is based on semiconductor transport equations to swot up the overall non-linearity’s occurring in RF power transistor. Computational load-pull simulation technique (CLP) developed in our group, is further extended to study the non-linear effects inside the transistor structure by conventional two-tone RF signals, and initial simulations were done in time domain. The technique is helpful to detect, understand the phenomena and its mechanism which can be resolved and improve the transistor performance. By this technique, the third order intermodulation distortion (IMD3) was observed at different power levels. The technique was successfully implemented on a laterally-diffused field effect transistor (LDMOS). The value of IMD3 obtained is −22 dBc at 1-dB compression point (P 1 dB) while at 10 dB back off the value increases to −36 dBc. Simulation results were experimentally verified by fabricating a power amplifier with the similar LDMOS transistor.
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| 32. |
- Kashif, Ahsan-Ullah, et al.
(författare)
-
A TCAD Approach to Design a Broadband Power Amplifier
- 2010
-
Annan publikation (övrigt vetenskapligt/konstnärligt)abstract
- Technology Computer Aided Design (TCAD) provides an alternate method to study the power amplifier (PA) design prior to fabrication. It is very useful for the extraction of an accurate large signal model. This paper presents a design approach from device to circuit level to study broadband PA performance of RF-LDMOS using computational load-pull (CLP) analysis. To validate the TCAD approach, we have designed a broadband (1.9 - 2.5 GHz) class AB power amplifier. The concept is verified by designing an output broadband matching network at optimum impedance value (Zf) of RF-LDMOS using ADS software. The large signal results verify this concept and RF output power of 30.8 dBm is achieved with comparable gain and efficiency.
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| 33. |
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| 34. |
- Kashif, Ahsan-Ullah, 1974-, et al.
(författare)
-
Flexible power amplifier designing form device to circuit level by computational load-pull simulation technique
- 2008
-
Ingår i: Microelectonics Technology and Devices - SBMicro 2008, Vol. 14, issue 1. - Pennington, New Jersey : Electrochemical Society. - 9781566776462 ; , s. 233-239
-
Konferensbidrag (refereegranskat)abstract
- Matchingnetwork is major issue in broadband power amplifiers due tothe fact that the transistor impedances are varying both withfrequency and signal level. Thus it is difficult to matchthese impedances both at the input and output stages. Thetunable matching networks are very demanding and desired for buildingflexible systems, but their accuracy depends on the transistor performanceunder the large signal operation. Computational load pull (CLP) simulationtechnique is a unique way to extract the impedances ofpower transistor at desired frequencies which make the design ofmatching network much easier for multiple bands power amplifiers. AnLDMOS transistor is studied and its optimum impedances are extractedat 1, 2 and 2.5 GHz. Through optimum impedance, thetunable matching networks can be easily design for broadband amplifiers.
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| 35. |
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| 36. |
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| 37. |
- Kashif, Ahsan-Ullah
(författare)
-
Optimization of LDMOS Transistor in Power Amplifiers for Communication Systems
- 2010
-
Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- The emergence of new communication standards has put a key challenge for semiconductor industry to develop RF devices that can handle high power and high data rates simultaneously. The RF devices play a key role in the design of power amplifiers (PAs), which is considered as a heart of base-station. From economical point of view, a single wideband RF power module is more desirable rather than multiple narrowband PAs especially for multi-band and multi-mode operation. Therefore, device modeling has now become much more crucial for such applications. In order to reduce the device design cycle time, the researchers also heavily rely on computer aided design (CAD) tools. With improvement in CAD technology the model extraction has become more accurate and device physical structure optimization can be carried out with less number of iterations.LDMOS devices have been dominating in the communication field since last decade and are still widely used for PA design and development. This thesis deals with the optimization of RFLDMOS transistor and its evaluation in different PA classes, such as linear, switching, wideband and multi-band applications. For accurate evaluation of RF-LDMOS transistor parameters, some techniques are also developed in technology CAD (TCAD) using large signal time domain computational load-pull (CLP) methods.Initially the RF-LDMOS is studied in TCAD for the improved RF performance. The physical intrinsic structure of RF-LDMOS is provided by Infenion Technologies AG. A reduced surface field (RESURF) of low-doped drain (LDD) region is considered in detail because it plays an important role in RF-LDMOS devices to obtain high breakdown voltage (BVDS). But on the other hand, it also reduces the RF performance due to high on-resistance (Ron). The excess interface state charges at the RESURF region are introduced to reduce the Ron, which not only increases the dc drain current, but also improve the RF performance in terms of power, gain and efficiency. The important achievement is the enhancement in operating frequency up to 4 GHz. In LDD region, the effect of excess interface charges at the RESURF is also compared with dual implanted-layer of p-type and n-type. The comparison revealed that the former provides 43 % reduction in Ron with BVDS of 70 V, while the later provides 26 % reduction in Ron together with BVDS of 64 - 68 V.In the second part of my research work, computational load pull (CLP) simulation technique is used in TCAD to extract the impedances of RF-LDMOS at different frequencies under large signal operation. Flexible matching is an issue in the design of broadband or multi-band PAs. Optimum impedance of RF-LDMOS is extracted at operating frequencies of 1, 2 and 2.5 GHz in class AB PA. After this, CLP simulation technique is further developed in TCAD to study the non-linear behavior of RF devices. Through modified CLP technique, non-linear effects inside the transistor structure are studied by conventional two-tone RF signals in time domain. This is helpful to detect and understand the phenomena, which can be resolved to improve the device performance. The third order inter-modulation distortion (IMD3) of RF- LDMOS was observed at different power levels. The IMD3 of −22 dBc is obtained at 1-dB compression point (P1-dB), while at 10 dB back off the value increases to −36 dBc. These results were also verified experimentally by fabricating a linear PA. Similarly, CLP technique is developed further for the analysis of RF devices in high efficiency operation by investigating the odd harmonic effects for the design of class-F PA. RF-LDMOS can provide a power added efficiency (PAE) of 81.2 % in class-F PA at 1 GHz in TCAD simulations. The results are verified by design and fabrication of class-F PA using large signal model of the similar device in ADS. In fabrication, a PAE of 76 % is achieved.
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| 38. |
- Kashif, Ahsan-Ullah, et al.
(författare)
-
Reduction in on-resistance of LDMOS transistor for improved RF performance
- 2009
-
Ingår i: Microelectronics Technology and Devices - SBMicro 2009, Vol. 23, issue 1. - Pennington, New Jersey : The Electrochemical Society. - 9781566777377 ; , s. 413-420
-
Konferensbidrag (refereegranskat)abstract
- Inan LDMOS transistor, a low doped drift (LDD) region atthe drain side is created to enhance the breakdown voltage(BVDS), but this increases on-resistance (Ron) which degrades the transistorRF performance. In this paper, the LDD region of LDMOStransistor is optimized using two different techniques, (i) a dualimplanted-layer p- and n-region in LDD and (ii) an excessinterface charge at the RESURF of LDD. Both techniques areused to enhance the carrier density for lower Ron. Thecomparison revealed that excess interface charge provides 43 % reductionin Ron with BVDS of 70 V, while the dual-implantedregion provides 26 % reduction in Ron together with BVDSof 64 - 68 V.
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| 39. |
- Kashif, Ahsan-Ullah, et al.
(författare)
-
Switching Behavior of Microwave Power Transistor Studied in TCAD for Switching Class Power Amplifiers and Experimental Verification by LDMOS based Class-F Power Amplifier
- 2010
-
Annan publikation (övrigt vetenskapligt/konstnärligt)abstract
- This paper presents a TCAD study of high speed switching behavior of RF power-transistor in class-F Power Amplifier. We utilized finite harmonics loads for achieving maximum efficiency, without external circuitry. The in house developed computational load–pull (CLP) simulation technique is further extended to investigate the odd harmonic effects of RF transistor in class-F operation. An LD-MOSFET is studied which provided 81.2 % power added efficiency (PAE) at 1 GHz. The concept is experimentally verified by fabricating a class-F PA using same transistor. In the measurement, 76 % PAE is achieved, which is close to the TCAD simulated results. TCAD is an excellent tool to study the behavior of active devices. It has an ability to enhance and optimize the performance of transistor according to system specifications before fabrication.
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| 40. |
- Khan, Hashim Raza, et al.
(författare)
-
Design of a broadband current mode class-D power amplifier with harmonic suppression
- 2016
-
Ingår i: Analog Integrated Circuits and Signal Processing. - : Springer. - 0925-1030 .- 1573-1979. ; 89:1, s. 15-24
-
Tidskriftsartikel (refereegranskat)abstract
- Current mode class-D power amplifiers (CMCD-PA) are attractive for fully integrated PA implementation as the output capacitance of the active device can be absorbed in the output matching network that can be realized with minimum number of components. This paper presents a simplified design approach for CMCD PA design using an integrated balun transformers. Expressions are derived for the optimum device sizing for second harmonic suppression resulting in improved efficiency. An expression of amplifier efficiency as a function of device size is is presented proving that current mode class-D amplifier yields higher higher efficiency than a class-E amplifier for the same device size. The amplifier is implemented in 130 nm CMOS process and encapsulated in QFN package. Measurement results show that the amplifier exhibits broadband response between 1.4 and 2.1 GHz with peak output power of 26.8 dBm at 1.8 GHz using a 2.4 V supply. PAE remains above 40 % for the entire range while peak PAE is 48 %. Results show a good match between simulation and measurement work. Voltage sweep of the amplifier shows that it can be used in supply modulation based LINC techniques.
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| 41. |
- Khan, H. R., et al.
(författare)
-
Design of a Broadband Current Mode Class-D Power Amplifier with Harmonic Suppression
- 2014
-
Ingår i: 2014 IEEE 12TH INTERNATIONAL NEW CIRCUITS AND SYSTEMS CONFERENCE (NEWCAS). - : IEEE. - 9781479948857 ; , s. 169-172
-
Konferensbidrag (refereegranskat)abstract
- Current Mode Class-D Power Amplifiers (CMC-DPA) are attractive for fully integrated PA implementation as the output capacitance of the active device can be absorbed in the output matching network that can be realized with minimum number of components. This paper presents a simplified design approach for CMCD PA design using an integrated balun transformers. Also, expressions are derived for the optimum device sizing for second harmonic suppression resulting in improved efficiency. The amplifier is implemented in 130 nm CMOS process and encapsulated in QFN package. Measurement results show that the amplifier exhibits broadband response between 1.4 GHz and 2.1 GHz with peak output power of 26.8 dBm at 1.8 GHz using a 2.4 V supply. PAE remains above 40% for the entire range while peak PAE and drain efficiency are 45% and 48%, respectively.
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| 42. |
- Khan, H. R., et al.
(författare)
-
PWM with Differential Class-E Amplifier for Efficiency Enhancement at Back-Off Power Levels
- 2014
-
Ingår i: 2014 IEEE 57TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS). - : IEEE. - 9781479941322 ; , s. 607-610
-
Konferensbidrag (refereegranskat)abstract
- A simplified output matching network for pulse width modulated Class-E Power Amplifier for efficiency enhancement at back-off power level is proposed. The shunt capacitance and the series inductance in the Class-E PA are realized through capacitor banks that are tuned according to the duty cycle to meet ZVS conditions. The differential PA design is implemented in 130 nm CMOS technology achieving maximum Pout of 24.8 dBm at 1.8 GHz with PAE better than 38% at 50% duty cycle. The output power is modulated with the input duty cycle and provides 6.2 dB back-off power level keeping PAE almost constant around 38%.
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| 43. |
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| 44. |
- Klason, Peter, 1977, et al.
(författare)
-
Synthesis and structural and optical properties of ZnO micro- and nanostructures grown by the vapour-liquid-solid method
- 2006
-
Ingår i: Physica Scripta. - 0031-8949 .- 1402-4896. ; T126, s. 53-56
-
Tidskriftsartikel (refereegranskat)abstract
- ZnO micro- and nanostructures have been grown by the catalytic vapour - liquid - solid method on silicon and silicon carbide. These micro- and nanostructures were characterized by scanning electron microscope, x-ray diffraction and photoluminescence measurements. The characterization shows that the ZnO nano- and microrods grown have diameters of around 200 nm on the Si substrates and 600 nm when using the SiC substrates. The length ranges from 0.5 to 10 mu m.
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| 45. |
- Muniza Faraz, Sadia, et al.
(författare)
-
Interface state density of free-standing GaN Schottky diodes
- 2010
-
Ingår i: Semiconductor Science and Technology. - : Iop Publishing Ltd. - 0268-1242 .- 1361-6641. ; 25:9, s. 095008-
-
Tidskriftsartikel (refereegranskat)abstract
- Schottky diodes were fabricated on the HVPE-grown, free-standing gallium nitride (GaN) layers of n- and p-types. Both contacts (ohmic and Schottky) were deposited on the top surface using Al/Ti and Pd/Ti/Au, respectively. The Schottky diode fabricated on n-GaN exhibited double barriers with values of 0.9 and 0.6 eV and better performance in the rectification factor together with reverse and forward currents with an ideality factor of 1.8. The barrier height for the p-GaN Schottky diode is 0.6 eV with an ideality factor of 4.16. From the capacitance-voltage (C-V) measurement, the net doping concentration of n-GaN is 4 x 10(17) cm(-3), resulting in a lower reverse breakdown of around -12 V. The interface state density (N-SS) as a function of E-C-E-SS is found to be in the range 4.23 x 10(12)-3.87 x 10(11) eV(-1) cm(-2) (below the conduction band) from Ec-0.90 to E-C-0.99. Possible reasons responsible for the low barrier height and high ideality factor have been addressed.
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| 46. |
- Muniza Faraz, Sadia, et al.
(författare)
-
Modeling and simulations of Pd/n-ZnO Schottky diode and its comparison with measurements
- 2009
-
Ingår i: Advanced Materials Research. - 1662-8985. ; 79-82, s. 1317-1320
-
Tidskriftsartikel (refereegranskat)abstract
- Modeling of Pd/ZnO Schottky diode has been performed together with a set of simulations to investigate its behavior in current-voltage characteristics. The diode was first fabricated and then the simulations were performed to match the IV curves to investigate the possible defects and their states in the bandgap. The doping concentration measured by capacitancevoltage is 3.4 x 1017 cm-3. The Schottky diode is simulated at room temperature and the effective barrier height is determined from current voltage characteristics both by measurements and simulations and it was found to be 0.68eV. The ideality factor obtained from simulated results is 1.06-2.04 which indicates that the transport mechanism is thermionic. It was found that the recombination current in the depletion region is responsible for deviation of experimental values from the ideal thermionic model deployed by the simulator.
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| 47. |
- Muniza Faraz, Sadia
(författare)
-
Physical simulation, fabrication and characterization of Wide bandgap semiconductor devices
- 2011
-
Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Wide band gap semiconductors, Zinc Oxide (ZnO), Gallium Nitride (GaN) and Silicon Carbide (SiC) have been emerged to be the most promising semiconductors for future applications in electronic, optoelectronic and power devices. They offer incredible advantages in terms of their optical properties, DC and microwave frequencies power handling capability, piezoelectric properties in building electromechanical coupled sensors and transducers, biosensors and bright light emission. For producing high quality devices, thermal treatment always plays an important role in improving material structural quality which results in improved electrical and optical properties. Similarly good quality of metal–semiconductor interface, sensitive to the semiconductor surface, is always required.In this thesis we report the study of the interface states density for Pd/Ti/Au Schottky contacts on the free-standing GaN and post fabrication annealing effects on the electrical and optical properties of ZnO/Si hetero-junction diodes. The determination of interface states density (NSS) distribution within the band gap would help in understanding the processes dominating the electrical behavior of the metal–semiconductor contacts. The study of annealing effects on photoluminescence, rectification and ideality factor of ZnO/Si hetero-junction diodes are helpful for optimization and realization to build up the confidence to commercialize devices for lightening. A comparison of device performance between the physical simulations and measured device characteristics has also been carried out for pd/ZnO Schottky diode to understand the behavior of the devices.This research work not only teaches the effective way of device fabrication, but also obtains some beneficial results in aspects of their optical and electrical properties, which builds theoretical and experimental foundation for much better and broader applications of wide band gap semiconductor devices.
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| 48. |
- Noor, Hadia, et al.
(författare)
-
Influence of background concentration induced field on the emission rate signatures of an electron trap in zinc oxide Schottky devices
- 2010
-
Ingår i: JOURNAL OF APPLIED PHYSICS. - : American Institute of Physics. - 0021-8979 .- 1089-7550. ; 107:10
-
Tidskriftsartikel (refereegranskat)abstract
- Various well-known research groups have reported points defects in bulk zinc oxide (ZnO) [ND (intrinsic): 1014–1017cm−3] naming oxygen vacancy, zinc interstitial, and/or zinc antisite having activation energy in the range of 0.32–0.22 eV below conduction band. The attribution is probably based on activation energy of the level which seems not to be plausible in accordance with Vincent et al., [J. Appl. Phys. 50, 5484 (1979)] who suggested that it was necessary to become vigilant before interpreting the data attained for a carrier trap using capacitance transient measurement of diodes having ND greater than 1015cm−3. Accordingly the influence of background free-carrier concentration, ND induced field on the emission rate signatures of an electron point defect in ZnO Schottky devices has been investigated by means of deep level transient spectroscopy. A number of theoretical models were tried to correlate with the experimental data to ascertain the mechanism. Consequently Poole–Frenkel model based on Coulomb potential was found consistent. Based on these investigations the electron trap was attributed to Zn-related charged impurity. Qualitative measurements like current-voltage and capacitance-voltage measurements were also performed to support the results.
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| 49. |
- Noor, Hadia, et al.
(författare)
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Time-delayed transformation of defects in zinc oxide layers grown along the zinc-face using a hydrothermal technique
- 2009
-
Ingår i: JOURNAL OF APPLIED PHYSICS. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 105:12, s. 123510-
-
Tidskriftsartikel (refereegranskat)abstract
- A study of deep level defects in a hydrothermally grown, intrinsically n-type zinc oxide (ZnO) device has been carried out using conventional deep level transient spectroscopy (DLTS). Performed under variable measurement conditions, DLTS demonstrates two electron trap levels, E-1 (dominant) and E-2, with activation energies E-c-0.22 +/- 0.02 eV and E-c-0.47 +/- 0.05 eV, respectively. A time-delayed transformation of shallow donor defects zinc(interstitial) and vacancy(oxygen) (Zn-i-VO) into the E-1 level has been observed. While the x-ray diffraction measurements reveal that the preferred direction of ZnO growth is along the (10 (1) over bar0) plane, i.e., the (Zn-i-V-O) complex, it is assumed that the (Zn-i-V-O) complex is transformed into a zinc antisite (Zn-O) under favorable conditions. As a result, the free carrier concentration decreases with increasing trap concentration. Henceforth, the E-1 level exhibiting the increase in concentration is attributed to ZnO.
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| 50. |
- Paskova, Tanja, 1961-, et al.
(författare)
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Characterization of mass-transport grown GaN by hydride vapour-phase epitaxy
- 2004
-
Ingår i: Journal of Crystal Growth. - : Elsevier BV. - 0022-0248 .- 1873-5002. ; 273:1-2, s. 118-128
-
Tidskriftsartikel (refereegranskat)abstract
- A comprehensive study of the morphological, optical and microstructural properties of mass-transport (MT) and conventionally grown GaN by hydride vapour-phase epitaxy is presented. Spatially resolved techniques have been utilized to reveal in a comparative way, the characteristics of the material grown either in predominant vertical or lateral growth modes. A strong donor-acceptor pair (DAP) emission is observed from the MT regions with a distinctive intensity contrast between the exciton and DAP emission bands from MT and nontransport regions. Secondary ion mass spectroscopy and imaging were employed to investigate the impurity incorporation into different regions. An increase of residual oxygen and aluminium impurity concentrations was found in the MT areas. In addition, positron annihilation spectroscopy showed a strong signal of Ga vacancy clusters in the MT grown material. The increase of the point defect concentrations of both Ga vacancy and oxygen impurity, most likely forming defect complexes, is related to the enhancement of the DAP emission.
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