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Numrering	Referens	Omslagsbild	Hitta
1.	Garcia, Julian, et al. (författare) On Continuous-Time Incremental Sigma Delta ADCs With Extended Range 2013 Ingår i: IEEE Transactions on Instrumentation and Measurement. - 0018-9456 .- 1557-9662. ; 62:1, s. 60-70 Tidskriftsartikel (refereegranskat)abstract In this paper, the use of continuous-time implementation in extended-range (ER) incremental sigma-delta analog-to-digital converters is analyzed in order to explore a possible solution to low-power multichannel applications. The operation principle, possible loop filter topologies, and critical issues are considered using a general approach. It is demonstrated that, in order to fully benefit from ER, careful attention has to be paid to the analog-digital transfer function mismatches. A third-order single-bit topology validates the theoretical analysis. Its performance is evaluated while the impact of key circuit nonidealities is quantified through behavioral-level simulations. It is shown that, by applying analog-digital mismatch compensation in the digital domain, it is possible to relax the amplifiers' finite gain-bandwidth product and finite dc gain requirements, thus allowing a power-conscious alternative.

Garcia, Julian, et al. (författare)
On Continuous-Time Incremental Sigma Delta ADCs With Extended Range
2013
Ingår i: IEEE Transactions on Instrumentation and Measurement. - 0018-9456 .- 1557-9662. ; 62:1, s. 60-70
Tidskriftsartikel (refereegranskat)abstract
- In this paper, the use of continuous-time implementation in extended-range (ER) incremental sigma-delta analog-to-digital converters is analyzed in order to explore a possible solution to low-power multichannel applications. The operation principle, possible loop filter topologies, and critical issues are considered using a general approach. It is demonstrated that, in order to fully benefit from ER, careful attention has to be paid to the analog-digital transfer function mismatches. A third-order single-bit topology validates the theoretical analysis. Its performance is evaluated while the impact of key circuit nonidealities is quantified through behavioral-level simulations. It is shown that, by applying analog-digital mismatch compensation in the digital domain, it is possible to relax the amplifiers' finite gain-bandwidth product and finite dc gain requirements, thus allowing a power-conscious alternative.

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