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- Abd El Ghany, M. A., et al.
(författare)
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High throughput architecture for high performance NoC
- 2009
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Ingår i: ISCAS. - : IEEE. - 9781424438280 ; , s. 2241-2244
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Konferensbidrag (refereegranskat)abstract
- High Throughput Butterfly Fat Tree (HTBFT) architecture to achieve high performance Networks on Chip (NoC) is proposed. The architecture increases the throughput of the network by 38% while preserving the average latency. The area of HTBFT switch is decreased by 18% as compared to Butterfly Fat Tree switch. The total metal resources required to implement HTBFT design is increased by 5% as compared to the total metal resources required to implement BFT design. The extra power consumption required to achieve the proposed architecture is 3% of the total power consumption of the BFT architecture.
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