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  • Pamunuwa, D., et al. (author)
  • Modelling noise and delay in VLSI circuits
  • 2003
  • In: Electronics Letters. - : Institution of Engineering and Technology (IET). - 0013-5194 .- 1350-911X. ; 39:3, s. 269-271
  • Journal article (peer-reviewed)abstract
    • New models for estimating delay and noise in VLSI circuits, based on closed form expressions for the first and second moment of the impulse response in coupled RC trees are reported. The effect of crosstalk on delay and noise can be accurately estimated with a complexity only marginally higher than the Elmore delay.
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Type of publication
journal article (1)
Type of content
peer-reviewed (1)
Author/Editor
Tenhunen, Hannu (1)
Pamunuwa, D. (1)
Elassaad, S. (1)
University
Royal Institute of Technology (1)
Language
English (1)
Year
2003 (1)

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