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  • Kanders, Hans, et al. (author)
  • A 1 Million-Point FFT on a Single FPGA
  • 2019
  • In: IEEE Transactions on Circuits and Systems Part 1. - : IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. - 1549-8328 .- 1558-0806. ; 66:10, s. 3863-3873
  • Journal article (peer-reviewed)abstract
    • In this paper, we present the first implementation of a 1 million-point fast Fourier transform (FFT) completely integrated on a single field-programmable gate array (FPGA), without the need for external memory or multiple interconnected FPGAs. The proposed architecture is a pipelined single-delay feedback (SDF) FFT. The architecture includes a specifically designed 1 million-point rotator with high accuracy and a thorough study of the word length at the different FFT stages in order to increase the signal-to-quantization-noise ratio (SQNR) and keep the area low. This also results in low power consumption.
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Type of publication
journal article (1)
Type of content
peer-reviewed (1)
Author/Editor
Gustafsson, Oscar (1)
Garrido Gálvez, Mari ... (1)
Palmkvist, Kent (1)
Kanders, Hans (1)
Mellqvist, Tobias (1)
University
Linköping University (1)
Language
English (1)
Research subject (UKÄ/SCB)
Engineering and Technology (1)
Year
2019 (1)

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