| 11. |
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| 12. |
- Oelmann, Bengt, et al.
(author)
-
All-Digital Window Discriminator for Photon Counting Pixel Detectors
- 2001
-
In: Electronics Letters. - : Institution of Engineering and Technology (IET). - 0013-5194. ; 37:6, s. 373-374
-
Journal article (peer-reviewed)abstract
- An all-digital window discriminator is presented. It is event-driven and does not rely on any external or internal timing references. In addition, it provides an area-efficient implementation of photon counting pixel detectors. The transistor-level implementation of the circuit is presented with its circuit area and timing performance.
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| 13. |
- Oelmann, Bengt, et al.
(author)
-
Automatic FSM synthesis for low-power mixed synchronous/asynchronous implementation
- 2001
-
In: VLSI design (Print). - 1065-514X .- 1563-5171. ; 12:2, s. 167-186
-
Journal article (peer-reviewed)abstract
- Power consumption in a synchronous FSM (Finite-State Machine) can be reduced by partitioning it into a number of coupled sub-FSMs where only the part that is involved in a state transition is clocked. Automatic synthesis of a partitioned FSM includes a partitioning algorithm and sub-FSM synthesis to an implementation architecture. In this paper, we first introduce an implementation architecture for partitioned FSMs that uses gated-clock technique for disabling idle parts of the circuits and asynchronous controllers for communication between the sub-FSMs. We then describe a new transformation procedure for the sub-FSM. The FSM synthesis flow has been automated in a prototype tool that accepts an FSM specification. The tool generates RT-level VHDL code with identical cycle-to-cycle input/output behaviour in accordance to with the specification. An average power reduction of 45% has been obtained for a set standard FSM benchmarks.
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| 14. |
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| 15. |
- Oelmann, Bengt, et al.
(author)
-
Robust window discriminator for photon-counting pixel detectors
- 2002
-
In: IEE Proceedings - Optoelectronics. - : Institution of Engineering and Technology (IET). - 1350-2433 .- 1359-7078. ; 149:2, s. 65-69
-
Journal article (peer-reviewed)abstract
- The paper proposes a robust and area-efficient way of designing window discriminators for photon-counting pixel detectors. For that, an all-digital window discriminator is proposed. It is event-driven and does not rely on any external or internal timing references, which makes it possible to use it over a wide range of specifications. In addition, it provides an overall area efficient implementation of the digital electronics in photon-counting pixel detectors. The transistor-level implementation of the circuit is presented with its circuit area and timing performance.
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| 16. |
- O'Nils, Mattias, et al.
(author)
-
A Comparison between Local and Global Memory Allocation for FPGA Implementation of Real-Time Video Processing Systems
- 2004
-
In: Proceedings of the IEEE International Conference on Signals and Electronic Systems.
-
Conference paper (peer-reviewed)abstract
- This paper presents a comparison of local and global memory allocation for implementation of real-time video processing systems on FPGAs. The paper compares new methods to perform memory allocation using single and dual port block RAMs to memory allocation methods found in the literature. This investigation shows that the use of global allocation can reduce the memory size by up to 75 % for the two presented video processing systems.
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| 17. |
- O’Nils, Mattias, et al.
(author)
-
Device driver and DMA controller synthesis from HW /SW communication protocol specifications
- 2001
-
In: Design automation for embedded systems. - : Kluwer Academic Publishers. - 0929-5585 .- 1572-8080. ; 6:2, s. 177-205
-
Journal article (peer-reviewed)abstract
- We have separated the information required for HW /SW interface synthesis into three parts, the protocol specification, the operating system related information, and the processor related information. From these inputs a synthesis tool generates (a) device driver functions or (b) a combination of device driver functions and a DMA controller, depending on a designer’s decision. The clean separation of information facilitates (1) efficient design space exploration with combinations of different processors, operating systems and protocols, and (2) maintaining a large number of different versions and variants of HW /SW interfaces by synthesising them on demand. Protocols are specified as a grammar, which is fully independent of architecture and implementation. From this the synthesis tool generates device driver code in C and /or synthesizable RTL code in VHDL for DMA controllers. After the initial selection of implementation alternatives the presented methods are fully automated. Its computational complexity is quadratic in terms of the number of states. With real-life examples we show that the quality of the generated code is close to hand written quality in terms of performance, area and code size.
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| 18. |
- O'Nils, Mattias, et al.
(author)
-
Low Digital Interference Counter for Photon Counting Pixel Detectors
- 2002
-
In: Nuclear Instruments and Methods in Physics Research, Section A. - 0168-9002. ; 487:3, s. 323-330
-
Journal article (peer-reviewed)abstract
- Single photon-counting pixel sensors are widely used in radiation imaging because of their energy resolving capability and high dynamic range. However, the close integration of the analog and digital circuits in the small pixel area puts critical constraints on the mixed mode circuit design. This includes the design considerations regarding the noise injection from the digital circuits into the analog part due to the digital switching. In addition, the large number of components requires a pixel circuit with low power consumption. In this paper, we address these two design constraints. An event counter architecture that decreases the digital switching and power consumption in a pixel is presented. The counter has the same dynamic range for capturing events and hardware cost as the conventionally used counters. We present design rules for adopting the counter architecture to a certain application. These rules enable the trade-off between readout accuracy from the pixel vs. the current in the digital parts of the pixel. Simulation of a case study circuit shows a reduction of digital activity by a factor seven, and a significant reduction of power consumption.
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| 19. |
- O'Nils, Mattias
(author)
-
SystemC blir EDA-världens Linux
- 2003
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In: Elektronik i Norden. - 1103-2944. ; :7, s. 26-28
-
Journal article (other academic/artistic)abstract
- Sedan syntes började ersätta schemainmatning i slutet av 80-talet, har Verilog och VHDL dominerat marknaden för digitala hårdvarubeskrivande språk. I slutet av 90-talet fick både Verilog och VHDL tillägg för att modellera analoga och mixed-signal-funktioner. Båda språken har sina för- och nackdelar och man kan fråga sig om någon av dessa nackdelar motiverar ett nytt hårvarubeskrivande språk? Svaret på den frågan kommer antagligen att bli nej. Något egentligt behov av ett nytt hårdvarubeskrivande språk finns inte, men däremot ett stort behov av ett språk som stöder systemkonstruktion, SystemC.
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| 20. |
- O'Nils, Mattias, et al.
(author)
-
Using CoWare in a Course on Design of Embedded HW/SW System
- 2000
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In: Proceedings of the 18th IEEE Norchip Conference.
-
Conference paper (peer-reviewed)abstract
- This paper presents an evaluation of using the hardware/software codesign tool CoWare in education. We present experiences from using CoWare in a course on hardware/software codesign of embedded systems, mainly targeting system on a chip (SoC). CoWare N2C is a system design CAD tool for hardware/software codesign, i.e. the design of hardware and software in an integrated design flow. CoWare supports the incremental design refinement, cost and performance estimation, and interface synthesis. This increases the productivity for designer (student) that can concentrate on system description, hardware/software partitioning etc.
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