| 1. |
- A. M. Naiini, Maziar, 1980-
(författare)
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Horizontal Slot Waveguides for Silicon Photonics Back-End Integration
- 2014
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- This thesis presents the development of integrated silicon photonic devices. These devices are compatible with the present and near future CMOS technology. High-khorizontal grating couplers and waveguides are proposed. This work consists of simulations and device design, as well as the layout for the fabrication process, device fabrication, process development, characterization instrument development and electro-optical characterizations.The work demonstrates an alternative solution to costly silicon-on-insulator photonics. The proposed solution uses bulk silicon wafers and thin film deposited waveguides. Back-end deposited horizontal slot grating couplers and waveguides are realized by multi-layers of amorphous silicon and high-k materials.The achievements of this work include: A theoretical study of fully etched slot grating couplers with Al2O3, HfO2 and AIN, an optical study of the high-k films with spectroscopic ellipsometry, an experimental demonstration of fully etched SiO2 single slot grating couplers and double slot Al2O3 grating couplers, a practical demonstration of horizontal double slot high-k waveguides, partially etched Al2O3 single slot grating couplers, a study of a scheme for integration of the double slot Al2O3 waveguides with selectively grown germanium PIN photodetectors, realization of test chips for the integrated germanium photodetectors, and study of integration with graphene photodetectors through embedding the graphene into a high-k slot layer.From an application point of view, these high-k slot waveguides add more functionality to the current silicon photonics. The presented devices can be used for low cost photonics applications. Also alternative optical materials can be used in the context of this photonics platform.With the robust design, the grating couplers result in improved yield and a more cost effective solution is realized for integration of the waveguides with the germanium and graphene photodetectors.
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| 2. |
- Chen, Tingsu
(författare)
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CMOS High Frequency Circuits for Spin Torque Oscillator Technology
- 2014
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Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Spin torque oscillator (STO) technology has a unique blend of features, including but not limited to octave tunability, GHz operating frequency, and nanoscaled size, which makes it highly suitable for microwave and radar applications. This thesis studies the fundamentals of STOs, utilizes the state-of-art STO's advantages, and proposes two STO-based microwave systems targeting its microwave applications and measurement setup, respectively.First, based on an investigation of possible STO applications, the magnetic tunnel junction (MTJ) STO shows a great suitability for microwave oscillator in multi-standard multi-band radios. Yet, it also imposes a large challenge due to its low output power, which limits it from being used as a microwave oscillator. In this regard, different power enhancement approaches are investigated to achieve an MTJ STO-based microwave oscillator. The only possible approach is to use a dedicated CMOS wideband amplifier to boost the output power of the MTJ STO. The dedicated wideband amplifier, containing a novel Balun-LNA, an amplification stage and an output buffer, is proposed, analyzed, implemented, measured and used to achieve the MTJ STO-based microwave oscillator. The proposed amplifier core consumes 25.44 mW from a 1.2 V power supply and occupies an area of 0.16 mm2 in a 65 nm CMOS process. The measurement results show a S21 of 35 dB, maximum NF of 5 dB, bandwidth of 2 GHz - 7 GHz. This performance, as well as the measurement results of the proposed MTJ STO-based microwave oscillator, show that this microwave oscillator has a highly-tunable range and is able to drive a PLL.The second aspect of this thesis, firstly identifies the major difficulties in measuring the giant magnetoresistance (GMR) STO, and hence studying its dynamic properties. Thereafter, the system architecture of a reliable GMR STO measurement setup, which integrates the GMR STO with a dedicated CMOS high frequency IC to overcome these difficulties in precise characterization of GMR STOs, is proposed. An analysis of integration methods is given and the integration method based on wire bonding is evaluated and employed, as a first integration attempt of STO and CMOS technologies. Moreover, a dedicated high frequency CMOS IC, which is composed of a dedicated on-chip bias-tee, ESD diodes, input and output networks, and an amplification stage for amplifying the weak signal generated by the GMR STO, is proposed, analyzed, developed, implemented and measured. The proposed dedicated high frequency circuits for GMR STO consumes 14.3 mW from a 1.2 V power supply and takes a total area of 0.329 mm2 in a 65 nm CMOS process. The proposed on-chip bias-tee presents a maximum measured S12 of -20 dB and a current handling of about 25 mA. Additionally, the proposed dedicated IC gives a measured gain of 13 dB with a bandwidth of 12.5 GHz - 14.5 GHz. The first attempt to measure the (GMR STO+IC) pair presents no RF signal at the output. The possible cause and other identified issues are given.
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| 3. |
- Dentoni Litta, Eugenio, 1986-
(författare)
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Integration of thulium silicate for enhanced scalability of high-k/metal gate CMOS technology
- 2014
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- High-k/metal gate stacks have been introduced in CMOS technology during the last decade in order to sustain continued device scaling and ever-improving circuit performance. Starting from the 45 nm technology node, the stringent requirements in terms of equivalent oxide thickness and gate current density have rendered the replacement of the conventional SiON/poly-Si stack unavoidable. Although Hf-based technology has become the de facto industry standard for high-k/metal gate MOSFETs, problematic long-term scalability has motivated the research of novel materials and solutions to fulfill the target performances expected of gate stacks in future technology nodes.In this work, integration of a high-k interfacial layer has been identified as the most promising approach to improve gate dielectric scalability, since this technology presents the advantage of potential compatibility with both current Hf-based and plausible future higher-k materials. Thulium silicate has been selected as candidate material for integration as interfacial layer, thanks to its unique properties which enabled the development of a straightforward integration process achieving well-controlled and repeatable growth in the sub-nm thickness regime, a contribution of 0.25+-0.15 nm to the total EOT, and high quality of the interface with Si.Compatibility with industry-standard CMOS integration flows has been kept as a top priority in the development of the new technology. To this aim, a novel ALD process has been developed and characterized, and a manufacturable process flow for integration of thulium silicate in a generic gate stack has been designed. The thulium silicate interfacial layer technology has been verified to be compatible with standard integration flows, and fabrication of high-k/metal gate MOSFETs with excellent electrical characteristics has been demonstrated.The possibility to achieve high performance devices by integration of thulium silicate in current Hf-based technology has been specifically demonstrated, and the TmSiO/HfO2 dielectric stack has been shown to be compatible with the industrial requirements of operation in the sub-nm EOT range (down to 0.6 nm), reliable device operation over a 10 year expected lifetime, and compatibility with common threshold voltage control techniques. The thulium silicate interfacial layer technology has been especially demonstrated to be superior to conventional chemical oxidation in terms of channel mobility at sub-nm EOT, since the TmSiO/HfO2 dielectric stack achieved ~20% higher electron and hole mobility compared to state-of-the-art SiOx/HfO2 devices at the same EOT. Such performance enhancement can provide a strong advantage in the EOT-mobility trade-off which is commonly observed in scaled gate stacks, and has been linked by temperature and stress analyses to the higher physical thickness of the high-k interfacial layer, which results in attenuated remote phonon scattering compared to a SiOx interfacial layer achieving the same EOT.
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| 4. |
- Kataria, Himanshu, 1983-
(författare)
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High Quality III-V Semiconductors/Si Heterostructures for Photonic Integration and Photovoltaic Applications
- 2014
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- This thesis deals with one of the promising strategies to monolithically integrate III-V semiconductors with silicon via epitaxial lateral overgrowth (ELOG) technology and is supported by extensive experimental results. The aimed applications are light sources on silicon for electronics-photonics integration and cost effective high efficiency multijunction solar cells.The work focusses on the growth of III-V semiconductors consisting of indium phosphide (InP) and its related alloys on silicon primarily because of the bandgaps that these offer for the aimed applications. For this purpose, we make use of the epitaxial growth technique called hydride vapour phase epitaxy and exploit its near equilibrium operation capability to achieve primarily ELOG of high quality InP as the starting material on patterned InP(seed)/silicon wafer. The InP/InGaAsP layers are grown by metal organic vapour phase epitaxy.Different pattern designs are investigated to achieve high quality InP over a large area of silicon by ELOG to realise lasers. First, nano patterns designed to take advantage of aspect ratio trapping of defects are investigated. Despite substantial defect filtering insufficient growth area is achieved. To achieve a larger area, coalescence from multiple nano openings is used. Shallowly etched InP/InGaAsP based microdisk resonators fabricated on indium phosphide on silicon achieved by this method have shown whispering gallery modes. However, no lasing action is observed partly due to the formation of new defects at the points of coalescence and partly due to leakage losses due to shallow etching. To overcome these limitations, a new design mimicking the futuristic monolithic evanescently coupled laser design supporting an efficient mode coupling and athermal operation is adopted to yield large areas of ELOG InP/Si having good carrier transport and optical properties. Microdisk resonators fabricated from the uniformly obtained InP/InGaAsP structures on the ELOG InP layers have shown very strong spontaneous luminescence close to lasing action. This is observed for the first time in InP/InGaAsP laser structures grown on ELOG InP on silicon.A newly modified ELOG approach called Corrugated ELOG is also developed. Transmission electron microscopy analyses show the formation of abrupt interface between InP and silicon. Electrical measurements have supported the linear Ohmic behaviour of the above junction. This proof of concept can be applied to even other III-V compound solar cells on silicon. This allows only thin layers of expensive III-V semiconductors and cheap silicon as separate subcells for fabricating next generation multijunction solar cells with enhanced efficiencies at low cost. A feasible device structure of such a solar cell is presented. The generic nature of this technique also makes it suitable for integration of III-V light sources with silicon and one such design is proposed.
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| 5. |
- Lanni, Luigia, 1985-
(författare)
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Silicon Carbide BipolarTechnology for High Temperature Integrated Circuits
- 2014
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- The availability of integrated circuits (ICs) capable of 500 or 600° C operation can be extremely beneficial for many important applications, such as transportation and energy sector industry. It can in fact enable the realization of improved sensing and control of turbine engine combustion leading to better fuel efficiency and reduced pollution. In addition, the possibility of placing integrated circuits in engine hot-sections can significantly reduce the weight and improve the reliability of automobiles and aircrafts, eliminating extra wires and cooling systems.In order to develop such electronics semiconductors with superior high temperature characteristics compared to Si are required. Thanks to its wide bandgap, almost three times that of Si, Silicon carbide (SiC) has been suggested for this purpose. Its low intrinsic carrier concentration, orders of magnitude lower than that of Si, makes SiC devices capable of operating at much higher temperatures than Si devices.In this thesis solutions for 600° C SiC bipolar ICs have been investigated in depth at device physics, circuit and process integration level. Successful operation of devices and circuits has been proven from -40 up to 600° C.The developed technology features NPN and lateral PNP transistors, two levels of interconnects and one extra metal level acting as over-layer metallization for device contacts. The improved SiC etching and passivation procedures have provided NPN transistors with high current gain of approximately 200. Furthermore, non-monotonous current gain temperature dependences have been observed for NPN and PNP transistors. The current gain of NPN transistors increases with temperature at high enough temperatures above 300° C depending on the base doping concentration. The current gain of lateral PNP transistors has, instead, shown a maximum of approximately 37 around 0° C.Finally, high-temperature operation of 2-input ECL-based OR-NOR gates and 3- and 11-stage ring oscillators has been demonstrated. For the OR-NOR gates stable noise margins of approximately 1 or 1.5 V, depending on the gate design, have been observed up to 600° C with a delay-power consumption product of approximately 100 nJ in the range -40 to 500° C. Ring oscillators with different designs, including more than 100 devices, have been successfully tested in the range 27 to 300° C. Non-monotonous and almost constant temperature dependences have been observed for the oscillation frequency of 3- and 11-stage ring oscillator, respectively. In addition, room temperature propagation delays of a single inverter stage have been estimated to be approximately 100 and 40 ns for 3- and 11-stage ring oscillators, respectively.
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| 6. |
- Metaferia, Wondwosen Tilahun
(författare)
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New Methods in the growth of InP on Si and Regrowth of Semi-insulating InP for Photonic Devices
- 2014
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- This thesis addresses new methods in the growth of indium phosphide on silicon for enabling silicon photonics and nano photonics as well as efficient and cost-effective solar cells. It also addresses the renewal of regrowth of semi-insulating indium phosphide for realizing buried heterostructure quantum cascade lasers with high power and wall plug efficiency for sensing applications.As regards indium phosphide on silicon, both crystalline and polycrystalline growth methods are investigated. The crystalline growth methods are: (i) epitaxial lateral overgrowth to realize large area InP on Si, for silicon photonics (ii) a modified epitaxial lateral overgrowth method, called corrugated epitaxial lateral overgrowth, to obtain indium phosphide/silicon heterointerface for efficient and cost effective solar cells and (iii) selective growth of nanopyramidal frusta on silicon for nanophotonics. The polycrystalline growth method on silicon for low cost solar cell fabrication has been realized via (i) phosphidisation of indium oxide coating synthesized from solution chemistry and (ii) phosphidisation cum growth on indium metal on silicon. All our studies involve growth, growth analysis and characterization of all the above crystalline and polycrystalline layers and structures.After taking into account the identified defect filtering mechanisms, we have implemented means of obtaining good optical quality crystalline layers and structures in our epitaxial growth methods. We have also identified feasible causes for the persistence of certain defects such as stacking faults. The novel methods of realizing indium phosphide/silicon heterointerface and nanopyramidal frusta of indium phosphide on silicon are particularly attractive for several applications other than the ones mentioned here.Both the polycrystalline indium phosphide growth methods result in good optical quality material on silicon. The indium assisted phosphidisation cum growth method normally results in larger grain size indium phosphide than the one involving phosphidisation of indium oxide. These two methods are generic and can be optimized for low cost solar cells of InP on any flexible substrate.The method of regrowth of semi-insulating indium phosphide that is routinely practiced in the fabrication of buried heterostructure telecom laser has been implemented for quantum cascade lasers. The etched ridges of the latter can be 6-15 µm deep, which is more than 2-3 times as those of the former. Although this is a difficult task, through our quick and flexible regrowth method we have demonstrated buried heterostructure quantum cascade lasers with an output power up to 2. 5 W and wall plug efficiency up to 9% under continuous operation.
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| 7. |
- Sanatinia, Reza
(författare)
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Ensemble and Individual III-V Semiconductor Nanopillars: Optical Properties and Applications
- 2014
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Optical properties of semiconductor nanowires (NWs)/nanopillars (NPs), as individual or ensemble, have attracted significant research interest in recent years. Their potential applications range from solid-state lighting, photovoltaics, lasing and nonlinear optics to sensing and life sciences. Many of III-V NWs/NPs are particularly interesting for optoelectronic and photovoltaic applications, because of their direct band gap, high refractive index and superior electrical properties. These properties are beneficial for use in next generation solar cells by reducing the active cell thickness, while maintaining high efficiency. Furthermore, high second order nonlinearity coefficients of many III-V materials, for example GaAs and GaP, enhanced electric fields and tight confinement of optical modes make nanowaveguide geometries ideal for nonlinear effects.The focus of this thesis is on the fabrication of III-V NPs, their optical properties and applications. Different methods for fabrication of NPs (top-down approach) are proposed. The fabricated NPs show a broadband suppression of reflectance, which is particularly an interesting feature for photovoltaic applications. The effect of the shape and geometry of GaAs NPs on their reflectance spectra is investigated and the experimental data show a very good agreement with the simulations. In order to decrease surface recombination in the fabricated GaAs NPs, a sulfur-based chemical passivation method was used, resulting in the recovery of photoluminescence (PL) linewidth and enhancing the PL intensity for more than an order of magnitude. Moreover, a unique wafer-scale self-organization process for generation of InP NPs is demonstrated. As a proof of concept, the self-organized InP NPs were used to fabricate solar cell devices. For fabrication of InP NP solar cells, epitaxial overgrowth of NPs arrays was used to realize p-n junctions. A significant increase in the open circuit voltage (0.13 V) of the NP solar cell was obtained after surface passivation.Second-harmonic generation (SHG) was experimentally observed from GaP NP waveguides (single and in arrays) with vertical geometry. The generated second- harmonic light was analyzed with respect to the size of the NP waveguides and the corresponding effects of surface and bulk nonlinearities. In case of individual NPs, SHG was analyzed considering different modal excitations in GaP NPs. It was demonstrated that by varying the NP diameter and changing the pump polarization, it is possible to alter the field distribution of the radiated SHG light. The importance of tight confinement of the pump in the NP waveguides and consequently the longitudinal component of the electric field in this geometry is shown. A method was proposed to distinguish between surface and bulk contributions in SHG, which also addressed how to employ surface SHG to enhance the generated light. The proposed method was used to estimate the nonlinear coefficient and the effective thickness of the nonlinear region at the surface of GaP NP waveguides. Based on these findings, the corresponding nonlinear coefficient at the surface is estimated to be approximately 15 times higher, compared to the bulk. These findings, suggest that NPs/NWs (in this case GaP NPs) are potential alternatives for future nonlinear nanophotonic devices. Additionally, the SHG light from single GaP NPs are promising candidates for ultrafast light sources at nanoscopic scale, with potential applications in sensing, bio and single cell/ molecular imaging.
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| 8. |
- Smedfors, Katarina
(författare)
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Ohmic Contacts for High Temperature Integrated Circuits in Silicon Carbide
- 2014
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Licentiatavhandling (övrigt vetenskapligt/konstnärligt)abstract
- In electrical devices and integrated circuits, ohmic contacts are necessary and a prerequisite for the current transport over the metal-semiconductor junctions. At the same time, a desired property of the ohmic contacts is to not add resistance or in other way disturb the performance. For high temperature electronics, the material demands are high regarding functionality and stability at elevated working temperatures, during and after temperature cycling and during long time of use. Silicon carbide, SiC, is a suitable substrate material for fabrication of high temperature electronics with a large band gap, good thermal conductivity and chemical inertness. The large bandgap causes however difficulties in finding a common material for ohmic contacts to both n- and p-type SiC. The goal of this project is to find a suitable metallization for n- as well as p-type contacts to epitaxially doped SiC for use in integrated circuits. The circuit technology developed and used in KTH for SiC is built on bipolar junction transistors. The p-doped base layer in the transistors is relatively low doped; 5 x 1017 – 1 x 1018 cm-3. P-type SiC is more difficult to form ohmic contacts to than n-type SiC, with such a low doping concentration it is even more complicated. Today, the metallizations used in the contacts consists of Ni for n-type contacts and Ni/Ti/Al to p-type SiC. Experiments of the specific contact resistivity ρc and the sheet resistance Rsh of these contacts, characterized to two types of samples, are presented for the extreme temperature range of -40 °C – 500 °C. Ohmic contact test chips with transfer length method structures have been compared to similar test structures on samples from the KTH SiC integrated circuits. The metals were also tested on the opposite doping polarity. Sputter deposition of Co and Si in layers to form CoSi2 contacts was made to chips from the same contact test wafer for comparison with the behavior of the presently used contacts. Since this was a new metallization, the process development of the high temperature anneal and contact formation made an important part of the work. Out of the tested contacts, Ni has been the best for n-SiC and Ni/Ti/Al for p-SiC. None of the three metallizations formed ohmic contacts to both n- and p-SiC. However, the CoSi2 contacts showed specific contact resistivity ρc <4 x 10-6 Ωcm2 at 25 °C and non-linear I-V characteristics but without barriers to p-SiC after voltage sweeps of ± 75V.
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| 9. |
- Wahlberg, Sverker
(författare)
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Tungsten-Based Nanocomposites by Chemical Methods
- 2014
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Tungsten based-materials find use in many different fields of engineering, particularly in applications where good temperature and/or erosion resistance is important. Nanostructuring of tungsten composites is expected to dramatically improve the materials’ properties and enhancing the performance in present applications but also enabling totally new possibilities. Nanostructured WC-Co materials have been the focus of researchers and engineers for over two decades. New fabrication methods have been developed. But, the fabrication of true nanograined WC-Co composites is still a challenge. Nanostructured tungsten-based materials for applications as plasma facing materials in fusion reactors have attracted a growing interest. This Thesis summarizes work on the development of chemical methods for the fabrication of two different types of nanostructured tungsten-based materials; WC-Co composites mainly for cutting tools applications and W-ODS materials with yttria particles, intended as plasma facing materials in fusion reactors. The approach has been to prepare powders in two steps: a) synthesis of uniform powder precursors containing ions of tungsten and cobalt or yttrium by precipitation from aqueous solutions and b) processing of the precursors into WC- or W-based nano-composite powders.Highly homogenous W- and Co- containing precursors for WC-Co composites were prepared via two different routes. Keggin-based precursors ((NH4)8[H2Co2W11O40]) were made from sodium tungstate or ammonium metatungstate and cobalt acetate. The powder composition corresponded to 5.2 % Co in the final WC-Co material. In a second approach, paratungstate-based precursors (Cox(NH4)10-2x[H2W12O42]) were prepared from ammonium paratungstate (APT) and cobalt hydroxide with different compositions corresponding to 3.7 to 9.7 % Co in WC-Co. Both precursors were processed and sintered into uniform microstructures with fine scale (<1μm). The processing of paratungstate-based precursors was also further investigated. WC-Co powders with grains size of less than 50 nm were obtained by decreasing processing temperatures and by applying gas phase carburization.W-ODS materials were fabricated starting from ammonium paratungstate and yttrium salts. Paratungstate-based precursors were prepared with different homogeneities and particle sizes. The degree of the chemical uniformity varied with the particle size from ca 1 to 30 μm. Tungsten trioxide hydrate-based precursors made from APT and yttrium salts under acidic conditions had higher uniformity and smaller particle size. The tungsten oxide crystallite size was decreased to a few nanometers. Yttrium was included either by doping or in a nanocomposite structure as yttrium oxalate. The nanocomposite precursor was found to be more reactive during hydrogen reduction, facilitating its conversion to pure W-Y2O3 nanopowder. The doped precursor were further processed to nanopowders and sintered to highly uniform W-1.2%Y2O3 composites.In summary, APT was converted to highly homogenous or uniform powder precursors ofdifferent compositions. The transformations were carried out in aqueous suspensions as a water-mediated process. These precursors were processed further in to nano-sized powders and sintered to highly uniform tungsten composites with fine microstructures.
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| 10. |
- Xiang, Yu
(författare)
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GaAs based Vertical-Cavity Surface-Emitting Transistor-Lasers
- 2014
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- The ever-increasing demand for broadband capacity of the global optical communication networks puts enormous requirements on the semiconductor laser used in the optical transmitter. Industrial standard bodies for optical communication project requirements of single-channel data rates as high as 100 Gbit/s around year 2020. This is a significant step with respect to today's technology which is only at the verge of introducing 25 Gbit/s emitters. The preferred light source for these applications is the vertical-cavity surface-emitting laser (VCSEL) which can offer cost- and power-efficient directly modulated operation. However, it has proven extremely difficult to push the modulation bandwidth of VCSELs beyond 30 GHz and radically new device concepts are demanded to meet the upcoming needs. One such new device paradigm consists of the transistor laser which is the fusion of a semiconductor laser and a high-speed heterojunction bipolar transistor (HBT) into a single device, with potential significant advantages in modulation bandwidth, noise properties and novel functionality by virtue of the three-terminal configuration. The present thesis deals with the design, fabrication and analysis of vertical-cavity surface-emitting transistor-lasers (T-VCSELs), a device previously not realized or investigated in great detail.GaAs-based T-VCSELs are investigated both theoretically and experimentally. A three-dimensional model is set up with a commercial software package and used for performance predictions and analysis as well as design and optimization purposes. It is concluded that a T-VCSEL biased in the common-base configuration may have a bandwidth surpassing those of conventional diode-type VCSELs or a T-VCSEL itself in the common-emitter configuration. Fabricated T-VCSELs make use of an epitaxial regrowth design to homogeneously integrate an AlGaAs/GaAs HBT and an InGaAs/GaAs VCSEL. An intracavity contacting scheme involving all three terminals, undoped distributed Bragg reflectors and modulation doping are used to ensure a low-loss laser structure. The first generation of devices showed sub-mA range base threshold current in combination with a high output power close to 2 mW but did not fulfill the requirements for a fully operational transistor laser since the transistor went into saturation before the onset of lasing (IBsat<IBth). From numerical simulations this premature saturation was demonstrated being due to a lateral potential variation within the device and large voltage drops along the base and collector regions. As a remedy to this problem the base region was redesigned for a reduced resistance and transistor current gain, and the saturation current could thereby be extended well beyond threshold. These devices showed excellent transistor-laser characteristics with clear gain-compression at threshold, mA-range base threshold current, mW-range output power, high-temperature operation to at least 60°C, low collector-emitter offset voltage and record-low power dissipation during lasing. Furthermore, the collector-current breakdown characteristics was investigated in some detail and it is concluded that this, in contrast to previous models, presumably not is due to an intracavity photon reabsorption process but rather to a quantum-well band-filling effect.
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