| 1. |
- Fornell, Anna, et al.
(författare)
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Optimisation of the droplet split design for high acoustic particle enrichment in droplet microfluidics
- 2020
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Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 226
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Tidskriftsartikel (refereegranskat)abstract
- We have characterised three droplet split designs for acoustic particle enrichment in water-in-oil droplets. The microfluidic channel design included a droplet generation junction, acoustic focusing channel and a trident-shaped droplet split. The microfluidic channels were dry-etched in silicon and sealed with glass lids by anodic bonding. To each microfluidic chip a piezoelectric transducer was glued, and at actuation of the transducer at the fundamental resonance frequency of the acoustic focusing channel (1.91–1.93 MHz), a half wavelength standing wave field was created between the channel walls. The acoustic force focused the encapsulated particles (3.2 μm, 4.8 μm and 9.9 μm diameter polystyrene microbeads) to the centre-line of the droplets, and when the droplets reached the droplet split the particles were directed into the centre daughter droplets. The results show that the design of the droplet split and the flow ratio between the centre and side outlet channels are the main factors that affect the particle enrichment and particle recovery in the centre daughter droplets. The highest particle enrichment was achieved in the droplet split design having the smallest centre channel (38 μm wide). Using this microfluidic chip design, we demonstrate up to 16.7-fold enrichment of 9.9 μm diameter polystyrene microbeads in the centre daughter droplets. This is almost three times higher particle enrichment than what has previously been presented using other intra-droplet particle enrichment techniques. Moreover, the acoustic technique is label-free and biocompatible.
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| 2. |
- Shtepliuk, Ivan, et al.
(författare)
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Electrochemical performance of gold-decorated graphene electrodes integrated with SiC
- 2023
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Ingår i: Microelectronic Engineering. - : Elsevier BV. - 0167-9317 .- 1873-5568. ; 278
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Tidskriftsartikel (refereegranskat)abstract
- Here we investigate the interface properties of gold (Au) decorated graphenized surfaces of 4H-SiC intended for electrochemical electrodes. These are fabricated using a two-step process: discontinuous Au layers with a nominal thickness of 2 nm are sputter-deposited onto 4H-SiC substrates with different graphenization extent—zero-layer graphene (ZLG) and monolayer epitaxial graphene) —followed by thermal annealing. By performing combined morphometric analysis, Raman mapping analysis, conductive atomic force microscopy, and electrochemical impedance spectroscopy measurements, we shed light on the relationship between physical processes (Au intercalation, particle re-shaping, and de-wetting) caused by thermal annealing and the intrinsic properties of graphenized SiC (vertical electron transport, charge-transfer properties, vibrational properties, and catalytic activity). We find that the impedance spectra of all considered structures exhibit two semicircles in the high and low frequency regions, which may be attributed to the graphene/ZLG/SiC (or Au/graphene/ZLG/SiC) and SiC/ZLG/graphene/electrolyte (or SiC/ZLG//Au/electrolyte) interfaces, respectively. An equivalent circuit model is proposed to estimate the interface carrier transfer parameters. This work provides an in-depth comprehension of the way by which the Au/2D carbon/SiC interaction strength influences the interface properties of heterostructures, which can be helpful for developing high performance catalytic and sensing devices.
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| 3. |
- Vethaak, T. D., et al.
(författare)
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Superconducting V3Si for quantum circuit applications
- 2021
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Ingår i: Microelectronic Engineering. - : Elsevier. - 0167-9317 .- 1873-5568. ; 244
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Tidskriftsartikel (refereegranskat)abstract
- V3Si thin films are known to be superconducting with transition temperatures up to 15 K, depending on the annealing temperature and the properties of the substrate underneath. Here we investigate the film structural properties with the prospect of further integration in silicon technology for quantum circuits. Two challenges have been identified: (i) the large difference in thermal expansion coefficient between V3Si and the Si substrate leads to large thermal strains after thermal processing, and (ii) the undesired silicide phase VSi2 forms when V3Si is deposited on silicon. The first of these is studied by depositing layers of 200 nm V3Si on wafers of sapphire and oxidized silicon, neither of which react with the silicide. These samples are then heated and cooled between room temperature and 860 degrees C, during which in-situ XRD measurements are performed. Analysis reveals a highly nonlinear stress development during heating with contributions from crystallization and subsequent grain growth, as well as the thermal expansion mismatch between silicide and substrate, while the film behaves thermoelastically during cooling. The second challenge is explored by depositing films of 20, 50, 100 and 200 nm of V3Si on bulk silicon. For each thickness, six samples are prepared, which are then annealed at temperatures between 500 and 750 degrees C, followed by measurements of their resistivity, residual resistance ratio and superconducting critical temperature. A process window is identified for silicide thicknesses of at least 100 nm, within which a trade-off needs to be made between the quality of the V3Si film and its consumption by the formation of VSi2.
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