| 1. |
- Chen, Xi, et al.
(författare)
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Device noise reduction for Silicon nanowire field-effect-transistor based sensors by using a Schottky junction gate
- 2019
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Ingår i: ACS Sensors. - : American Chemical Society (ACS). - 2379-3694. ; 4:2, s. 427-433
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Tidskriftsartikel (refereegranskat)abstract
- The sensitivity of metal-oxide-semiconductor field-effect transistor (MOSFET) based nanoscale sensors is ultimately limited by noise induced by carrier trapping/detrapping processes at the gate oxide/semiconductor interfaces. We have designed a Schottky junction gated silicon nanowire field-effect transistor (SiNW-SJGFET) sensor, where the Schottky junction replaces the noisy oxide/semiconductor interface. Our sensor exhibits significantly reduced noise, 2.1×10-9 V2µm2/Hz at 1 Hz, compared to reference devices with the oxide/semiconductor interface operated at both inversion and depletion modes. Further improvement can be anticipated by wrapping the nanowire by such a Schottky junction thereby eliminating all oxide/semiconductor interfaces. Hence, a combination of the low-noise SiNW-SJGFET sensor device with a sensing surface of the Nernstian response limit holds promises for future high signal-to-noise ratio sensor applications.
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| 2. |
- Chen, Xi, et al.
(författare)
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Low-Noise Schottky Junction Trigate Silicon Nanowire Field-effect Transistor for Charge Sensing
- 2019
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Ingår i: IEEE Transactions on Electron Devices. - 0018-9383 .- 1557-9646. ; 66:9, s. 3994-4000
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Tidskriftsartikel (refereegranskat)abstract
- Silicon nanowire (SiNW) field-effect transistors (SiNWFETs) are of great potential as a high-sensitivity charge sensor. The signal-to-noise ratio (SNR) of an SiNWFET sensor is ultimately limited by the intrinsic device noise generated by carrier trapping/detrapping processes at the gate oxide/silicon interface. This carrier trapping/detrapping-induced noise can be significantly reduced by replacing the noisy oxide/silicon interface with a Schottky junction gate (SJG) on the top of the SiNW. In this paper, we present a tri-SJG SiNWFET (Tri-SJGFET) with the SJG formed on both the top surface and the two sidewalls of the SiNW so as to enhance the gate control over the SiNW channel. Both experiment and simulation confirm that the additional sidewall gates in a narrow Tri-SJGFET indeed can confine the conduction path within the bulk of the SiNW channel away from the interfaces and significantly improve the immunity to the traps at the bottom buried oxide/silicon interface. Therefore, the optimal low-frequency noise performance can be achieved without the need for any substrate bias. This new gating structure holds promises for further development of robust SiNWFET-based charge sensors with low noise and low operation voltage.
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| 3. |
- Chen, Xi, et al.
(författare)
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Multiplexed analysis of molecular and elemental ions using nanowire transistor sensors
- 2018
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Ingår i: Sensors and actuators. B, Chemical. - : Elsevier BV. - 0925-4005 .- 1873-3077. ; 270, s. 89-96
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Tidskriftsartikel (refereegranskat)abstract
- An integrated sensor chip with silicon nanowire ion-sensitive field-effect transistors for simultaneous and selective detection of both molecular and elemental ions in a single sample solution is demonstrated. The sensing selectivity is realized by functionalizing the sensor surface with tailor-made mixed-matrix membranes (MMM) incorporated with specific ionophores for the target ions. A biomimetic container molecule, named metal-organic supercontainer (MOSC), is selected as the ionophore for detection of methylene blue (MB+), a molecular ion, while a commercially available Na-ionophore is used for Na+, an elemental ion. The sensors show a near-Nernstian response with 56.4 ± 1.8 mV/dec down to a concentration limit of ∌1 ΌM for MB+ and 57.9 ± 0.7 mV/dec down to ∌60 ΌM for Na+, both with excellent reproducibility. Extensive control experiments on the MB+ sensor lead to identification of the critical role of the MOSC molecules in achieving a stable and reproducible potentiometric response. Moreover, the MB+-specific sensor shows remarkable selectivity against common interfering elemental ions in physiological samples, e.g., H+, Na+, and K+. Although the Na+-specific sensor is currently characterized by insufficient immunity to the interference by MB+, the root cause is identified and remedies generally applicable for hydrophobic molecular ions are discussed. River water experiments are also conducted to prove the efficacy of our sensors.
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| 4. |
- Chen, Xi
(författare)
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Silicon Nanowire Field-Effect Devices as Low-Noise Sensors
- 2019
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- In the past decades, silicon nanowire field-effect transistors (SiNWFETs) have been explored for label-free, highly sensitive, and real-time detections of chemical and biological species. The SiNWFETs are anticipated for sensing analyte at ultralow concentrations, even at single-molecule level, owing to their significantly improved charge sensitivity over large-area FETs. In a SiNWFET sensor, a change in electrical potential associated with biomolecular interactions in close proximity to the SiNW gate terminal can effectively control the underlying channel and modulate the drain-to-source current (IDS) of the SiNWFET. A readout signal is therefore generated. This signal is primarily determined by the surface properties of the sensing layer on the gate terminal, with sensitivity close up to the Nernstian limit widely demonstrated. To achieve a high signal-to-noise ratio (SNR), it is essential for the SiNWFETs to possess low noise of which intrinsic device noise is one of the major components. In metal-oxide-semiconductor (MOS)-type FETs, the intrinsic noise mainly results from carrier trapping/detrapping at the gate oxide/semiconductor interface and it is inversely proportional to the device area.This thesis presents a comprehensive study on design, fabrication, and noise reduction of SiNWFET-based sensors on silicon-on-oxide (SOI) substrate. A novel Schottky junction gated SiNWFET (SJGFET) is designed and experimentally demonstrated for low noise applications. Firstly, a robust process employing photo- and electron-beam mixed-lithography was developed to reliably produce sub-10 nm SiNW structures for SiNWFET fabrication. For a proof-of-concept demonstration, MOS-type SiNWFET sensors were fabricated and applied for multiplexed ion detection using ionophore-doped mixed-matrix membranes as sensing layers. To address the fundamental noise issue of the MOS-type SiNWFETs, SJGFETs were fabricated with a Schottky (PtSi/silicon) junction gate on the top surface of the SiNW channel, replacing the noisy gate oxide/silicon interface in the MOS-type SiNWFETs. The resultant SJGFETs exhibited a close-to-ideal gate coupling efficiency (60 mV/dec) and significantly reduced device noise compared to reference MOS-type SiNWFETs. Further optimization was performed by implementing a three-dimensional Schottky junction gate wrapping both top surface and two sidewalls of the SiNW channel. The tri-gate SJGFETs with optimized geometry exhibited significantly enhanced electrostatic control over the channel, thereby confined IDS in the SiNW bulk, which greatly improved the device noise immunity to the traps at bottom buried oxide/silicon interface. Finally, a lateral bipolar junction transistor (LBJT) was also designed and fabricated on a SOI substrate aiming for immediate sensor current amplification. Integrating SJGFETs with LBJTs is expected to significantly suppress environmental interference and improve the overall SNR especially under low sensor current situations.
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| 5. |
- Chen, Xi, et al.
(författare)
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Top-bottom gate coupling effect on low frequency noise in a Schottky junction gated silicon nanowire field-effect transistor
- 2019
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Ingår i: IEEE Journal of the Electron Devices Society. - 2168-6734. ; 7, s. 696-700
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Tidskriftsartikel (refereegranskat)abstract
- In this letter, strong low frequency noise (LFN) reduction is observed when the buried oxide (BOX)/silicon interface of a Schottky junction gated silicon nanowire field-effect transistor (SJGFET) is depleted by a substrate bias. Such LFN reduction is mainly attributed to the dramatic reduction in Coulomb scattering when carriers are pushed away from the interface. The BOX/silicon interface depletion can also be achieved by sidewall Schottky junction gates in a narrow channel SJGFET, leading to an optimal LFN performance without the need of any substrate bias.
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| 6. |
- Hu, Qitao, et al.
(författare)
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Current gain and low-frequency noise of symmetric lateral bipolar junction transistors on SOI
- 2018
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Ingår i: 2018 48th European Solid-State Device Research Conference (ESSDERC). - 9781538654019 - 9781538654002 - 9781538654026 ; , s. 258-261
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Konferensbidrag (refereegranskat)abstract
- This paper presents a comprehensive study of symmetric lateral bipolar junction transistors (LBJTs) fabricated on SOI substrate using a CMOS-compatible process; LBJTs find many applications including being a local signal amplifier for silicon-nanowire sensors. Our LBJTs are characterized by a peak gain (β) over 50 and low-frequency noise two orders of magnitude lower than what typically is of the SiO 2 /Si interface for a MOSFET. β is found to decrease at low base current due to recombination in the space charge region at the emitter-base junction and at the surrounding SiO 2 /Si interfaces. This decrease can be mitigated by properly biasing the substrate.
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| 7. |
- Zeng, Shuangshuang, et al.
(författare)
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Controlled size reduction and its underlying mechanism to form solid-state nanopores via electron beam induced carbon deposition
- 2019
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Ingår i: Nanotechnology. - : IOP PUBLISHING LTD. - 0957-4484 .- 1361-6528. ; 30:45
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Tidskriftsartikel (refereegranskat)abstract
- Solid-state nanopores have drawn considerable attention for their potential applications in DNA sequencing and nanoparticle analysis. However, fabrication of nanopores, especially those of diameter below 30 nm, requires sophisticated techniques. Here, a versatile method to controllably reduce the diameter of prefabricated large-size pores down to sub-30 nm without greatly increasing the effective pore depth from the original membrane thickness is shown. This method exploits carbon deposition achieved via hydrocarbon evaporation, induced by an incident beam of electrons, and subsequent dissociation of hydrocarbon to solid carbon deposits. The carbon deposition employs a conventional scanning electron microscope equipped with direct visual feedback, along with a stable hydrocarbon source nearby the sample. This work systematically studies how electron beam accelerating voltage, imaging magnification, initial pore size and membrane composition affect the process of pore size reduction. Secondary electrons generated in the membrane material are confirmed to be the main cause of the dissociation of hydrocarbon. Thicker carbon deposited on one side than on the other of the membrane results in an asymmetric nanopore shape and a rectifying ionic transport. A physico-phenomenological model combined with Monte Carlo simulations is proposed to account for the observed carbon deposition behaviors.
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| 8. |
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