| 1. |
- Stathis, Dimitrios, 1989-
(författare)
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Synchoros VLSI Design Style
- 2022
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Computers have become essential to everyday life as much as electricity, communications and transport. That is evident from the amount of electricity we spend to power our computing systems. According to some reports it is estimated to be ≈ 7% of the total consumption worldwide. This trend is very worrisome, and the development of computing systems with lower power consumption is essential. This is even more important for battery-powered computers deployed in the field. The industry and the scientific community have realised that general-purpose computing platforms cannot offer that level of computational efficiency and that customisation is the solution to this problem. Application-Specific Integrated Circuits (ASICs) provide the highest efficiency in the mainstream implementation styles. ASICs have been shown to provide 100 to 1000× better computational efficiency than general-purpose computing platforms. However, the design cost of ASICs restricts it to products that have a large volume or large profit. In essence, to achieve ASIC-like computational efficiency, the design efficiency becomes the bottleneck. SynchorosVLSI design has been proposed to non-incrementally lower the design cost of custom ASIC-like solutions. The synchoros VLSI design is a novel concept that can reduce the design cost of ASICs and their manufacturing. Insynchoros design, the space is discretised, and the final design emerges by the abutment of synchoros micro-architecture level design objects called SiLago(Silicon Lego) blocks. The SiLago framework has the potential to reduce the design cost of ASICs and their manufacturing. This thesis makes three research areas of contributions toward synchoros VLSI design. The first area concerns composition by abutment. In this contribution, a design has been proposed to show how a clock tree can be created by abutting fragments inside the SiLago blocks. Additionally, the clock tree created by abutment was validated by the EDA tools and its cost metrics compared to the functionally equivalent clock tree created by the conventional EDA flows. The second area is to enhance the micro-architectural framework. These contributions include SiLago blocks tailored for neural network computation and architectural enhancements to improve the efficiency of executing streaming applications in the SiLago framework. Furthermore, a novel genome recognition application based on a self-organising map (SOM) was also mapped to the SiLago framework. The third area of contribution is implementing a model of cortex as a tiled ASIC design using custom 3D DRAM vaults for synaptic storage. This work is preparatory work to identify the SiLago blocks needed to support the implementation of spiking neuromorphic structures and in general applications of ordinary differential equations.
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| 2. |
- Chrysanthidis, Nikolaos, et al.
(författare)
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Traces of Semantization, from Episodic to Semantic Memory in a Spiking Cortical Network Model
- 2022
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Ingår i: eNeuro. - : Society for Neuroscience. - 2373-2822. ; 9:4
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Tidskriftsartikel (refereegranskat)abstract
- Episodic memory is a recollection of past personal experiences associated with particular times and places. This kind of memory is commonly subject to loss of contextual information or “semantization,” which gradually decouples the encoded memory items from their associated contexts while transforming them into semantic or gist-like representations. Novel extensions to the classical Remember/Know (R/K) behavioral paradigm attribute the loss of episodicity to multiple exposures of an item in different contexts. Despite recent advancements explaining semantization at a behavioral level, the underlying neural mechanisms remain poorly understood. In this study, we suggest and evaluate a novel hypothesis proposing that Bayesian–Hebbian synaptic plasticity mechanisms might cause semantization of episodic memory. We implement a cortical spiking neural network model with a Bayesian–Hebbian learning rule called Bayesian Confidence Propagation Neural Network (BCPNN), which captures the semantization phenomenon and offers a mechanistic explanation for it. Encoding items across multiple contexts leads to item-context decoupling akin to semantization. We compare BCPNN plasticity with the more commonly used spike-timing-dependent plasticity (STDP) learning rule in the same episodic memory task. Unlike BCPNN, STDP does not explain the decontextualization process. We further examine how selective plasticity modulation of isolated salient events may enhance preferential retention and resistance to semantization. Our model reproduces important features of episodicity on behavioral timescales under various biological constraints while also offering a novel neural and synaptic explanation for semantization, thereby casting new light on the interplay between episodic and semantic memory processes.
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| 3. |
- Martinez Mayorquin, Ramon Heberto
(författare)
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Sequence learning in the Bayesian Confidence Propagation Neural Network
- 2022
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- This thesis examines sequence learning in the Bayesian Confidence PropagationNeural Network (BCPNN). The methodology utilized throughout this work is com-putational and analytical in nature and the contributions here presented can beunderstood along the following four major themes: 1) this work starts by revisitingthe properties of the BCPNN as an attractor neural network and then provides anovel formalization of some of those properties. First, a bayesian theoretical frame-work for the lower bounds in the BCPNN. Second, a differential formulation ofthe BCPNN plasticity rule that highlights its relationship to similar rules in thelearning literature. Third, closed form analytical results for the BCPNN trainingprocess. 2) After that, this work describes how the addition of an adaptation processto the BCPNN enables its sequence recall capabilities. The specific mechanisms ofsequence learning are then studied in detail as well as the properties of sequencerecall such as the persistence time (how long does the network last in a specific stateduring sequence recall) and its robustness to noise. 3) This work also shows howthe BCPNN can be enhanced with memory traces of the activity (z-traces) to pro-vide the network with disambiguation capabilities. 4) Finally, this works provides acomputational study to quantify the number of the sequences that the BCPNN canstore successfully. Alongside these central themes, results concerning robustness,stability and the relationship between the learned patterns and the input statisticsare presented in either computational or analytical form. The thesis concludes witha discussion of the sequence learning capabilities of the BCPNN in the context of thewider literature and describes both his advantages and disadvantages with respectto other attractor neural networks.
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| 4. |
- Pereira, Patricia, et al.
(författare)
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Incremental Attractor Neural Network Modelling of the Lifespan Retrieval Curve
- 2022
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Ingår i: 2022 INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS (IJCNN). - : Institute of Electrical and Electronics Engineers (IEEE).
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Konferensbidrag (refereegranskat)abstract
- The human lifespan retrieval curve describes the proportion of recalled memories from each year of life. It exhibits a reminiscence bump - a tendency for aged people to better recall memories formed during their young adulthood than from other periods of life. We have modelled this using an attractor Bayesian Confidence Propagation Neural Network (BCPNN) with incremental learning. We systematically studied the synaptic mechanisms underlying the reminiscence bump in this network model after introduction of an exponential decay of the synaptic learning rate and examined its sensitivity to network size and other relevant modelling mechanisms. The most influential parameters turned out to be the synaptic learning rate at birth and the time constant of its exponential decay with age, which set the bump position in the lifespan retrieval curve. The other parameters mainly influenced the general magnitude of this curve. Furthermore, we introduced the parametrization of the recency phenomenon - the tendency to better remember the most recent memories - reflected in the curve's upwards tail in the later years of the lifespan. Such recency was achieved by adding a constant baseline component to the exponentially decaying synaptic learning rate.
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| 5. |
- Wang, Deyu, et al.
(författare)
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Memristor-Based In-Circuit Computation for Trace-Based STDP
- 2022
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Ingår i: 2022 Ieee International Conference On Artificial Intelligence Circuits And Systems (Aicas 2022). - : Institute of Electrical and Electronics Engineers (IEEE). ; , s. 1-4
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Konferensbidrag (refereegranskat)abstract
- Recently, memristors have been widely used to implement Spiking Neural Networks (SNNs), which is promising in edge computing scenarios. However, most memristor-based SNN implementations adopt simplified spike-timing-dependent plasticity (STDP) for the online learning process. It is challenging for memristor-based implementations to support the trace-based STDP learning rules that have been widely used in neuromorphic applications. This paper proposed a versatile memristor-based architecture to implement the synaptic-level trace-based STDP learning rules. Especially, the similarity between synaptic trace dynamics and the memristor nonlinearity is explored and exploited to emulate the trace variables of trace-based STDP. As two typical trace-based STDP learning rules, the pairwise STDP and the triplet STDP, are simulated on two typical nonlinear bipolar memristor devices. The simulation results show that the behavior of physical memristor devices can be well estimated (below 6% in terms of the relative root-mean-square error), and the memristor-based in-circuit computation for trace-based STDP learning rules can achieve a high correlation coefficient over 98%.
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