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- Mahdiani, Hoda, et al.
(författare)
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ΔnN : Power-Efficient Neural Network Acceleration Using Differential Weights
- 2020
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Ingår i: IEEE Micro. - : IEEE COMPUTER SOC. - 0272-1732 .- 1937-4143. ; 40:1, s. 67-74
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Tidskriftsartikel (refereegranskat)abstract
- The enormous and ever-increasing complexity of state-of-the-art neural networks has impeded the deployment of deep learning on resource-limited embedded and mobile devices. To reduce the complexity of neural networks, this article presents Delta NN, a power-efficient architecture that leverages a combination of the approximate value locality of neuron weights and algorithmic structure of neural networks. Delta NN keeps each weight as its difference (Delta) to the nearest smaller weight: each weight reuses the calculations of the smaller weight, followed by a calculation on the Delta value to make up the difference. We also round up/down the Delta to the closest power of two numbers to further reduce complexity. The experimental results show that Delta NN boosts the average performance by 14%-37% and reduces the average power consumption by 17%-49% over some state-of-the-art neural network designs.
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| 2. |
- SeyyedAghaei Rezaei, S. H., et al.
(författare)
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NoM : Network-on-Memory for Inter-bank Data Transfer in Highly-banked Memories
- 2020
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Ingår i: IEEE Computer Architecture Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 1556-6056. ; 19:1, s. 80-83
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Tidskriftsartikel (refereegranskat)abstract
- Data copy is a widely-used memory operation in many programs and operating system services. In conventional computers, data copy is often carried out by two separate read and write transactions that pass data back and forth between the memory hierarchy and processor registers. Some prior mechanisms propose to avoid this unnecessary data movement by using the shared internal bus in DRAM chip to directly copy data between two DRAM banks. While these methods exhibit superior performance, compared to conventional techniques, this technique does not allow data copy over different DRAM channels. Hence, this technique has limited benefit for the emerging 3D stacked memories (such as HMC and HBM) that contains tens of banks across multiple memory controllers. In this paper, we present Network-on-Memory (NoM), a lightweight inter-bank communication scheme that enables direct data copy within memory. NoM adopts a TDM-based circuit-switching design, where circuit setup is done by the memory controller. Compared to previous state-of-the-art approaches, NoM enables both data copy over multiple DRAM channels and concurrent copy operation. Our evaluation shows that NoM improves the performance of data-intensive workloads by 3.8X on average compare to the state-of-the-art techniques, respectively. IEEE
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