| 1. |
- Aparicio, Francisco J., et al.
(författare)
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Dye-based photonic sensing systems
- 2016
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Ingår i: Sensors and actuators. B, Chemical. - : Elsevier. - 0925-4005 .- 1873-3077. ; 228, s. 649-657
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Tidskriftsartikel (refereegranskat)abstract
- We report on dye-based photonic sensing systems which are fabricated and packaged at wafer scale. For the first time luminescent organic nanocomposite thin-films deposited by plasma technology are integrated in photonic sensing systems as active sensing elements. The realized dye-based photonic sensors include an environmental NO2 sensor and a sunlight ultraviolet light (UV) A+B sensor. The luminescent signal from the nanocomposite thin-films responds to changes in the environment and is selectively filtered by a photonic structure consisting of a Fabry-Perot cavity. The sensors are fabricated and packaged at wafer-scale, which makes the technology viable for volume manufacturing. Prototype photonic sensor systems have been tested in real-world scenarios. (C) 2016 Elsevier B.V. All rights reserved.
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| 2. |
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| 3. |
- Asiatici, Mikhail, et al.
(författare)
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Capacitive inertial sensing at high temperatures of up to 400 degrees C
- 2016
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Ingår i: Sensors and Actuators A-Physical. - : Elsevier. - 0924-4247 .- 1873-3069. ; 238, s. 361-368
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Tidskriftsartikel (refereegranskat)abstract
- High-temperature-resistant inertial sensors are increasingly requested in a variety of fields such as aerospace, automotive and energy. Capacitive detection is especially suitable for sensing at high temperatures due to its low intrinsic temperature dependence. In this paper, we present high-temperature measurements utilizing a capacitive accelerometer, thereby proving the feasibility of capacitive detection at temperatures of up to 400 degrees C. We describe the observed characteristics as the temperature is increased and propose an explanation of the physical mechanisms causing the temperature dependence of the sensor, which mainly involve the temperature dependence of the Young's modulus and of the viscosity and the pressure of the gas inside the sensor cavity. Therefore a static electromechanical model and a dynamic model that takes into account squeeze film damping were developed.
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| 4. |
- Asiatici, Mikhail, et al.
(författare)
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Through Silicon Vias With Invar Metal Conductor for High-Temperature Applications
- 2017
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Ingår i: Journal of microelectromechanical systems. - : IEEE Press. - 1057-7157 .- 1941-0158. ; 26:1, s. 158-168
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Tidskriftsartikel (refereegranskat)abstract
- Through silicon vias (TSVs) are key enablers of 3-D integration technologies which, by vertically stacking andinterconnecting multiple chips, achieve higher performances,lower power, and a smaller footprint. Copper is the mostcommonly used conductor to fill TSVs; however, copper hasa high thermal expansion mismatch in relation to the siliconsubstrate. This mismatch results in a large accumulation ofthermomechanical stress when TSVs are exposed to high temperaturesand/or temperature cycles, potentially resulting in devicefailure. In this paper, we demonstrate 300 μm long, 7:1 aspectratio TSVs with Invar as a conductive material. The entireTSV structure can withstand at least 100 thermal cycles from −50 °C to 190 °C and at least 1 h at 365 °C, limited bythe experimental setup. This is possible thanks to matchingcoefficients of thermal expansion of the Invar via conductor andof silicon substrate. This results in thermomechanical stressesthat are one order of magnitude smaller compared to copperTSV structures with identical geometries, according to finiteelement modeling. Our TSV structures are thus a promisingapproach enabling 2.5-D and 3-D integration platforms for hightemperatureand harsh-environment applications.
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| 5. |
- Ayala, Christopher L., et al.
(författare)
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Nanoelectromechanical digital logic circuits using curved cantilever switches with amorphous-carbon-coated contacts
- 2015
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 113, s. 157-166
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Tidskriftsartikel (refereegranskat)abstract
- Nanoelectromechanical (NEM) switches have the potential to complement or replace traditional CMOS transistors in the area of ultra-low-power digital electronics. This paper reports the demonstration of prototype circuits including the first 3-stage ring oscillator built using cell-level digital logic elements based on curved NEM switches. The ring oscillator core occupies an area of 30 mu m x 10 mu m using 6 NEM switches. Each NEM switch device has a footprint of 5 mu m x 3 mu m, an air gap of 60 mu m and is coated with amorphous carbon (a-C) for reliable operation. The ring oscillator operates at a frequency of 6.7 MHz, and confirms the simulated inverter propagation delay of 25 ns. The successful fabrication and measurement of this demonstrator are key milestones on the way towards an optimized, scaled technology with sub-nanosecond switching times, lower operating voltages and VLSI implementation.
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| 6. |
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| 7. |
- Bleiker, Simon J., et al.
(författare)
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Adhesive wafer bonding with ultra-thin intermediate polymer layers
- 2017
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Ingår i: Sensors and Actuators A-Physical. - : Elsevier. - 0924-4247 .- 1873-3069. ; 260, s. 16-23
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Tidskriftsartikel (refereegranskat)abstract
- Wafer bonding methods with ultra-thin intermediate bonding layers are critically important in heterogeneous 3D integration technologies for many NEMS and photonic device applications. A promising wafer bonding approach for 3D integration is adhesive bonding. So far however, adhesive bonding processes relied on relatively thick intermediate adhesive layers. In this paper, we present an adhesive wafer bonding process using an ultra-thin intermediate adhesive layer with sub-200 nm thickness. We demonstrate adhesive bonding of silicon wafers with a near perfect bonding yield of >99% and achieve less than ±10% non-uniformity of the intermediate layer thickness across an entire 100 mm-diameter wafer. A bond strength of 4.8 MPa was measured for our polymer adhesive, which is considerably higher than previously reported for other ultra-thin film adhesives. Additionally, the adhesive polymer used in the proposed method features excellent chemical and mechanical stability. We also report on a potential strategy for mitigating the formation of micro-voids in the polymer adhesive at the bond interface. Furthermore, the polymer adhesive can be sacrificially removed by oxygen plasma etching for both isotropic and anisotropic release etching. The characteristics of the adhesive wafer bonding process and its compatibility with CMOS wafers, makes it very attractive for heterogeneous 3D integration processes targeted at CMOS-integrated NEMS and photonic devices.
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| 8. |
- Bleiker, Simon J., et al.
(författare)
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Cost-Efficient Wafer-Level Capping for MEMS and Imaging Sensors by Adhesive Wafer Bonding
- 2016
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Ingår i: Micromachines. - Basel, Switzerland : Multidisciplinary Digital Publishing Institute (MDPI). - 2072-666X. ; 7:10, s. 192-
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Tidskriftsartikel (refereegranskat)abstract
- Device encapsulation and packaging often constitutes a substantial part of the fabrication cost of micro electro-mechanical systems (MEMS) transducers and imaging sensor devices. In this paper, we propose a simple and cost-effective wafer-level capping method that utilizes a limited number of highly standardized process steps as well as low-cost materials. The proposed capping process is based on low-temperature adhesive wafer bonding, which ensures full complementary metal-oxide-semiconductor (CMOS) compatibility. All necessary fabrication steps for the wafer bonding, such as cavity formation and deposition of the adhesive, are performed on the capping substrate. The polymer adhesive is deposited by spray-coating on the capping wafer containing the cavities. Thus, no lithographic patterning of the polymer adhesive is needed, and material waste is minimized. Furthermore, this process does not require any additional fabrication steps on the device wafer, which lowers the process complexity and fabrication costs. We demonstrate the proposed capping method by packaging two different MEMS devices. The two MEMS devices include a vibration sensor and an acceleration switch, which employ two different electrical interconnection schemes. The experimental results show wafer-level capping with excellent bond quality due to the re-flow behavior of the polymer adhesive. No impediment to the functionality of the MEMS devices was observed, which indicates that the encapsulation does not introduce significant tensile nor compressive stresses. Thus, we present a highly versatile, robust, and cost-efficient capping method for components such as MEMS and imaging sensors.
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| 9. |
- Bleiker, Simon J.
(författare)
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Heterogeneous 3D Integration and Packaging Technologies for Nano-Electromechanical Systems
- 2017
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Three-dimensional (3D) integration of micro- and nano-electromechanical systems (MEMS/NEMS) with integrated circuits (ICs) is an emerging technology that offers great advantages over conventional state-of-the-art microelectronics. MEMS and NEMS are most commonly employed as sensor and actuator components that enable a vast array of functionalities typically not attainable by conventional ICs. 3D integration of NEMS and ICs also contributes to more compact device footprints, improves device performance, and lowers the power consumption. Therefore, 3D integration of NEMS and ICs has been proposed as a promising solution to the end of Moore’s law, i.e. the slowing advancement of complementary metal-oxide-semiconductor (CMOS) technology.In this Ph.D. thesis, I propose a comprehensive fabrication methodology for heterogeneous 3D integration of NEM devices directly on top of CMOS circuits. In heterogeneous integration, the NEMS and CMOS components are fully or partially fabricated on separate substrates and subsequently merged into one. This enables process flexibility for the NEMS components while maintaining full compatibility with standard CMOS fabrication. The first part of this thesis presents an adhesive wafer bonding method using ultra-thin intermediate bonding layers which is utilized for merging the NEMS components with the CMOS substrate. In the second part, a novel NEM switch concept is introduced and the performance of CMOS-integrated NEM switch circuits for logic and computation applications is discussed. The third part examines two different packaging approaches for integrated MEMS and NEMS devices with either hermetic vacuum cavities or low-cost glass lids for optical applications. Finally, a novel fabrication approach for through silicon vias (TSVs) by magnetic assembly is presented, which is used to establish an electrical connection from the packaged devices to the outside world.
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| 10. |
- Bleiker, Simon J., et al.
(författare)
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High-Aspect-Ratio Through Silicon Vias for High-Frequency Application Fabricated by Magnetic Assembly of Gold-Coated Nickel Wires
- 2015
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Ingår i: IEEE Transactions on Components, Packaging, and Manufacturing Technology. - : IEEE Press. - 2156-3950 .- 2156-3985. ; 5:1, s. 21-27
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Tidskriftsartikel (refereegranskat)abstract
- In this paper, we demonstrate a novel manufacturing technology for high-aspect-ratio vertical interconnects for high-frequency applications. This novel approach is based on magnetic self-assembly of prefabricated nickel wires that are subsequently insulated with a thermosetting polymer. The high-frequency performance of the through silicon vias (TSVs) is enhanced by depositing a gold layer on the outer surface of the nickel wires and by reducing capacitive parasitics through a low-k polymer liner. As compared with conventional TSV designs, this novel concept offers a more compact design and a simpler, potentially more cost-effective manufacturing process. Moreover, this fabrication concept is very versatile and adaptable to many different applications, such as interposer, micro electromechanical systems, or millimeter wave applications. For evaluation purposes, coplanar waveguides with incorporated TSV interconnections were fabricated and characterized. The experimental results reveal a high bandwidth from dc to 86 GHz and an insertion loss of <0.53 dB per single TSV interconnection for frequencies up to 75 GHz.
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