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- Jantsch, A, et al.
(författare)
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Conparison of six languages for system level descriptions of telecom systems
- 1998
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Ingår i: Proceedings / FDL'98 / First International Forum on Design Languages. - Lausanne : Swiss Federal Inst. Of techn.. ; , s. 160-
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Konferensbidrag (refereegranskat)abstract
- Language evaluation for various purposes is an often repeated exercise in industry and academia. Due to the large number of influencing factors the dependence of the result on implicit or explicit assumptions is not always apparent and clear. Based on a systematic evaluation method with a large number of criteria we compare six languages with respect to the suitability as a system specification and description language for telecom applications. The languages under evaluation are VHDL, C++, SDL, Haskell, Erlang, and ProGram, which represent different paradigms. The evaluation method allows to give specific emphasis on particular aspects in a controlled way, which we use to make separate comparisons for pure software systems, pure hardware systems and mixed HW/SW systems.
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- Svantesson, E, et al.
(författare)
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A kinetic study of the self-degradation of o-carboranylalanine to nido-carboranylalan in solution
- 1999
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Ingår i: ACTA CHEMICA SCANDINAVICA. - : MUNKSGAARD INT PUBL LTD. - 0904-213X. ; 53:9, s. 731-736
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Tidskriftsartikel (refereegranskat)abstract
- The spontaneous degradation of racemic o-carboranylalanine [3-(1,2-dicarbacloso-dodecaboran(12)-1-yl)-2-aminopropanoic acid], a carborane analogue of the amino acid phenylalanine, to the corresponding diastereomeric, racemic pairs of nido-carboranylalani
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- Ykman-Couvreur, Ch., et al.
(författare)
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System exploration and synthesis from SDL of an ATM switch component
- 1999
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Ingår i: ASIC/SOC Conference, 1999. Proceedings. Twelfth Annual IEEE International. ; , s. 119-124
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Konferensbidrag (refereegranskat)abstract
- We describe the complete hardware synthesis of an ATM switch component, characterized by concurrent and dynamic processes, very high bit-rate data streams, and intensive data storage and transfer. The methodology used to synthesize it bridges the gap between an SDL system specification and an optimized single-chip implementation of communicating hardware processors, that satisfies stringent constraints on area, performance, and power. The novelty of this methodology is that through stepwise exploration, and gradual incorporation of timing constraints, it supports new optimization methods in view of memory and concurrency management, and expensive late iterations are avoided
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