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Träfflista för sökning "WFRF:(Thörnberg Benny 1966 ) srt2:(2010-2014)"

Sökning: WFRF:(Thörnberg Benny 1966 ) > (2010-2014)

  • Resultat 1-9 av 9
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1.
  • Cheng, Xin, 1974-, et al. (författare)
  • Hardware Centric Machine Vision for High Precision Center of Gravity Calculation
  • 2010
  • Ingår i: PROCEEDINGS OF WORLD ACADEMY OF SCIENCE, ENGINEERING AND TECHNOLOGY. ; 40, s. 576-583
  • Konferensbidrag (refereegranskat)abstract
    • We present a hardware oriented method for real-time measurements of object’s position in video. The targeted application area is light spots used as references for robotic navigation. Different algorithms for dynamic thresholding are explored in combination with component labeling and Center Of Gravity (COG) for highest possible precision versus Signal-to-Noise Ratio (SNR). This method was developed with a low hardware cost in focus having only one convolution operation required for preprocessing of data.
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2.
  • Cheng, Xin, 1974-, et al. (författare)
  • Optimized Color Pair Selection for Label Design
  • 2011
  • Ingår i: Proceedings Elmar - International Symposium Electronics in Marine. - Zadar, Croatia : IEEE conference proceedings. - 9789537044121 ; , s. 115-118
  • Konferensbidrag (refereegranskat)abstract
    • We present in this paper a technique for designing reference labels that can be used for optical navigation. We optimize the selection of foreground and background colors used for the printed reference labels. This optimization calibrates for individual color responses among printers and cameras such that the Signal to Noise Ratio (SNR) is maximized. Experiments show that we get slightly smaller SNR for the color labels compared to using a monochrome technique. However, the number of segmented image components is reduced significantly by as much as 78 percent. This reduction of number of image components will in turn reduce the memory storage requirement for the computing embedded system.
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3.
  • Hashemi, Ashkan, 1985-, et al. (författare)
  • Hardware Centric Automatic Recognition of Road Signs
  • 2012
  • Ingår i: ISCAIE 2012 - 2012 IEEE Symposium on Computer Applications and Industrial Electronics. - : IEEE conference proceedings. ; , s. 157-162
  • Konferensbidrag (refereegranskat)abstract
    • In this paper we present a novel and robust algorithm for automatic recognition of road signs by using histogram of oriented gradient (HOG) as the main feature and minimum distance classifier (MDC) to classify numbers written on speed limit road signs. It also describes how other geometrical properties can be added to feature vector in order to increase the robustness of proposed algorithm.
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4.
  • Malik, Abdul Waheed, 1981-, et al. (författare)
  • Comparison of Three Smart Camera Architectures for Real-time Machine Vision System
  • 2013
  • Ingår i: International Journal of Advanced Robotic Systems. - : SAGE Publications. - 1729-8806 .- 1729-8814. ; 10, s. Art. no. 402-
  • Tidskriftsartikel (refereegranskat)abstract
    • This paper presents a machine vision system for real-time computation of distance and angle of a camera from a set of reference points located on a target board. Three different smart camera architectures were explored to compare performance parameters such as power consumption, frame speed and latency.  Architecture 1 consists of hardware machine vision modules modeled at Register Transfer (RT) level and a soft-core processor on a single FPGA chip. Architecture 2 is commercially available software based smart camera, Matrox Iris GT. Architecture 3 is a two-chip solution composed of hardware machine vision modules on FPGA and an external micro-controller. Results from a performance comparison show that Architecture 2 has higher latency and consumes much more power than Architecture 1 and 3. However, Architecture 2 benefits from an easy programming model. Smart camera system with FPGA and external microcontroller has lower latency and consumes less power as compared to single FPGA chip having hardware modules and soft-core processor.
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5.
  • Malik, Abdul Waheed, 1981-, et al. (författare)
  • Hardware Architecture for Real-time  Computation of Image Component Feature Descriptors on a FPGA
  • 2014
  • Ingår i: International Journal of Distributed Sensor Networks. - : SAGE Publications. - 1550-1329 .- 1550-1477. ; , s. Art. no. 815378-
  • Tidskriftsartikel (refereegranskat)abstract
    • This paper describes a hardwarearchitecture for real-time image component labelingand the computation of image component featuredescriptors. These descriptors are object relatedproperties used to describe each image component.Embedded machine vision systems demand a robustperformance, power efficiency as well as minimumarea utilization, depending on the deployedapplication. In the proposed architecture, the hardwaremodules for component labeling and featurecalculation run in parallel. A CMOS image sensor(MT9V032), operating at a maximum clock frequencyof 27MHz, was used to capture the images. Thearchitecture was synthesized and implemented on aXilinx Spartan-6 FPGA. The developed architecture iscapable of processing 390 video frames per second ofsize 640x480 pixels. Dynamic power consumption is13mW at 86 frames per second.
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6.
  • Malik, Abdul Waheed, 1981-, et al. (författare)
  • Real-time Component Labelling with Centre of Gravity Calculation on FPGA
  • 2011
  • Ingår i: 2011 Proceedings of Sixth International Conference on Systems.
  • Konferensbidrag (refereegranskat)abstract
    • In this paper we present a hardware unit for real time component labelling with Centre of Gravity (COG) calculation. The main targeted application area is light spots used as references for robotic navigation. COG calculation can be done in parallel with a single pass component labelling unit without first having to resolve merged labels. We present hardware architecture suitable for implementation of this COG unit on Field programmable Gate Arrays (FPGA). As result, we get high frame speed, low power and low latency. The device utilization and estimated power dissipation are reported for Xilinx Virtex II pro device simulated at 86 VGA sized frames per second. Maximum speed is 410 frames per second at 126 MHz clock.
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7.
  • Meng, Xiaozhou, 1983-, et al. (författare)
  • Soft-IP Interface Modification Methodology
  • 2011
  • Ingår i: Proceedings of 2011 International Conference on Information and Electronics Engineering.
  • Konferensbidrag (refereegranskat)abstract
    • The reuse of predefined Intellectual Property (IP) can lead to great success in system design and help the designer to meet time-to-market requirements. A soft IP usually needs some customization and integration efforts rather than plug-and-play. Communication interface mismatch is one of the problems that integrators often meet. This paper suggests a soft-IP interface modification methodology (SIPIMM) for systems on Field Programmable Gate Array (FPGA) SIPIMM targets an interface-based soft IP model which is introduced to ease the interface modification and interface reuse. A case study of an open-source IP is presented using SIPIMM for system integration.
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8.
  • Svelander, Lars, 1955-, et al. (författare)
  • Belysningsanordning för fordon
  • 2013
  • Patent (populärvet., debatt m.m.)abstract
    • Belysningsanordning för avgivande av elektromagnetisk strålning för belysningsändamål eller liknande från ett fordon. Belysningsanordningen innefattar minst en enhet i vilken elektromagnetisk strålning genereras av minst en strålningsavgivande enhet, vars genererade elektromagnetiska strålning avges från belysningsanordningen av minst en strålningsavgivande enhet under bildandet av minst en ljuskägla vilken är justerbart anordnad med minst ett styrsystem. Belysningsanordningen innefattar minst en bildsensor vars insamlade information bearbetas i minst en datoriserad bildanalysenhet. Ljuskäglans justerbarhet uppnås av att ljuskäglan är uppdelad i ett flertal sektorer och att den avgivna ljusintensiteten i respektive sektor kan styras individuellt med utgångspunkt från information insamlad av bildsensorn och som bearbetats av bildanalysenheten. Patentansökan innefattar även ett förfarande för användning av belysningsanordningen.
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9.
  • Zhao, Jingbo, 1989-, et al. (författare)
  • Color Segmentation on FPGA Using Minimum Distance Classifier for Automatic Road Sign Detection
  • 2012
  • Ingår i: IST 2012 - 2012 IEEE International Conference on Imaging Systems and Techniques, Proceedings. - : IEEE conference proceedings. - 9781457717765 ; , s. 516-521
  • Konferensbidrag (refereegranskat)abstract
    • Classification is an important step in machine vision systems; it reveals the true identity of an object using features extracted in pre-processing steps. Practical usage requires the operation to be fast, energy efficient and easy to implement. In this paper, we present a design of minimum distance classifier based on FPGA platform. It is optimized by the pipelined structure to strike a balance between the device utilization and computational speed. In addition, the dimension of the feature space is modeled as generic parameter, making it possible for the design to re-generate hardware to cope with feature space with arbitrary dimensions. Its primary application is demonstrated on color segmentation on FPGA in the form of efficient classification using color as features. This result is further extended by introducing a multi-class component labeling module to label the segmented color components and measure the geometric properties of them. The combination of these two modules can effectively detect road signs as region of interests.
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  • Resultat 1-9 av 9

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