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| 2. |
- Asghar, M., et al.
(författare)
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Properties of dominant electron trap center in n-type SiC epilayers by means of deep level transient spectroscopy
- 2007
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Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 101:7
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Tidskriftsartikel (refereegranskat)abstract
- Characterization of dominant electron trap in as-grown SiC epilayers has been carried out using deep level transient spectroscopy. Two electron traps E1 and Z1 at Ec-0.21 and Ec-0.61 are observed, respectively, Z1 being the dominant level. Line shape fitting, capture cross section, and insensitivity with doping concentration have revealed interesting features of Z1 center. Spatial distribution discloses that the level is generated in the vicinity of epilayers/substrate interface and the rest of the overgrown layers is defect-free. Owing to the Si-rich growth conditions, the depth profile of Z1 relates it to carbon vacancy. The alpha particle irradiation transforms Z1 level into Z 1/Z2 center involving silicon and carbon vacancies. Isochronal annealing study further strengthens the proposed origin of the debated level. © 2007 American Institute of Physics.
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| 4. |
- Azam, Sher, 1971-
(författare)
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Microwave Power Devices and Amplifiers for Radars and Communication Systems
- 2009
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- SiC MESFETs and GaN HEMTs posses an enormous potential in power amplifiers at microwave frequencies due to their wide bandgap features of high electric field strength, high electron saturation velocity and high operating temperature. The high power density combined with the comparably high impedance attainable by these devices also offers new possibilities for wideband power microwave systems. Similarly Si-LDMOS being low cost and lonely silicon based RF power transistor has great contributions especially in the communication sector.The focus of this thesis work is both device study and their application in different classes of power amplifiers. In the first part of our research work, we studied the performance of transistors in device simulation using physical transistor structure in Technology Computer Aided Design (TCAD). A comparison between the physical simulations and measured device characteristics has been carried out. We optimized GaN HEMT, Si-LDMOS and enhanced version of our previously fabricated and tested SiC MESFET transistor for enhanced RF and DC characteristics. For large signal AC performance we further extended the computational load pull (CLP) simulation technique to study the switching response of the power transistors. The beauty of our techniques is that, we need no lumped or distributive matching networks to study active device behavior in almost all major classes of power amplifiers. Using these techniques, we studied class A, AB, pulse input class-C and class-F switching response of SiC MESFET. We obtained maximum PAE of 78.3 % with power density of 2.5 W/mm for class C and 84 % for class F power amplifier at 500 MHz. The Si-LDMOS has a vital role and is a strong competitor to wideband gap semiconductor technology in communication sector. We also studied Si-LDMOS (transistor structure provided by Infineon Technologies at Kista, Stockholm) for improved DC and RF performance. The interface charges between the oxide and RESURF region are used not only to improve DC drain current and RF power, gain & efficiency but also enhance its operating frequency up to 4 GHz.In the second part of our research work, six single stage (using single transistor) power amplifiers have been designed, fabricated and characterized in three phases for applications in communications, Phased Array Radars and EW systems. In the first phase, two class AB power amplifiers are designed and fabricated. The first PA (26 W) is designed and fabricated at 200-500 MHz using SiC MESFET. Typical results for this PA at 60 V drain bias at 500 MHz are, 24.9 dB of power gain, 44.15 dBm output power (26 W) and 66 % PAE. The second PA is designed at 30-100 MHz using SiC MESFET. At 60 V drain bias Pmax is 46.7 dBm (~47 W) with a power gain of 21 dB.In the second phase, for performance comparison, three broadband class AB power amplifiers are designed and fabricated at 0.7-1.8 GHz using SiC MESFET and two different GaN HEMT technologies (GaN HEMT on SiC and GaN HEMT on Silicon substrate). The measured maximum output power for the SiC MESFET amplifier at a drain bias of Vd= 66 V at 700 MHz the Pmax was 42.2 dBm (~16.6 W) with a PAE of 34.4 %. The results for GaN HEMT on SiC amplifier are; maximum output power at Vd = 48 V is 40 dBm (~10 W), with a PAE of 34 % and a power gain above 10 dB. The maximum output power for GaN HEMT on Si amplifier is 42.5 dBm (~18 W) with a maximum PAE of 39 % and a gain of 19.5 dB.In the third phase, a high power single stage class E power amplifier is implemented with lumped elements at 0.89-1.02 GHz using Silicon GaN HEMT as an active device. The maximum drain efficiency (DE) and PAE of 67 and 65 % respectively is obtained with a maximum output power of 42.2 dBm (~ 17 W) and a maximum power gain of 15 dB.
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| 5. |
- Azam, Sher, 1971-, et al.
(författare)
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Performance of SiC Microwave Transistors in Power Amplifiers
- 2008
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Ingår i: Proc. of MRS Symposium on wide bandgap semiconductor electronics 8. - 9781605110394 ; , s. 203-208
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Konferensbidrag (refereegranskat)abstract
- The performance of SiC microwave power transistors is studied in fabricated class-AB power amplifiers and class-C switching power amplifier using physical structure of an enhanced version of previously fabricated and tested SiC MESFET. The results for pulse input in class-C at 1 GHz are; efficiency of 71.4 %, power density of 1.0 W/mm. The switching loss was 0.424 W/mm. The results for two class-AB power amplifiers are; the 30-100 MHz amplifier showed 45.6 dBm (∼ 36 W) output powers at P1dB, at 50 MHz. The power added efficiency (PAE) is 48 % together with 21 dB of power gain. The maximum output power at P1dB at 60 V drain bias and Vg= -8.5 V was 46.7 dBm (∼47 W). The typical results obtained in 200-500 MHz amplifier are; at 60 V drain bias the P1dB is 43.85 dBm (24 W) except at 300 MHz where only 41.8 dBm was obtained. The maximum out put power was 44.15 dBm (26 W) at 500 MHz corresponding to a power density of 5.2 W/mm. The PAE @ P1dB [%] at 500 MHz is 66 %.
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| 8. |
- Ciechonski, Rafal, 1976-, et al.
(författare)
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Evaluation of MOS structures processed on 4H–SiC layers grown by PVT epitaxy
- 2005
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 49:12, s. 1917-1920
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Tidskriftsartikel (refereegranskat)abstract
- MOS capacitors have been fabricated on 4H–SiC epilayers grown by physical vapor transport (PVT) epitaxy. The properties were compared with those on similar structures based on chemical vapor deposition (CVD) layers. Capacitance–voltage (C–V) and conductance measurements (G–V) were performed in the frequency range of 1 kHz to 1 MHz and also at temperatures up to 475 K. Detailed investigations of the PVT structures indicate a stable behaviour of the interface traps from room temperature up to 475 K. The amount of positive oxide charge QO is 6.83 × 109 cm−2 at room temperature and decreases with temperature increase. This suggests that the processed devices are temperature stable. The density of interface states Dit obtained by Nicollian–Brews conductance method is lower in the structure based on the PVT grown sample.
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| 10. |
- Ewing, D.J., et al.
(författare)
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Inhomogeneities in Ni4H-SiC Schottky barriers : Localized Fermi-level pinning by defect states
- 2007
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Ingår i: Journal of Applied Physics. - : AIP Publishing. - 0021-8979 .- 1089-7550. ; 101:11
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Tidskriftsartikel (refereegranskat)abstract
- We investigated arrays of Ni, Pt, or Ti Schottky diodes on n -type 4H-SiC epitaxial layers using current-voltage (I-V) measurements, electron beam induced current (EBIC), polarized light microscopy, x-ray topography, and depth-resolved cathodoluminescence spectroscopy. A significant percentage of diodes (∼7%-30% depending on epitaxial growth method and diode size) displayed "nonideal" or inhomogeneous barrier height characteristics. We used a thermionic emission model based on two parallel diodes to determine the barrier heights and ideality factors of high- and low-barrier regions within individual nonideal diodes. Whereas high-barrier barrier heights increased with metal work function, low-barrier barrier heights remained constant at ∼0.60, 0.85, and 1.05 eV. The sources of these nonidealities were investigated with a variety of spectroscopic and imaging techniques to determine the nature and energy levels of the defects. EBIC indicated that clusters of defects occurred in all inhomogeneous diodes. Cathodoluminescence spectra revealed additional peaks in the nonideal diodes at 2.65, 2.40, and 2.20 eV, which complement the low-barrier barrier heights. It is proposed that defect clusters act to locally pin the Fermi level, creating localized low-barrier patches, which account for the inhomogeneous electrical characteristics. © 2007 American Institute of Physics.
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