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- Persson, Stefan, et al.
(författare)
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Variation of contact resistivity with Ge in TiW/p(+) SiGe contacts
- 2004
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Ingår i: Physica Scripta. - 0031-8949 .- 1402-4896. ; T114, s. 49-52
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Tidskriftsartikel (refereegranskat)abstract
- The dependence of contact resistivity on the Ge content in Si1-xGex is examined for TiW/p(+) Si1-xGex interfaces. Measurements are made on contacts with epitaxial Si1-xGex layers either at the surface or buried under a Si cap layer of various thicknesses. The contact resistivity is found to decrease by an order of magnitude with increasing Ge content from 0 to 30 at. %, which is attributed to an increase in the valence band energy of p(+) Si1-xGex. The measured contact resistivity is compared with a theoretical model, and the experimental results agree well with the modelled ones.
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| 5. |
- Wu, Dongping, et al.
(författare)
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Characterization of high-kappa nanolaminates of HfO2 and Al2O3 used as gate dielectrics in pMOSFETs
- 2004
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Ingår i: Integration Of Advanced Micro-And Nanoelectronic Devices-Critical Issues And Solutions. - : Springer Science and Business Media LLC. - 155899761X ; , s. 19-24
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Konferensbidrag (refereegranskat)abstract
- In order to combine the merits of both HfO2 and Al2O3 as high-kappa gate dielectrics for CMOS technology, high-kappa nanolaminate structures in the form of either Al2O3/HfO2/Al2O3 or Al2O3/HfAlOx/Al2O3 were implemented in pMOSFETs and electrically and microstructurally charachterized. ALD TiN film was used as the metal gate electrodes for the pMOSFETs. After full transistor-processing including a rapid thermal processing step at 930 T, the HfO2 film in the former nanolaminate was found to be crystallized. In contrast, the HfAlOx layer in the latter nanolaminate remained in the amorphous state. Both types of pMOSFETs exhibited a hysteresis as small as similar to20 mV in C-V characteristics in the bias range of +/- 2 V. They also showed a reduced gate leakage current. The pMOSFET with the Al2O3/HfAlOx/Al2O3 nanolaminate was characterized with a subthreshold slope of 77 mV/decade and a channel hole mobility close to the universal hole mobility curve. The pMOSFET with the Al2O3/HfO2/Al2O3, however, exhibited a subthreshold slope of 100 mV/decade and a similar to30W lower hole mobility than the universal curve.
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| 6. |
- Wu, Dongping, 1974-
(författare)
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Novel concepts for advanced CMOS : Materials, process and device architecture
- 2004
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- The continuous and aggressive dimensional miniaturization ofthe conventional complementary-metal-oxide semiconductor (CMOS)architecture has been the main impetus for the vast growth ofIC industry over the past decades. As the CMOS downscalingapproaches the fundamental limits, unconventional materials andnovel device architectures are required in order to guaranteethe ultimate scaling in device dimensions and maintain theperformance gain expected from the scaling. This thesisinvestigates both unconventional materials for the gate stackand the channel and a novel notched-gate device architecture,with the emphasis on the challenging issues in processintegration. High-κ gate dielectrics will become indispensable forCMOS technology beyond the 65-nm technology node in order toachieve a small equivalent oxide thickness (EOT) whilemaintaining a low gate leakage current. HfO2and Al2O3as well as their mixtures are investigated assubstitutes for the traditionally used SiO2in our MOS transistors. These high-κ filmsare deposited by means of atomic layer deposition (ALD) for anexcellent control of film composition, thickness, uniformityand conformality. Surface treatments prior to ALD are found tohave a crucial influence on the growth of the high-κdielectrics and the performance of the resultant transistors.Alternative gate materials such as TiN and poly-SiGe are alsostudied. The challenging issues encountered in processintegration of the TiN or poly-SiGe with the high-k are furtherelaborated. Transistors with TiN or poly-SiGe/high-k gate stackare successfully fabricated and characterized. Furthermore,proof-of-concept strained-SiGe surface-channel pMOSFETs withALD high-κ dielectrics are demonstrated. The pMOSFETs witha strained SiGe channel exhibit a higher hole mobility than theuniversal hole mobility in Si. A new procedure for extractionof carrier mobility in the presence of a high density ofinterface states found in MOSFETs with high-κ dielectricsis developed. A notched-gate architecture aiming at reducing the parasiticcapacitance of a MOSFET is studied. The notched gate is usuallyreferred to as a local thickness increase of the gatedielectric at the feet of the gate above the source/drainextensions. Two-dimensional simulations are carried out toinvestigate the influence of the notched gate on the static anddynamic characteristics of MOSFETs. MOSFETs with optimizednotch profile exhibit a substantial enhancement in the dynamiccharacteristics with a negligible effect on the staticcharacteristics. Notched-gate MOSFETs are also experimentallyimplemented with the integration of a high-κ gatedielectric and a poly-SiGe/TiN bi-layer gate electrode. Key words:CMOS technology, MOSFET, high-κ, gatedielectric, ALD, surface pre-treatment, metal gate, poly-SiGe,strained SiGe, surface-channel, buried-channel, notchedgate.
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