| 1. |
- Li, Shuqi, et al.
(författare)
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Rtt105 functions as a chaperone for replication protein A to preserve genome stability
- 2018
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Ingår i: EMBO Journal. - : Wiley-VCH Verlagsgesellschaft. - 0261-4189 .- 1460-2075. ; 37:17
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Tidskriftsartikel (refereegranskat)abstract
- Generation of single-stranded DNA (ssDNA) is required for the template strand formation during DNA replication. Replication Protein A (RPA) is an ssDNA-binding protein essential for protecting ssDNA at replication forks in eukaryotic cells. While significant progress has been made in characterizing the role of the RPA-ssDNA complex, how RPA is loaded at replication forks remains poorly explored. Here, we show that the Saccharomyces cerevisiae protein regulator of Ty1 transposition 105 (Rtt105) binds RPA and helps load it at replication forks. Cells lacking Rtt105 exhibit a dramatic reduction in RPA loading at replication forks, compromised DNA synthesis under replication stress, and increased genome instability. Mechanistically, we show that Rtt105 mediates the RPA-importin interaction and also promotes RPA binding to ssDNA directly in vitro, but is not present in the final RPA-ssDNA complex. Single-molecule studies reveal that Rtt105 affects the binding mode of RPA to ssDNA These results support a model in which Rtt105 functions as an RPA chaperone that escorts RPA to the nucleus and facilitates its loading onto ssDNA at replication forks.
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| 2. |
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| 3. |
- Huan, Yuxiang, et al.
(författare)
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A 3D Tiled Low Power Accelerator for Convolutional Neural Network
- 2018
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Ingår i: 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS). - : IEEE. - 9781538648810
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Konferensbidrag (refereegranskat)abstract
- It remains a challenge to run Deep Learning in devices with stringent power budget in the Internet-of-Things. This paper presents a low-power accelerator for processing Convolutional Neural Networks on the embedded devices. The power reduction is realized by exploring data reuse in three different aspects, with regards to convolution, filter and input features. A systolic-like data flow is proposed and applied to rows of Processing Elements (PEs), which facilitate reusing the data during convolution. Reuse of input features and filters is achieved by arranging the PE array in a 3D tiled architecture, whose dimension is 3 x 14 x 4. Local storage within PEs is therefore reduced and only cost 17.75 kB, which is 20% of the state-of-the-art. With dedicated delay chains in each PE, this accelerator is reconfigurable to suit various parameter settings of convolutional layers. Evaluated in UMC 65 nm low leakage process, the accelerator can reach a peak performance of 84 GOPS and consume only 136 mW at 250 Mhz.
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| 4. |
- Tu, Li, et al.
(författare)
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A wide-range operating synaptic device based on organic ferroelectricity with low energy consumption
- 2018
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Ingår i: RSC Advances. - : Royal Society of Chemistry. - 2046-2069. ; 8:47, s. 26549-26553
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Tidskriftsartikel (refereegranskat)abstract
- In thiswork, a wide-range operating synaptic device based on organic ferroelectricity has been demonstrated. The device possesses a simple two-terminal structure by using a ferroelectric phase-separated polymer blend as the active layer and gold/indium tin oxide (ITO) as the top/bottom electrodes, and exhibits a distinctive history-dependent resistive switching behavior at room temperature. And the device with low energy consumption (similar to 50 fJ mu m(-2) per synaptic event) can provide a reliable synaptic function of potentiation, depression and the complex memory behavior simulation of differential responses to diverse stimulations. In addition, using simulations, the accuracy of 32 x 32 pixel image recognition is improved from 76.21% to 85.06% in the classical model Cifar-10 with 1024 levels of the device, which is an important step towards the higher performance goal in image recognition based on memristive neuromorphic networks.
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| 5. |
- Xu, Jiawei, et al.
(författare)
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Optimized Near-Zero Quantization Method for Flexible Memristor Based Neural Network
- 2018
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Ingår i: IEEE Access. - : Institute of Electrical and Electronics Engineers (IEEE). - 2169-3536. ; 6, s. 29320-29331
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Tidskriftsartikel (refereegranskat)abstract
- Due to controllable conductance and non-volatility, flexible memristors are regarded as a key enabler for building artificial neural network (ANN)-based learning algorithms in flexible and wearable systems. However, the existing flexible memristors are suffering from limited number of conductance values, issues limiting large-scale integration, and insufficient accuracy that cannot support accurate computation of ANN. In this paper, solutions are proposed for the three major challenges of the flexible memristor; the feasibility of a three-layer fully connected neural network on MNIST and a 13-layer convolutional neural network (CNN) on CIFAR-10 using the flexible memristor based on single-walled carbon nanotubes network/polymer composite and hydrophilic Al2O3 dielectric are studied. The evaluation result shows that in the fully connected neural network system, it is able to recognize MNIST with an accuracy above 90% after 4-bit quantization, 52.05% decrease in interconnection numbers in the circuit and up to 40% random error introduced, and in the CNN on CIFAR-10, the system can retain an accuracy above 86% with less than 4% accuracy loss after 5-bit quantization, 59.34% decrease in interconnection numbers in the circuit and up to 40% random error injected.
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| 6. |
- Yang, Kunlong, et al.
(författare)
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Tunable flexible artificial synapses : a new path toward a wearable electronic system
- 2018
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Ingår i: npj Flexible Electronics. - : Springer Science and Business Media LLC. - 2397-4621. ; 2:20
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Tidskriftsartikel (refereegranskat)abstract
- The flexible electronics has been deemed to be a promising approach to the wearable electronic systems. However, the mismatching between the existing flexible devices and the conventional computing paradigm results an impasse in this field. In this work, a new way to access to this goal is proposed by combining flexible devices and the neuromorphic architecture together. To achieve that, a high-performance flexible artificial synapse is created based on a carefully designed and optimized memristive transistor. The device exhibits high-performance which has near-linear non-volatile resistance change under 10,000 identical pulse signals within the 515% dynamic range, and has the energy consumption as low as 45 fJ per pulse. It also displays multiple synaptic plasticity features, which demonstrates its potential for real-time online learning. Besides, the adaptability by virtue of its three-terminal structure specifically contributes its improved uniformity, repeatability, and reduced power consumption. This work offers a very viable solution for the future wearable computing.
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| 7. |
- Yang, Kunlong, et al.
(författare)
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Universal and Convenient Optimization Strategies for Three-Terminal Memristors
- 2018
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Ingår i: IEEE Access. - : Institute of Electrical and Electronics Engineers (IEEE). - 2169-3536. ; 6, s. 48815-48826
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Tidskriftsartikel (refereegranskat)abstract
- Neuromorphic computing, i.e., brainlike computing, has attracted a great deal of attention because of its exceptional performance. For the hardware implementation of neuromorphic systems, the desired key building blocks, artificial synapses, have been intensively investigated recently. However, many issues, such as the small state number, low reliability, and high energy consumption, have complicated the path to real applications. Therefore, methods that can improve the performance of the artificial synapses are highly desired. Although different artificial synapses have diverse working mechanisms, universal opti- mization strategies that can be applied to most three-terminal field-effect-transistor-type artificial synapses are proposed in this paper. Instead ofwasting the third terminal in the device structure, the working condition can be effectively tuned by this third terminal. The key parameters, such as the gate electric field intensity and distribution, can be adjusted, and the performance is thereby tuned. In this manner, multiple performance metrics are optimized, such as the current change per pulse (ΔI), the linearity, the uniformity, and the power consumption. The mechanisms behind these strategies are also investigated to strengthen the effectiveness. This paper will push the performance of the current artificial synapses to a new level.
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