| 1. |
- Hou, Shuoben, et al.
(författare)
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A Silicon Carbide 256 Pixel UV Image Sensor Array Operating at 400 degrees C
- 2020
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Ingår i: IEEE Journal of the Electron Devices Society. - : IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC. - 2168-6734. ; 8:1, s. 116-121
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Tidskriftsartikel (refereegranskat)abstract
- An image sensor based on wide band gap silicon carbide (SiC) has the merits of high temperature operation and ultraviolet (UV) detection. To realize a SiC-based image sensor the challenge of opto-electronic on-chip integration of SiC photodetectors and digital electronic circuits must be addressed. Here, we demonstrate a novel SiC image sensor based on our in-house bipolar technology. The sensing part has 256 ( $16\times 16$ ) pixels. The digital circuit part for row and column selection contains two 4-to-16 decoders and one 8-bit counter. The digital circuits are designed in transistor-transistor logic (TTL). The entire circuit has 1959 transistors. It is the first demonstration of SiC opto-electronic on-chip integration. The function of the image sensor up to 400 degrees C has been verified by taking photos of the spatial patterns masked from UV light. The image sensor would play a significant role in UV photography, which has important applications in astronomy, clinics, combustion detection and art.
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| 2. |
- Ekström, Mattias, et al.
(författare)
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Self-aligned contacts to ion implanted S/D regions in 4H-SiC
- 2023
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Ingår i: Materials Science in Semiconductor Processing. - : Elsevier Ltd. - 1369-8001 .- 1873-4081. ; 168
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Tidskriftsartikel (refereegranskat)abstract
- The self-aligned silicide (salicide) process, where a metallic silicide is formed without lithographic definition to both source/drain-regions and the gate, is important for devices thanks to its ability to minimize parasitic resistances in scaled silicon CMOS technology. The challenge to transfer the process to SiC technology is two-fold: a single silicide has to give low resistance contacts to both ion implanted p-type and n-type simultaneously, and the typical temperatures required to form contacts to SiC is high enough that silicide agglomerates on polysilicon. In this work, we investigated if there exists a process window for salicide process for the purpose of developing a salicide process for SiC CMOS. Transfer length method structures were fabricated by ion implantation of phosphorus and aluminum to investigate simultaneous contacts to SiC. Bridge resistor structures (2μm width) were fabricated both with and without silicide-block to determine the silicide stability on highly in-situ doped polysilicon. The approach is design of experiment with multiple factors, including silicide composition, annealing temperature, deposited metal thickness and annealing time. The formation of self-aligned low resistive contacts to both n-type and p-type SiC was successful. The mutual process window for the co-existence of stable silicide on polysilicon and low resistive contacts to SiC, which is required for true salicide process, could not be found.
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| 3. |
- Ekström, Mattias, 1990-, et al.
(författare)
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Ultrafast Pulsed I-V and Charge Pumping Interface Characterization of Low Voltage n-Channel SiC MOSFETs
- 2020
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Ingår i: Silicon Carbide and Related Materials 2019. - : Trans Tech Publications, Ltd.. ; , s. 642-651
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Konferensbidrag (refereegranskat)abstract
- Control of defects at or near the MOS interface is paramount for device performance optimization. The SiC MOS system is known to exhibit two types of MOS defects,defects at the SiO2/SiC interface and defects inside of the gate oxide that can trap channel charge carriers. Differentiating these two types can be challenging. In this work, we use several electrical measurement techniques to extract and separate these two types of defects. The charge pumping method and the ultrafast pulsed I-V method are given focus, as they are independent methods for extracting the defects inside the gate oxide. Defects are extracted from low voltage n-channel MOSFETs with differently processed gate oxides: steam-treatment, dry oxidation and nitridation. Ultrafast pulsed I-V and charge pumping gives comparable results. The presented analysis of the electrical characterization methods is of use for SiC MOSFET process development.
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| 4. |
- Metreveli, Alex, et al.
(författare)
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In Situ Gamma Irradiation Effects on 4H-SiC Bipolar Junction Transistors
- 2023
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Ingår i: IEEE Transactions on Nuclear Science. - : Institute of Electrical and Electronics Engineers (IEEE). - 0018-9499 .- 1558-1578. ; 70:12, s. 2597-2604
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Tidskriftsartikel (refereegranskat)abstract
- Gamma irradiation effects have been investigated on 4H-silicon carbide (SiC) bipolar junction transistors (BJTs), where the devices were exposed under different biasing regimes such as saturation, cut-off, active, reverse, and zero bias. Since bipolar transistors can be affected by dose rate, three different dose rates were used during irradiation tests. Characterization was performed on the transistors, without irradiation but in situ to avoid delays between irradiation and characterization. The study explores the relationship between biasing conditions and their impact on radiation-induced degradation of SiC BJT transistors. From these experiments, it is clear that 4H-SiC bipolar transistors can withstand high gamma doses, in the worst case less than 22% degradation of the current gain was seen for doses of up to 2 Mrad(Si).
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| 5. |
- Mukherjee, Debarati, et al.
(författare)
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Deposition of diamond films on single crystalline silicon carbide substrates
- 2020
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Ingår i: Diamond and related materials. - : Elsevier. - 0925-9635 .- 1879-0062. ; 101
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Tidskriftsartikel (refereegranskat)abstract
- Silicon carbide (SiC) is a wide band gap material that is slowly but steadily asserting itself as a reliable alternative to silicon (Si) for high temperature electronics applications, in particular for the electrical vehicles industry. The passivation of SiC devices with diamond films is expected to decrease leakage currents and avoid premature breakdown of the devices, leading to more efficient devices. However, for an efficient passivation the interface between both materials needs to be virtually void free and high quality diamond films are required from the first stages of growth. In order to evaluate the impact of the deposition and seeding parameters in the properties of the deposits, diamond films were deposited on SiC substrates by hot filament chemical vapor deposition (HFCVD). Before the seeding step the substrates were exposed to diamond growth conditions (pretreatment PT) and seeding was performed with a solution of detonation nanodiamond (DND) particles and with 6-12 and 40-60 mu m grit. Diamond films were then grown at different temperatures and with different methane concentrations and the deposits were observed in a scanning electron microscope (SEM); their quality was assessed with Raman spectroscopy.
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| 6. |
- Yuan, Zimo
(författare)
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Towards Higher Voltages : Optimization of 4H-SiC Devices
- 2024
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- Silicon carbide (4H-SiC) devices find extensive use in power applications due to the wide bandgap and high thermal conductivity. High-voltage Schottky diodes and MOSFETs have been available for commercial use for more than a decade. Much effort is now focused on reducing production costs and increasing the reliability and long term operation for 1-3 kV devices. This thesis focuses on three key problems for next generation of higher voltage and larger current 4H-SiC devices: i) reaching the ideal breakdown voltage of the material under reverse bias by a proper designed termination structure, ii) obtaining the best balance between on-state and switching losses of bipolar devices by localized lifetime control, iii) testing the radiation tolerance of MOSFETs and understanding the physical mechanisms of single event effects. This thesis starts with an introduction after which the experimental work and methodology for lifetime control and radiation tests are described (Chapter 2). The theoretical base and the physical models specified for 4H-SiC are discussed (Chapter 3). The results generated during the thesis work are summarized in the following three chapters. Chapter 4 reviews the current status of termination designs and different types of structures are evaluated from reliability and fabrication considerations. A buried junction termination extension (buried-JTE) structure, where implanted JTE zones are buried under a thin field buffer layer, has been proposed and simulated, resulting in a uniform field profile at the semiconductor/oxide interface. Simulation results also show that this structure will improve the area efficiency and reduce the effects of surface charge. In Chapter 5, a design process of lifetime control by MeV proton implantation for bipolar devices has been presented. The improvement on turn-off losses of 10 kV PiN diodes has been tested by both reverse recovery measurements and simulations. A process flow of physical simulations, based on deep level transient spectroscopy (DLTS) data for defects, has also been proposed, in which the lifetime profiles can be tailored by adjusting proton energies and fluences to reach the optimized device trade-off between on-state and turn-off losses. In Chapter 6, alpha particles of low doses have been used to irradiate 3.3 kV 4H-SiC MOSFETs to trigger single event burnout (SEB) failures. In this experiment, SEB threshold voltage, output characteristics and leakage current are characterized before and after the irradiation. The MOSFET cell used for the experiment has also been modelled to study the mechanisms of SEB, which typically occurs within nanoseconds after the irradiation and cannot be captured experimentally. The recently initiated radiation hardness experiments clearly indicate an SEB effect, but the linear energy transfer (LET) from the alpha particles in experiments cannot generate an SEB in the simulations. This discrepancy, and possible roads for future research are discussed in the concluding Chapter 7.
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