| 21. |
- Ashjaei, Mohammad, et al.
(författare)
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Supporting Multi-Hop Communications with HaRTES Ethernet Switches
- 2013
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Konferensbidrag (refereegranskat)abstract
- In this paper we identify the challenges of multi-hop communication when using a micro-segmented switched-Ethernet protocol with enhanced HaRTES switches. The HaRTES architecture has been explored in the scope of single-switch topology, and provides dynamic virtual channels that can be composed hierarchically and provide bounded latency together with temporal isolation. Herein we propose two different solutions regarding the traffic forwarding in multi-switch architectures, while maintaining the unique properties of the single HaRTES switch case. In the first approach, the traffic is buffered and scheduled sequentially in each hop. In the second solution the traffic is scheduled once and forwarded immediately through multiple switches without buffering. In this paper we present a brief comparison of both approaches and we report on the on-going work towards effective support to real-time communications in dynamic and complex Cyber-Physical Systems.
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| 22. |
- Ashjaei, Mohammad, et al.
(författare)
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The Design and Implementation of a Simulator for Switched Ethernet Networks
- 2012
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Ingår i: 3rd International Workshop on Analysis Tools andMethodologies for Embeddedand Real-time Systems. ; , s. 57-62
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Konferensbidrag (refereegranskat)abstract
- In the context of Switched Ethernet, the Flexible Time-Triggered Switched Ethernet protocol (FTT-SE) was proposed to overcome the limitations and related problems of using COTS switches in real-time networks, such as overflow of switch queues due to uncontrolled arrival of packets. Although the FTT-SE protocol has been validated by several experiments on real applications, evaluation of different architectures as well as evaluation of large scale networks is not straightforward. Therefore, a simulator to evaluate different network architectures based on the FTT-SE protocol is useful. In this paper we present such a simulator. We address the extended FTT-SE protocol using multiple switches and we present a modular simulator based on Simulink/Matlab to visualize message transmissions and to evaluate end-to-end delay bounds of messages.
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| 23. |
- Ashjaei, Mohammad, et al.
(författare)
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Worst-case delay analysis of master-slave switched ethernet networks
- 2012
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Ingår i: Proceeings of the 2nd International Workshop on Worst-Case Traversal Time. - New York, NY, USA : ACM. - 9781450316866 ; , s. 15-21
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Konferensbidrag (refereegranskat)abstract
- Switched Ethernet is increasingly used in real-time communication due to its intrinsic features such as micro segmentation and high throughput. However, COTS switches may impose long blocking times due to their FIFO queues and can also experience buffer overflow in outgoing queues due to uncontrolled packets arrival. The FTT-SE protocol uses a Master-Slave technique to overcome the COTS switch limitations in real-time applications. Recently, we extended the protocol for large scale networks and in this paper we present the worst-case delay analysis using the Network Calculus formalism for such a network. Moreover, we assess the end-to-end delay of traffic with simulation concluding that the obtained analytical results present a good match with the observed delays, providing uppers bounds that vary between 0% and 50% above the maximum measured values. © 2012 ACM.
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| 24. |
- Becker, Matthias, et al.
(författare)
-
Dynamic Power Management for Thermal Control of Many-Core Real-Time Systems
- 2014
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Ingår i: Sigbed Review. - : Association for Computing Machinery (ACM). - 1551-3688. ; 11:3, s. 26-29
-
Tidskriftsartikel (refereegranskat)abstract
- Many-Core systems, processors incorporating numerous cores interconnected by a Network on Chip (NoC), provide the computing power needed by future applications. High power density caused by the steadily shrinking transistor size, which is still following Moore's law, leads to a number of problems such as overheating cores, affecting processor reliability and lifetime. Embedded real-time systems are exposed to a changing ambient temperature and thus need to adapt their configuration in order to keep the individual core temperature below critical values. %Targeting embedded real-time systems, systems need to adapt to changing environments. In our approach a hysteresis controller is implemented on each core, triggering a redistribution of the cores and the transition into idle state allowing the core to cool down. We propose two approaches, one global and one local approach, to redistribute the tasks and relive overheating cores during runtime. We evaluate the two proposed approaches by comparing them against each other based on simulations.
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| 25. |
- Becker, Matthias, et al.
(författare)
-
Increased Reliability of Many-Core Platforms through Thermal Feedback Control
- 2014
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Ingår i: Performance, Power and Predictability of Many-Core Embedded Systems 3PMCES'14. - Dresden, Germany.
-
Konferensbidrag (refereegranskat)abstract
- In this paper we present a low overhead thermal management approach to increase reliability of many-core embedded real-time systems. Each core is controlled by a feedback controller. We adapt the utilization of the core in order to decrease the dynamic power consumption and thus the corresponding heat development. Sophisticated control mechanisms allow us to migrate the load in advance, before reaching critical temperature values and thus we can migrate in a safe way with a guarantee to meet all deadlines.
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| 26. |
- Becker, Matthias, et al.
(författare)
-
Limiting temperature gradients on many-cores by adaptive reallocation of real-time workloads
- 2014
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Ingår i: 19th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2014. - 9781479948468 ; , s. Article number 7005241-
-
Konferensbidrag (refereegranskat)abstract
- The advent of many-core processors came with the increase in computational power needed for future applications. However new challenges arrived at the same time, especially for the real-time community. Each core on such a processor is a heat source and uneven usage can lead to hot spots on the processor, affecting its lifetime and reliability. For real-time systems, it is therefore of paramount importance to keep the temperature differences between the individual cores below critical values, in order to prevent premature failure of the system. We argue that this problem can not be solved by traditional approaches, since the growing number of cores makes them intractable. We rather argue to split the problem in the spacial domain and control the temperature on core level. The cores control their temperature by rearranging the load in a predictable manner during runtime. To achieve this, a feedback controller is implemented on each core. We conclude our work with a simulation based evaluation of the proposed approach comparing its performance against a previously presented algorithm.
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| 27. |
- Becker, Matthias, et al.
(författare)
-
Mapping Real-Time Tasks onto Many-Core Systems considering Message Flows
- 2014
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Ingår i: Proceedings of the Work-in-Progress Session of the 20th IEEE Real-Time and Embedded Technology and Applications Symposium. - Berlin, Germany. ; , s. 17-18
-
Konferensbidrag (refereegranskat)abstract
- In this work we focus on the task mapping problem for many-core real-time systems. The growing number of cores connected by a Network-on-Chip (NoC) calls for sophisticated mapping techniques to meet the growing demands of real-time applications. Hardware should be used in an efficient way such that unnecessary resource usage is avoided. Because of the NP-hardness of the problem, heuristic and meta-heuristic techniques are used to find good solutions. We further consider periodic communication between tasks and we focus on a static mapping solution.
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| 28. |
- Becker, Matthias, et al.
(författare)
-
Saving Energy by Means of Dynamic Load Management in Embedded Multicore Systems
- 2014
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Ingår i: Proceedings of the 9th IEEE International Symposium on Industrial Embedded Systems, SIES 2014. - 9781479940233 ; , s. 11-20
-
Konferensbidrag (refereegranskat)abstract
- Load balancing is widely used to optimize response times and throughput of software systems. When considering embedded systems, however, additional optimization goals like energy consumption become relevant. In this paper, we explore the use of load balancing in embedded multicore applications. We present extensions to three prominent load balancing schemes, enabling them to dynamically scale the number of active cores. We integrated the algorithms in a proprietary operating system targeting multicore embedded systems. Our evaluation, which is based on a telecommunication (VoIP) scenario, shows that a significant reduction in energy consumption is possible.
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| 29. |
- Behnam, Moris, 1973-, et al.
(författare)
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Bounding the number of self-blocking occurrences of SIRAP
- 2010
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Ingår i: Proceedings - Real-Time Systems Symposium. - 9780769542980 ; , s. 61-72
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Konferensbidrag (refereegranskat)abstract
- This paper presents a new schedulability analysis for hierarchically scheduled real-time systems executing on a single processor using SIRAP; a synchronization protocol for inter subsystem task synchronization. We show that it is possible to bound the number of self-blocking occurrences that should be taken into consideration in the schedulability analysis of subsystems. Correspondingly, we present two novel schedulability analysis approaches with proof of correctness for SIRAP. An evaluation suggests that this new schedulability analysis can decrease the analytical subsystem utilization significantly
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| 30. |
- Behnam, Moris, et al.
(författare)
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Multi-core Composability in the Face of Memory Bus Contention
- 2012
-
Konferensbidrag (refereegranskat)abstract
- In this paper we describe the problem of achieving composability of independently developed real-time subsystems to be executed on a multicore platform.We evaluate existing work for achieving real-time performance on multicores and illustrate their lack with respect to composability. To better address composability we present a multi-resource server-based scheduling technique to provide predictable performance when composing multiple subsystems on a multicore platform. To achieve composability also on multicore platforms, we propose to add memory-bandwidth as an additional server resource. Tasks within our multi-resource servers are guaranteed both CPU- and memory-bandwidth; thus the performance of a server will become independent of resource usage by tasks in other servers. We are currently implementing multi-resource servers for the Enea’s OSE operating system for a P4080 8-core processor to be tested with software for a 3G-basestation.
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