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Träfflista för sökning "WFRF:(Qiu Zhijun) srt2:(2007-2009)"

Sökning: WFRF:(Qiu Zhijun) > (2007-2009)

  • Resultat 1-8 av 8
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1.
  • Li, Jiantong, et al. (författare)
  • Contact-electrode insensitive rectifiers based on carbon nanotube network transistors
  • 2008
  • Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers (IEEE). - 0741-3106 .- 1558-0563. ; 29:5, s. 500-502
  • Tidskriftsartikel (refereegranskat)abstract
    • This letter presents rectifiers based on the diode connection of carbon nanotube network (CNN) transistors. Despite a low density of carbon nanotubes in the CNNs, the devices can achieve excellent performance with a forward/reverse current ratio reaching 10(5). By casting nanotube suspension on oxidized Si substrates with predefined electrodes, CNN-based field-effect transistors are readily prepared. By short-circuiting the source and gate terminals, CNN-based rectifiers are realized with the rectification characteristics independent of whether Pd or Al is employed as the contact electrodes. This independence is especially attractive for applications of CNN-based transistors/rectifiers in flexible electronics with various printing techniques.
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3.
  • Qiu, Zhijun, et al. (författare)
  • A comparative study of two different schemes to dopant segregation at NiSi/Si and PtSi/Si interfaces for Schottky barrier height lowering
  • 2008
  • Ingår i: IEEE Transactions on Electron Devices. - 0018-9383 .- 1557-9646. ; 55:1, s. 396-403
  • Tidskriftsartikel (refereegranskat)abstract
    • An experimental study is presented to compare two different schemes used to incorporate a high concentration of dopants at the silicide/silicon interface for NiSi and PtSi, i.e., dopant segregation, with the purpose of lowering the Schottky barrier height (SBH) of the contact systems. Specifically, the interfacial dopant is introduced either through silicidation-induced dopant segregation (SIDS) or by silicide as diffusion source (SADS). For the latter, a postimplantation drive-in anneal is needed. For both silicide systems, the dopant segregation gives rise to a predominant effect, leading to an effective SBH that is independent of the original SBHs of PtSi and NiSi, which differs by 0.2 eV. Scheme SUDS is relatively simple in processing, but the silicidation process is dopant-dependent, leading to local variations of silicide formation. Scheme SADS addresses the adverse effect of dopant on silicidation by separating silicidation from dopant incorporation.
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4.
  • Qiu, Zhijun, et al. (författare)
  • Role of Si implantation in control of underlap length in Schottky-barrier source/drain MOSFETs on ultrathin body SOI
  • 2008
  • Ingår i: Proceedings of ULIS. - NEW YORK : IEEE. ; , s. 175-178, s. 175-178
  • Konferensbidrag (refereegranskat)abstract
    • This works demonstrates a novel approach using Si implantation prior to Pt deposition and PtSi formation to control the underlap length between the PtSi source/drain regions to the gate in Schottky-Barrier (SB-) MOSFETs. Dopant segregation at the PtSi/Si interface is used to enhance device performance. With the lon /Ioff current ratio as an indicator, optimized Si implant doses are found for both n- and p-channel SB-MOSFETs. Through an effective barrier width, the underlap length has direct implication on the leakage current.
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5.
  • Qiu, Zhijun, et al. (författare)
  • Silicide as diffusion source for dopant segregation in 70-nm MOSFETs with PtSi Schottky-barrier source/drain on ultrathin-body SOI
  • 2008
  • Ingår i: ULIS 2008. - NEW YORK : IEEE. ; , s. 23-26
  • Konferensbidrag (refereegranskat)abstract
    • In this paper, dopant segregation (DS) method is adopted to enhance device performance of PtSi-based Schottky-barrier source/drain MOSFETs (SB-MOSFETs) fabricated on ultrathin silicon-on-insulator. The DS formation is realized by means of Silicide As Diffusion Source. Without DS treatment, the devices are typically p-type, but with a rather large electron branch at positive gate bias. Dopant segregation with As is found to turn the devices to well-performing n-MOSFETs, and DS with B to greatly enhance the hole conduction in the p-MOSFETs. A large threshold voltage (V-t) shift is however observed in the p-MOSFET due to B lateral spread caused during the drive-in process for the DS formation. By reducing the drive-in temperature, this problem is partially addressed with a smaller V-t shift and a much better control of short channel effect.
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6.
  • Zhang, Zhen, et al. (författare)
  • Performance fluctuation of FinFETs with Schottky barrier source/drain
  • 2008
  • Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 29:5, s. 506-508
  • Tidskriftsartikel (refereegranskat)abstract
    • A considerable performance fluctuation of FinFETs featuring PtSi-based Schottky barrier source/drain is found. The Fin-channels measure 27-nm tall and 35-nm wide. Investigation of similarly processed transistors of broad gate-widths reveals a large variation in the position of the PtSi/Si interface with reference to the gate edge along the gate width. This variation suggests an uneven underlap between the PtSi and the gate from device to device for the FinFETs, since essentially only one silicide grain would be in contact with each Fin-channel at the PtSi/Si interface. The size of the underlap is expected to sensitively affect the performance of the FinFETs.
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7.
  • Zhang, Zhen, et al. (författare)
  • SB-MOSFETs in UTB-SOI featuring PtSi source/drain with dopant segregation
  • 2008
  • Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 29:1, s. 125-127
  • Tidskriftsartikel (refereegranskat)abstract
    • MOSFETs of both polarities with PtSi-based Schottky-barrier source/drain (S/D) have been fabricated in ultrathin-body Si-on-insulator. The PtSi is formed in the S/D regions without lateral silicide growth under the gate spacers. This design leads to a 30-nm underlap between the PtSi-Si contacts and the gate edges resulting in low drive currents. Despite the underlap, excellent performance is achieved for both types of MOSFETs with large drive currents and low leakage by means of dopant segregation through As and B implantation into the PtSi followed by drive-in annealing at low temperatures.
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8.
  • Zhang, Zhen, et al. (författare)
  • Schottky-barrier height tuning by means of ion implantation into preformed silicide films followed by drive-in anneal
  • 2007
  • Ingår i: IEEE Electron Device Letters. - 0741-3106 .- 1558-0563. ; 28:7, s. 565-568
  • Tidskriftsartikel (refereegranskat)abstract
    • An experimental study on Schottky-barrier height (SBH) tuning using ion implantation followed by drive-in anneal of As, B, In, and P in preformed NiSi and PtSi films is presented. Measured on B-implanted NiSi and PtSi Schottky diodes, the effective SBH on n-type Si is altered to similar to 1.0 eV. For As- and P-implanted diodes, the SBH on p-type Si can be tuned to around 0.9 eV The process window for the most pronounced SBH modification is dopant dependent.
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  • Resultat 1-8 av 8

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