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Träfflista för sökning "WFRF:(Brorsson Mats 1962 ) srt2:(2000-2004)"

Sökning: WFRF:(Brorsson Mats 1962 ) > (2000-2004)

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  • Brorsson, Mats, 1962- (författare)
  • MipsIt-a simulation and development environment using animation for computer architecture education
  • 2002
  • Konferensbidrag (övrigt vetenskapligt/konstnärligt)abstract
    • Computer animation is a tool which nowadays is used in more and more fields. In this paper we describe the use of computer animation to support the learning of computer organization itself. MipsIt is a system consisting of a software development environment, a system and cache simulator and a highly flexible microarchitecture simulator used for pipeline studies. It has been in use for several years now and constitutes an important tool in the education at Lund University and KTH, Royal Institute of Technology in Sweden.
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  • Collin, Mikael, et al. (författare)
  • Low Power Instruction Fetch using Profiled Variable Length Instructions
  • 2003
  • Konferensbidrag (refereegranskat)abstract
    • Computer system performance depends on high access rate and low miss rate in the instruction cache, which also affects energy consumed by fetching instructions. Simulation of a small computer typical for embedded systems show that up to 20% of the overall processor energy is consumed in the instruction fetch path and as much as 23% of the execution time is spent on instruction fetch. One way to increase the instruction memory bandwidth is to fetch more instructions each access without increasing the bus width. We propose an extension to a RISC ISA, with variable length instructions, yielding higher information density without compromising programmability. Based on profiling of dynamic instruction usage and argument locality of a set of SPEC CPU2000 applications, we present a scheme using 8- 16- and 24-bit instructions accompanied by lookup tables inside the processor. Our scheme yields a 20-30% reduction in static memory usage, and experiments show that up to 60% of all executed instructions consist of short instructions. The overall energy savings are up to 15% for the entire data path and memory system, and up to 20% in the instruction fetch path.
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  • Karlsson, Sven, et al. (författare)
  • A free openmp compiler and run-time library infrastructure for research on shared memory parallel computing
  • 2004
  • Ingår i: Proceedings of the 16th IASTED International Conference on Parallel and Distributed Computing and Systems. - : ACTA Press. ; , s. 354-361
  • Konferensbidrag (refereegranskat)abstract
    • OpenMP is an informal industry standard for programming parallel computers with a shared memory and has during the last few years achieved considerable acceptance in both the academic world and the industry. OpenMP is a thread level fork-join programming model and relies on a set of compiler directives. An OpenMP aware compiler uses these directives to generate a multi-threaded application. In practice, an OpenMP run-time library is also needed as OpenMP specifies a set of run-time library calls. In this paper we report on a free OpenMP compiler and run-time library infrastructure. We present an OpenMP compiler for C called OdinMP and briefly discuss the run time library that the compiler targets. The source code to both the compiler and the run-time libraries are available and can be freely used for OpenMP research. The compilation system is evaluated using the EPCC micro-benchmark suite for OpenMP and a set of appli cations from the SPLASH-2 benchmarks suite ported to OpenMP. Comparisons are made to OpenMP aware com piler systems from SGI and Intel. The performance of code generated with the pre sented compilation system is shown to be very close to or exceeding that of commercial compilers for a wide range of benchmark applications.
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  • Karlsson, Sven, et al. (författare)
  • A Fully Compliant OpenMP implementation on Software Distributed Shared Memory
  • 2002
  • Konferensbidrag (refereegranskat)abstract
    • OpenMP is a relatively new industry standard for programming parallel computers with a shared memory programming model. Given that clusters of workstations are a cost-effective solution to build parallel platforms, it would of course be highly interesting if the OpenMP model could be extended to these systems as well as to the standard shared memory architectures for which it was originally intended. We present in this paper a fully compliant implementation of the OpenMP specification 1.0 for C targeting networks of workstations. We have used an experimental software distributed shared memory system, CVM, to implement a run-time library which is the target of a source-to-source OpenMP translator also developed in this project. The system has been evaluated using an OpenMP microbenchmark suite used to evaluate the effect of some memory coherence protocol improvements. We have also used OpenMP versions of three Splash-2 applications concluding in reasonable speedups on an IBM SP machine with eight nodes. This is the first study to investigate the subtle mechanisms of consistency in OpenMP on software DSM systems.
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  • Nikitovic, Mladen, et al. (författare)
  • A multiprogrammed workload model for energy and performance estimation of adaptive chip-multiprocessors
  • 2004
  • Ingår i: Proceedings of 18th International  Parallel and Distributed Processing Symposium, 2004. - : IEEE. - 0769521320 ; , s. 3449-3456
  • Konferensbidrag (refereegranskat)abstract
    • Summary form only given. Today, there is a trend towards steadily increasing functionality in mobile terminals. This trend in turn increases the performance demand on the architecture that is supposed to do all the work. It is likely that more traditional architectures like multiprocessors are used in future mobile terminals. They are attractive because they can now be integrated on a single chip and can provide the desired performance efficiently if intelligently managed. Choosing the most efficient architecture configuration is however a complex issue and depends on multiple factors. We believe that the way the behavior of the workload is modeled is of paramount importance when estimating the efficiency of any proposed architecture for future mobile terminals. Therefore, a deterministic and simple workload description is needed. In this paper, we show how such a multiprogrammed workload is created and used for energy and performance estimation of an adaptive chip-multiprocessor (CMP) architecture.
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