| 1. |
- Haghbayan, M. -H, et al.
(författare)
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Online software-based self-testing in the dark silicon era
- 2017
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Ingår i: The Dark Side of Silicon. - Cham : Springer. - 9783319315966 - 9783319315942 ; , s. 259-287
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Bokkapitel (refereegranskat)abstract
- Aggressive technology scaling and intensive computations have caused acceleration in the aging and wear-out process of digital systems, hence leading to an increased occurrence of premature permanent faults. Online testing techniques are becoming a necessity in current and near future digital systems. However, state-of-the-art techniques are not aware of the other digital systems’ power/performance requirements that exist in modern multi-/many-core systems. This chapter presents an approach for power-aware non-intrusive online testing in many-core systems. The approach aims at scheduling at runtime Software-Based Self-Test (SBST) routines on the various cores to exploit their idle periods in order to benefit the potentially available power budget and minimize the performance degradation. Furthermore, a criticality metric is used to identify and rank cores that need testing at a time and power and reliability issues related to the testing at different voltage and frequency levels are taken into account. Experimental results show that the proposed approach can (1) efficiently perform cores’ testing, within less than 1?% penalty on system throughput and by dedicating only 2?% of the actual consumed power, (2) adapt to the current stress level of the cores by using the utilization metric, and (3) cover all the voltage and frequency levels during the various tests.
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| 2. |
- Kanduri, A., et al.
(författare)
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Dark silicon patterning : Efficient power utilization through run-time mapping
- 2017
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Ingår i: The Dark Side of Silicon. - Cham : Springer. - 9783319315966 - 9783319315942 ; , s. 237-258
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Bokkapitel (refereegranskat)abstract
- An efficient run-time application mapping approach can considerably enhance resource utilization and mitigate the dark silicon phenomenon. In this chapter, we present a dark silicon aware run-time application mapping approach that patterns active cores alongside the inactive cores in order to evenly distribute power density across the chip. This approach leverages dark silicon to balance the temperature of active cores to provide higher power budget and better resource utilization, within a safe peak operating temperature. In contrast to exhaustive search based mapping techniques, the proposed agile heuristic approach has a negligible run-time overhead. This patterning strategy yields a surplus power budget of up to 17?% along with an improved throughput of up to 21?% in comparison with other state-of-the-art run-time mapping strategies, while the surplus budget is as high as 40?% compared to worst case scenarios.
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| 3. |
- Rahmani, A. M., et al.
(författare)
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Multi-objective power management for CMPs in the dark silicon age
- 2017
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Ingår i: The Dark Side of Silicon. - Cham : Springer. - 9783319315966 - 9783319315942 ; , s. 191-216
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Bokkapitel (refereegranskat)abstract
- New power management challenges in networked many-core systems arise when limitations of the dark silicon era come into reality. The main goal in the power management process is to achieve optimal power-performance efficiency considering thermal design power (TDP) budget. This necessitates: (1) monitoring several system characteristics including both communication and computation aspects, (2) categorizing, prioritizing, and processing the information in an intelligent way, and (3) controlling a rich set of actuators. More precisely, a comprehensive Observe-Decide-Act (ODA) loop based multi-objective control approach is needed, which has access to a rich set of sensors and actuators. In this chapter, we first identify a necessary set of system parameters for monitoring such as an upper limit on total power consumption, dynamic behavior of workloads, utilization of processing elements, per-core power consumption, load on network-on-chip (NoC), etc. We also discuss essential actuators needed for the power management process together with a multi-objective and dark silicon aware power management policy that is able to simultaneously consider all the mentioned parameters. As actuator, fine-grained voltage and frequency scaling is utilized, including near-threshold operation, per-core power gating, as well as scheduler-level actuation to maximize the system throughput while honoring the power budget.
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