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| 2. |
- Bengtsson, Olof, et al.
(författare)
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A Computational Load-Pull Investigation of Harmonic Loading effects on AM-PM conversion
- 2008
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Ingår i: GigaHertz Symposium 2008. ; , s. 83-83
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Konferensbidrag (övrigt vetenskapligt/konstnärligt)abstract
- In this work computational harmonic load-pull have been used to study the effect of harmonic loading on AM-PM conversion for an RF-Power LDMOS transistor. It is found that especially the load impedance seen at the 2nd harmonic has a large impact (up to 2° or 15% difference) on the phase distortion at P1dB in this investigation conducted at chip level.
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| 4. |
- Bengtsson, Olof, et al.
(författare)
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A Computational Load-Pull Method for TCAD Optimization of RF-Power Transistors in Bias-Modulation Applications
- 2008
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Ingår i: Proceedings of the 3rd European Microwave Integrated Circuits Conference. - 9782874870071
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Konferensbidrag (refereegranskat)abstract
- In this paper a method for TCAD evaluation of RF-Power transistors for high-efficiency operation using drain bias-modulation is presented. The method is based on large signal time-domain transient computational load-pull. With the method, intrinsic device parasitics and mechanisms affecting device efficiency under drain bias modulation can be investigated and optimized for the application making it very useful for RFIC design. A case study has been done on a CMOS compatible LDMOS. For verification under dynamic operation two-tone signals with varying envelope has been simulated. The results show a possible 15% increase in the efficiency of a modulated signal for the studied device at the expense of increased phase distortion observable also in the time-domain waveforms generated. Since the method is based on TCAD it is also useful in the investigation of e.g. dynamic breakdown during high envelope under bias-modulation operation.
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| 5. |
- Bengtsson, Olof, et al.
(författare)
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A Computational Load-Pull Method with Harmonic Loading for High-Efficiency Investigations
- 2009
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Ingår i: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 53:1, s. 86-94
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Tidskriftsartikel (refereegranskat)abstract
- In this paper a method for TCAD evaluation of RF-power transistors in high-efficiency operation using harmonic loading is presented. The method is based on large signal time-domain computational load-pull. Active loads are used in the harmonic load-pull for simulation time reduction. With the method device performance under different harmonic load impedance can be investigated at an early stage in the design process. Alternative designs can be compared and the mechanisms affecting device efficiency in class-F can be studied at chip-level. For method validation, a case study is made on an LDMOS transistor. The transistor is load-pulled in class-AB and then optimized for efficiency at 2f0 and 3f0 using a novel approach with passive fundamental load and active harmonic loads. A swept simulation is conducted using passive fundamental and harmonic loads. Waveforms in compression are analyzed and the mechanisms creating the increased efficiency in class-F are identified by a comparative study to class-AB. Class-F harmonic termination is shown to give a 17% overall reduction of dissipated power and a 9% increase in output power. The expected efficiency increase is about 3–10% in the compression region depending on level of compression.
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| 7. |
- Bengtsson, Olof, et al.
(författare)
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A Method for Device Intermodulation Analysis from 2D, TCAD Simulations using a Time-domain Waveform Approach
- 2006
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Ingår i: Proceedings of the 36th European Microwave Conference. ; , s. 169-171
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Konferensbidrag (refereegranskat)abstract
- This paper describes a fast method useful for IMD analysis at TCAD design level. The method is based on the static load-line transfer function extracted from 2D device simulations. The transfer function is exposed to a time domain signal through a look-up table and the output response is analyzed using the Fast Fourier Transform. The response is compared to measurements of a fabricated device. The method is shown to accurately predict the IMD behavior of a two-tone signal for the 3’rd, 5’th and 7’th order IMD products with regards to sweet spot tracking and relative IMD magnitude. We present a fast and simple way to predict IMD performance from TCAD simulations at an early stage in the design process. The method enables prediction of output response from any signal due to the time domain approach.
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| 9. |
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| 10. |
- Bengtsson, Olof, 1969-
(författare)
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Design and Characterization of RF-Power LDMOS Transistors
- 2008
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Doktorsavhandling (övrigt vetenskapligt/konstnärligt)abstract
- In mobile communication new applications like wireless internet and mobile video have increased the demand of data-rates. Therefore, new more wideband systems are being implemented. Power amplifiers in the base-stations that simultaneously handle these wideband signals for many terminals (handhelds) need to be highly linear with a considerable band-width. In the past decade LDMOS has been the dominating technology for use in these RF-power amplifiers. In this work LDMOS transistors possible to fabricate in a normal CMOS process have been optimized and analyzed for RF-power applications. Their non-linear behavior has been explored using load-pull measurements. The mechanisms of the non-linear input capacitance have been analyzed using 2D TCAD simulations. The investigation shows that the input capacitance is a large contributor to phase distortion in the transistor. Computational load-pull TCAD methods have been developed for analysis of RF-power devices in high-efficiency operation. Methods have been developed for class-F with harmonic loading and for bias-modulation. Load-pull measurements with drain-bias modulation in a novel measurement setup have also been conducted. The investigation shows that the combination of computational load-pull of physical transistor structures and direct measurement evaluation with modified load-pull is a viable alternative for future design of RF-power devices. Simulations and measurements on the designed LDMOS shows a 10 to 15 % increase in drain efficiency in mid-power range both in simulations and measurements. The computational load-pull method has also been used to investigate the power capability of LDMOS transistors on SOI. This study indicates that either a low-resistivity or high-resistivity substrate should be used in manufacturing of RF-power LDMOS transistors on SOI to achieve optimum efficiency. Based on a proper substrate selection these devices exhibit a 10 % higher drain-efficiency mainly due to lower dissipated power in the devices.
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