| 1. |
- Radamson, Henry H., et al.
(författare)
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Miniaturization of CMOS
- 2019
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Ingår i: Micromachines. - : MDPI AG. - 2072-666X. ; 10:5
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Tidskriftsartikel (refereegranskat)abstract
- When the international technology roadmap of semiconductors (ITRS) started almost five decades ago, the metal oxide effect transistor (MOSFET) as units in integrated circuits (IC) continuously miniaturized. The transistor structure has radically changed from its original planar 2D architecture to today's 3D Fin field-effect transistors (FinFETs) along with new designs for gate and source/drain regions and applying strain engineering. This article presents how the MOSFET structure and process have been changed (or modified) to follow the More Moore strategy. A focus has been on methodologies, challenges, and difficulties when ITRS approaches the end. The discussions extend to new channel materials beyond the Moore era.
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| 2. |
- Radamson, Henry H., et al.
(författare)
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State of the Art and Future Perspectives in Advanced CMOS Technology
- 2020
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Ingår i: Nanomaterials. - : MDPI AG. - 2079-4991. ; 10:8
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Forskningsöversikt (refereegranskat)abstract
- The international technology roadmap of semiconductors (ITRS) is approaching the historical end point and we observe that the semiconductor industry is driving complementary metal oxide semiconductor (CMOS) further towards unknown zones. Today's transistors with 3D structure and integrated advanced strain engineering differ radically from the original planar 2D ones due to the scaling down of the gate and source/drain regions according to Moore's law. This article presents a review of new architectures, simulation methods, and process technology for nano-scale transistors on the approach to the end of ITRS technology. The discussions cover innovative methods, challenges and difficulties in device processing, as well as new metrology techniques that may appear in the near future.
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| 3. |
- Yin, X., et al.
(författare)
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Vertical Sandwich Gate-All-Around Field-Effect Transistors with Self-Aligned High-k Metal Gates and Small Effective-Gate-Length Variation
- 2020
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Ingår i: IEEE Electron Device Letters. - : Institute of Electrical and Electronics Engineers Inc.. - 0741-3106 .- 1558-0563. ; 41:1, s. 8-11
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Tidskriftsartikel (refereegranskat)abstract
- A new type of vertical nanowire (NW)/nanosheet (NS) field-effect transistors (FETs), termed vertical sandwich gate-all-around (GAA) FETs (VSAFETs), is presented in this work. Moreover, an integration flow that is compatible with processes used in the mainstream industry is proposed for the VSAFETs. Si/SiGe epitaxy, isotropic quasi-atomic-layer etching (qALE), and gate replacement were used to fabricate pVSAFETs for the first time. Vertical GAA FETs with self-aligned high-k metal gates and a small effective-gate-length variation were obtained. Isotropic qALE, including Si-selective etching of SiGe, was developed to control the diameter/thickness of the NW/NS channels. NWs with a diameter of 10 nm and NSs with a thickness of 20 nm were successfully fabricated, and good device characteristics were obtained. Finally, the device performance was investigated and is discussed in this work. © 2019 IEEE.
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