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- Sourdis, Ioannis, 1979, et al.
(författare)
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DeSyRe: On-demand adaptive and reconfigurable fault-tolerant SoCs
- 2014
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Ingår i: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). - Cham : Springer International Publishing. - 1611-3349 .- 0302-9743. ; 8405, s. 312-317
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Konferensbidrag (refereegranskat)abstract
- The DeSyRe project builds on-demand adaptive, reliable Systems-on-Chips. In response to the current semiconductor technology trends thatmake chips becoming less reliable, DeSyRe describes a newgeneration of by design reliable systems, at a reduced power and performance cost. This is achieved through the following main contributions. DeSyRe defines a fault-tolerant system architecture built out of unreliable components, rather than aiming at totally fault-free and hence more costly chips. In addition, DeSyRe systems are on-demand adaptive to various types and densities of faults, as well as to other system constraints and application requirements. For leveraging on-demand adaptation/customization and reliability at reduced cost, a new dynamically reconfigurable substrate is designed and combined with runtime system software support. The above define a generic and repeatable design framework, which is applied to two medical SoCs with high reliability constraints and diverse performance and power requirements. One of the main goals of the DeSyRe project is to increase the availability of SoC components in the presence of permanents faults, caused at manufacturing time or due to device aging. A mix of coarse- and fine-grain reconfigurable hardware substrate is designed to isolate and bypass faulty component parts. The flexibility provided by the DeSyRe reconfigurable substrate is exploited at runtime by system optimization heuristics,which decide tomodify component configurationwhen a permanent fault is detected, providing graceful degradation.
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3. |
- Prakash, A, et al.
(författare)
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Deliverable D6.3 : Trials and experimentation (cycle 3)
- 2022
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Rapport (refereegranskat)abstract
- This deliverable presents the third and final cycle of trials and experimentation activities executed over 5GENESIS facilities. The document is the continuation of deliverables D6.1 and D6.2, in the sense that it captures tests carried out over the evolved infrastructures hosting 5GENESIS facilities following the methodology defined in the previous editions of this deliverable. The tests reported in this document focus on i) the final 5G infrastructure deployments that includes radio and core elements mostly in Stand-Alone (SA) deployment configurations based on commercial and open implementations, and ii) the various use cases/applications, some of them also involving field trials. Most of the tests described herein, especially the generic/lab ones are performed using the Open5GENESIS experimentation suite.
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4. |
- Sourdis, Ioannis, 1979, et al.
(författare)
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DeSyRe: On-demand system reliability
- 2013
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Ingår i: Microprocessors and Microsystems. - : Elsevier BV. - 0141-9331. ; 37:8, s. 981-1001
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Tidskriftsartikel (refereegranskat)abstract
- The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect-/fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints.
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5. |
- Wolpin, Brian M., et al.
(författare)
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Genome-wide association study identifies multiple susceptibility loci for pancreatic cancer
- 2014
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Ingår i: Nature Genetics. - : Springer Science and Business Media LLC. - 1061-4036 .- 1546-1718. ; 46:9, s. 994-
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Tidskriftsartikel (refereegranskat)abstract
- We performed a multistage genome-wide association study including 7,683 individuals with pancreatic cancer and 14,397 controls of European descent. Four new loci reached genome-wide significance: rs6971499 at 7q32.3 (LINC-PINT, per-allele odds ratio (OR) = 0.79, 95% confidence interval (CI) 0.74-0.84, P = 3.0 x 10(-12)), rs7190458 at 16q23.1 (BCAR1/CTRB1/CTRB2, OR = 1.46, 95% CI 1.30-1.65, P = 1.1 x 10(-10)), rs9581943 at 13q12.2 (PDX1, OR = 1.15, 95% CI 1.10-1.20, P = 2.4 x 10(-9)) and rs16986825 at 22q12.1 (ZNRF3, OR = 1.18, 95% CI 1.12-1.25, P = 1.2 x 10(-8)). We identified an independent signal in exon 2 of TERT at the established region 5p15.33 (rs2736098, OR = 0.80, 95% CI 0.76-0.85, P = 9.8 x 10(-14)). We also identified a locus at 8q24.21 (rs1561927, P = 1.3 x 10(-7)) that approached genome-wide significance located 455 kb telomeric of PVT1. Our study identified multiple new susceptibility alleles for pancreatic cancer that are worthy of follow-up studies.
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