| 1. |
|
|
| 2. |
- Fröberg, Linus, et al.
(författare)
-
Vertical InAs nanowire wrap-gate FETs
- 2006
-
Ingår i: Book of abstracts: Semicond Nanowires Symp, Eindhoven, The Netherlands (2006).
-
Konferensbidrag (refereegranskat)
|
|
| 3. |
- Lind, Erik, et al.
(författare)
-
Improved subthreshold slope in an InAs nanowire heterostructure field-effect transistor
- 2006
-
Ingår i: Nano Letters. - : American Chemical Society (ACS). - 1530-6992 .- 1530-6984. ; 6:9, s. 1842-1846
-
Tidskriftsartikel (refereegranskat)abstract
- An n-type InAs/InAsP heterostructure nanowire field-effect transistor has been fabricated and compared with a homogeneous InAs field-effect transistor. For the same device geometry, by introduction of the heterostructure, the threshold voltage is shifted 4 V, the maximum current on-off ratio is enhanced by a factor of 10 000, and the subthreshold swing is lowered by a factor 4 compared to the homogeneous transistor. At the same time, the drive current remains constant for a fixed gate overdrive. A single nanowire heterostructure transistor has a transconductance of 5 mu A/V at a low source-drain voltage of 0.3 V. For the homogeneous InAs transistor, we deduced a high electron mobility of 1500 cm(2)/Vs.
|
|
| 4. |
- Thelander, Claes, et al.
(författare)
-
Development of a Vertical Wrap-Gated InAs FET
- 2008
-
Ingår i: IEEE Transactions on Electron Devices. - 0018-9383. ; 55:11, s. 3030-3036
-
Tidskriftsartikel (refereegranskat)abstract
- In this paper, we report on the development of a vertical wrap-gated field-effect transistor based on epitaxially grown InAs nanowires. We discuss some of the important steps involved in the growth and processing, such as nanowire position control in situ doping, high-kappa dielectric deposition, spacer layer formation: and metal wrap-gate fabrication. In particular, we compare a few alternative methods for deposition of materials onto vertical structures and discuss their potential advantages and limitations. Finally, we also present a comparison of transistor performance for nanowires grown using two different epitaxial techniques.
|
|
| 5. |
- Wernersson, Lars-Erik, et al.
(författare)
-
Attractive potential around a buried metallic gate in a Schottky Collector Hot Electron Transistor
- 2002
-
Ingår i: Institute of Physics Conference Series. - 0951-3248. ; 170, s. 81-85
-
Tidskriftsartikel (refereegranskat)abstract
- We report on the formation of an attractive potential around buried metal wires in a novel design for the Hot Electron Transistor (HET). In this device, the doped base layer in the HET is replaced by an embedded metal grating, which is forward biased beyond flat band conditions in order to efficiently extract carriers from the emitter into the active region. These carriers are collected in a Schottky Collector contact. By tuning the gate and collector voltages, the potential profile around the wires can be repulsive as well as attractive. This is a key result for the realisation of a Biprism device.
|
|
| 6. |
- Wernersson, Lars-Erik, et al.
(författare)
-
Epitaxially overgrown, stable W-GaAs Schottky contacts with sizes down to 50 nm
- 2002
-
Ingår i: Journal of Vacuum Science and Technology B. - : American Vacuum Society. - 1520-8567. ; 20:2, s. 580-589
-
Tidskriftsartikel (refereegranskat)abstract
- A processing scheme for the fabrication of embedded W-GaAs contacts has been established and the resulting contact characteristics have been evaluated. The main advantage of these contacts is that they are stable during high-temperature epitaxial overgrowth. The fabrication scheme is based on a liftoff process with electron beam evaporation of tungsten and subsequent epitaxial overgrowth using metalorganic vapor phase epitaxy. Various methods were used to characterize the buried contacts. First, the structural properties of GaAs surrounding embedded W features, with widths down to 50 nm, were characterized by high-resolution transmission electron microscopy. Measurements of the conductivity in individual, buried wires were performed in order to study the influence of the overgrowth process on the properties of the tungsten. We also evaluated the current-voltage characteristics for macroscopic contacts, which revealed a clear dependence on processing parameters. Optimized processing conditions could thus be established under which limited contact degradation occurred during overgrowth. Finally, we used the overgrowth technique to perform a detailed investigation of the electrical and optical properties of floating-potential embedded nano-Schottky contacts by space-charge spectroscopy.
|
|
| 7. |
- Wernersson, Lars-Erik, et al.
(författare)
-
III-V Nanowires-Extending a Narrowing Road
- 2010
-
Ingår i: Proceedings of the IEEE. - 0018-9219. ; 98:12, s. 2047-2060
-
Tidskriftsartikel (refereegranskat)abstract
- Semiconductor nanowires have attracted considerable attention during the last decade and are considered as an alternative path to extend the road for scaled semiconductor devices. The interest is motivated by the improved electrostatic control in the cylindrical geometry and the possibility to utilize heterostructures in transistor design. Currently, nanowire transistors have been realized both in III-Vs and in group IV materials employing top-down as well as bottom-up technologies. In this review, we give an overview of the field and, in particular, we summarize state-of-the-art for III-V nanowire devices. It is demonstrated that the growth and processing technologies are maturing and that devices with good transistor characteristics are being fabricated by a combined bottom-up and top-down approach. Also, the first radio-frequency (RF)-implementations are reviewed and discussed.
|
|
| 8. |
- Wernersson, Lars-Erik, et al.
(författare)
-
Metalorganic vapor phase epitaxy-grown GaP/GaAs/GaP and GaAsP/GaAs/GaAsP n-type resonant tunnelling diodes
- 2002
-
Ingår i: Applied Physics Letters. - : AIP Publishing. - 0003-6951 .- 1077-3118. ; 80:10, s. 1841-1843
-
Tidskriftsartikel (refereegranskat)abstract
- We have studied GaP/GaAs/GaP and GaAsxP1-x/GaAs/GaAsxP1-x double-barrier resonant tunnelling diodes grown by metalorganic vapor phase epitaxy. We find that GaP tensile strained barriers in GaP/GaAs/GaP diodes may be grown with a barrier thickness below the critical thickness of about 12 monolayers. However, a corrugation of the strained barrier is observed by transmission electron microscopy. This variation may explain the low peak-to-valley ratio of the diodes (about 2). In contrast, GaAsxP1-x/GaAs/GaAsxP1-x resonant tunnelling diodes have been grown with a homogeneous thickness of the barriers, consequently showing a substantially improved electrical performance compared to the GaP diodes with peak-to-valley ratios >5.
|
|
| 9. |
- Wernersson, Lars-Erik, et al.
(författare)
-
Nanowire field-effect transistor
- 2007
-
Ingår i: Japanese Journal of Applied Physics. - 0021-4922. ; 46:4B, s. 2629-2631
-
Tidskriftsartikel (refereegranskat)abstract
- A new processing scheme for the fabrication of sub-100-nm-gate-length vertical nanowire transistors has been developed. InAs transistors with an 11 x 11 nanowire matrix and 80 nm gate length have been realized by this process. The gate length is directly controlled via the thickness of the evaporated gate metal and is thus easily scalable. The demonstrated devices operate in depletion mode, and they show a maximum drive current of about 1 mA and a maximum transconductance of 0.52 mS at V-g = -0.5 V and V-d = 1 V.
|
|
| 10. |
- Wernersson, Lars-Erik, et al.
(författare)
-
Wrap-gated InAs nanowire field-effect transistor
- 2005
-
Ingår i: International Electron Devices Meeting 2005. - 078039268X ; , s. 273-276
-
Konferensbidrag (refereegranskat)abstract
- Field-effect transistors (FETs) based on semiconductor nanowires (Bryllert et al., 2005) have the potential to improve certain aspects of existing planar FET technologies. The possibility to form wrap-gates gives an efficient gate coupling resulting in reduced drain-induced barrier lowering. Furthermore, lateral strain relaxation allows a new freedom in combining materials in heterostructures, where materials with different lattice constants can be combined without defects (Bjork et al., 2002). Since the transistor channel, unlike the planar FETs, is vertical, heterostructures may be used to tailor the bandstructure along the direction of current flow. In this paper, we demonstrate a new technology to fabricate vertical nanowire FETs in a process that almost exclusively relies on optical lithography and standard III-V processing techniques. We measure encouraging electrical data, including current saturation at Vds ≡ 0.15 V (for Vg ≡ 0 V) and low voltage operation Vth ≡ -0.15 V, and present opportunities to improve the device performance by heterostructure design
|
|
