| 1. |
- Chen, Jian, et al.
(författare)
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The Design of All-Digital Polar Transmitter based on ADPLL and Phase Synchronized Delta Sigma Modulator
- 2012
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Ingår i: IEEE Journal of Solid-State Circuits. - : IEEE Solid-State Circuits Society. - 0018-9200 .- 1558-173X. ; 47:5, s. 1154-1164
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Tidskriftsartikel (refereegranskat)abstract
- An improved architecture of polar transmitter (TX) is presented. The proposed architectureis digitally-intensive and mainly composed of an all-digital PLL (ADPLL) for phasemodulation, a 1-bit low-pass delta sigma (Delta Sigma) modulator for envelop modulation, and aH-bridge class-D power amplifier (PA) for differential signaling. The (Delta Sigma) modulator isclocked using the phase modulated RF carrier to ensure phase synchronization between theamplitude and phase path, and to guarantee the PA is switching at zero crossings of theoutput current.An on chip pre-filter is used to reduce the parasitic capacitance from packages at theswitch stage output. The high over sampling ratio of the (Delta Sigma) modulator move quantizationnoise far away from the carrier frequency, ensuring good in-band performance and relax filterrequirements. The on-chip filter also acts as impedance matching and differential to singleended conversion. The measured digital transmitter consumes 58 mW from a 1 V at 6.8 dBm output power.
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| 2. |
- Mao, Jia, et al.
(författare)
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A power scalable and high pulse swing UWB transmitter for wirelessly-powered RFID applications
- 2012
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Ingår i: NORCHIP, 2012. - : IEEE. - 9781467322218 ; , s. 6403099-
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Konferensbidrag (refereegranskat)abstract
- This paper presents a 3-5 GHz, high output amplitude, carrier-less based Ultra Wideband (UWB) transmitter for wirelessly powered RFID application. The UWB transmitter consists of a baseband pulse generator, a driver amplifier and an output on-chip filter. The baseband pulse generator and the driver amplifier are designed as zero DC power consuming circuit, which enables scalable power with the pulse rate. IC pad and bonding wire parasitics are considered to be absorbed as part of output filtering network, realizing package co-design. The simulation result shows that the proposed transmitter radiates 2.34 pJ/pulse energy with 1.63 V pulse amplitude. The total energy consumption under 1.8 V power supply is 18 pJ/pulse, corresponding to 13% energy efficiency.
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| 3. |
- Rong, Liang, et al.
(författare)
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RF Transmitter Architecture Investigation for Power Efficient Mobile WiMAX Applications
- 2008
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Ingår i: 2008 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS. - NEW YORK : IEEE. - 9781424425419 ; , s. 114-117
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Konferensbidrag (refereegranskat)abstract
- Wireless broadband digital communication systems with high spectral efficiency suffer from severe power efficiency problem. Peak-to-Average Power Ratio is reported up to 12dB for WiMAX 802.16e systems implementing OFDM IFFT-1024 and 64-QAM modulation. In this work, outphasing (LILAC) and polar transmitter architectures are investigated and compared with direct conversion (DC) architecture. Complete system solution targeting 23dBm output power is evaluated. System level simulation result shows that, with linear power combiner, LILAC consumes more power than DC if non-clipping modulation scheme used. And polar system has stringent 3 degree phase matching and 0.5dB gain matching requirements to meet EVM and spectrum mask specifications.
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| 4. |
- Shen, Jue, 1985-, et al.
(författare)
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Intelligent Packaging with Inkjet-Printed Electrochromic Paper Display –A Passive Display Infotag
- 2012
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Ingår i: NIP28 : 28th international conference on digital printing technologies : technical program and proceedings : Digital fabrication 2012 : September 9-13, 2012, Quebec City, Quebec, Canada.. - : The Society for Imaging Science and Technology. - 9780892083022 ; , s. 164-167
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Konferensbidrag (refereegranskat)abstract
- In this paper, we study the electronic performance of the inkjet-printed electrochromic (EC) display which uses Poly (3,4-ethylenedioxythiophene) (PEDOT) doped with poly (styrenesulfonate) (PSS) as the active material, and extract its equivalent RC model. Results show that by charging PEDOT:PSS with 1.8V for averagely 10s, it can be switched from transparent (oxidation state) to blue (reduced state) and keeps the color for an average of 300s in the absence of energy supply, consuming much lower power than other flexible display technologies. However, it suffers from significant crosstalk effects in passive-matrix addressing and from performance variation as sample changes or time goes on. Based on the results, we design a programmable digital display driver with two different operation modes, and analyze the feasibility to integrate such display function in passive intelligent packaging systems. System simulation results prove it as a promising solution from evaluation of power budget and driving ability with printed interconnections and offchip conductors.
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| 5. |
- Shen, Jue, et al.
(författare)
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Phase noise improvement and noise modeling of type-I ADPLL with non-linear quantization effects
- 2015
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Ingår i: NORCHIP 2014 - 32nd NORCHIP Conference. - : IEEE conference proceedings. - 9781479954421
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Konferensbidrag (refereegranskat)abstract
- This paper presents a phase noise improvement method for fine tuning of type-I ADPLL by exploiting its nonlinear quantization effects. When quantization step approaches the same orders of magnitude of standard deviation of input noise, quantization effects become nonlinear, and additive noise modeling of quantization effects is no longer applicable. By proper offsetting the input signals in this case, the feedback loop of ADPLL can be very sensitive to frequency phase deviation. It results in a larger loop bandwidth, and in turn smaller in-band phase noise than in linear quantization case. A theoretic s-domain noise model is proposed to quantify the phase noise in nonlinear case. Results are verified in Modelsim simulations. Proposed method offers possibility of achieving lower phase noise by lower quantization resolution and less circuit design efforts.
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| 6. |
- Wang, Peng, et al.
(författare)
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A 3.1-4.8-GHz energy-detector front-end for non-coherent OOK impulse-radio UWB
- 2010
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Ingår i: ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems. - : IEEE. - 9781424453085 ; , s. 485-488
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Konferensbidrag (refereegranskat)abstract
- This paper proposes a 0-33.3Mb/s front-end of the energy detector for 3.1-4.8-GHz impulse-radio ultra-wideband (IR-UWB). Fully differential architecture with the non-coherent on-off-keying (OOK) modulation is adopted. Targeting at - 98dBm sensitivity, the low noise amplifier (LNA) is designed to achieve <3.5dB noise figure, <-10dB S11, and >15dB gain. Interleaved integrating scheme relaxes the implementation of digital circuits. Thanks to the duty-cycling, the front-end achieves 420pJ/bit energy efficiency for OOK modulation. The bias is generated by band-gap circuits. The layout design and verification are completed with Cadence Spectre using UMC 90nm CMOS.
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| 7. |
- Wang, Peng, et al.
(författare)
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Low Noise Amplifier Architecture Analysis for OFDM-UWB System in 0.18 um CMOS
- 2008
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Ingår i: 26th Norchip Conference, Norchip. - 9781424424931 ; , s. 184-189
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Konferensbidrag (refereegranskat)abstract
- This paper analyzes architectures of the low noise amplifier (LNA) for orthogonal-frequency-division-multiplexing ultra-wideband (OFDM-UWB) application. Until now, most UWB LNA implementations are focusing how to realize a single LNA covering the whole frequency band. In this work three popular wide-band LNA architectures are compared to a proposed parallel LNA architecture in which different amplifiers cover different frequency bands. Our study reveals that by reusing the source degenerated inductor between the different frequency bands, the parallel LNA architecture can achieve better performance than the single wide-band LNA (S11<-10 dB, voltage gain >15 dB, NF >4.5 dB, power consumption <10 mW) at the expense of a slightly increased circuit area.
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| 8. |
- Xie, Li, et al.
(författare)
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Co-design of flip chip interconnection with anisotropic conductive adhesives and inkjet-printed circuits for paper-based RFID tags
- 2011
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Ingår i: 2011 61st Electronic Components and Technology Conference, ECTC 2011. - : IEEE conference proceedings. ; , s. 1752-1757
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Konferensbidrag (övrigt vetenskapligt/konstnärligt)abstract
- In this paper we study the radio frequency performance of interconnect using anisotropic conductive film (ACF). A series of experiments are conducted in order to measure and model the electrical characteristics of inkjet-printed circuits on paper substrate as well as the impedance parameters of ACF interconnect at high frequency. Four-point measurement structure, time domain reflectometry (TDR), vector network analyzer (VNA) and de-embedded technology are used to ensure the accuracy of experiments. Equivalent circuit models are built based on the experimental results. Finally, these models are considered as parts of the matching network and circuit design for the RFID receiver, which can be co-designed for developing paper-based electronic systems. It is found that since the difference between RFID tags with and without ACF interconnects is negligible, the influence of ACF interconnects can be ignored for paper-based UHF RFID tag. ACF is a feasible interconnect material for paper-based RFID tags.
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| 9. |
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| 10. |
- Zhou, Qin, et al.
(författare)
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A flexible energy detection IR-UWB receiver for RFID and WSN
- 2010
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Annan publikation (övrigt vetenskapligt/konstnärligt)abstract
- This paper presents an energy detection impulse radio ultra-wideband (IR-UWB) receiver for radio frequency identification (RFID) and wireless sensor networks (WSN) applications. As opposed to coherent receivers, it uses simple square-integrate samplers, that allows low complexity and low power implementations. This prototype is composed by an analog front-end and timing-critical digital blocks in UMC 90nm CMOS process, and an Altera Cyclone III FPGA development kit for back-end processing, connected by a high speed mezzanine card (HSMC). Thanks to the flexible back-end on FPGA, the receiver is featured by high programmability and multi-mode operation which adopts a wide range of pulse rates and data rates, different modulation and synchronization schemes, and various channel environments.
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